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authorclm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>2015-10-28 18:09:09 +0000
committerclm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>2015-10-28 18:09:09 +0000
commit34b98464bc9650a81101e15729e879c2af9d0e53 (patch)
tree23746ca48757180579eac917f4453a590571cce2
parent8c1cab24c7ef8ec53c374bcfe2286250155f1db3 (diff)
downloadgcc-34b98464bc9650a81101e15729e879c2af9d0e53.tar.gz
2015-10-28 Catherine Moore <clm@codesourcery.com>
* gcc.target/mips/oddspreg-3.c: Disable for MIPS16. * gcc.target/mips/oddspreg-6.c: Likewise. * gcc.target/mips/oddspreg-1.c: Likewise. * gcc.target/mips/oddspreg-2.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@229496 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/mips/oddspreg-1.c2
-rw-r--r--gcc/testsuite/gcc.target/mips/oddspreg-2.c2
-rw-r--r--gcc/testsuite/gcc.target/mips/oddspreg-3.c2
-rw-r--r--gcc/testsuite/gcc.target/mips/oddspreg-6.c2
5 files changed, 11 insertions, 4 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cc04c43bfef..5ca99b01eee 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2015-10-28 Catherine Moore <clm@codesourcery.com>
+
+ * gcc.target/mips/oddspreg-3.c: Disable for MIPS16.
+ * gcc.target/mips/oddspreg-6.c: Likewise.
+ * gcc.target/mips/oddspreg-1.c: Likewise.
+ * gcc.target/mips/oddspreg-2.c: Likewise.
+
2015-10-05 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR target/67839
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-1.c b/gcc/testsuite/gcc.target/mips/oddspreg-1.c
index a9c69573693..d44563d0860 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-1.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-1.c
@@ -5,7 +5,7 @@
#error "Incorrect number of single-precision registers reported"
#endif
-void
+NOMIPS16 void
foo ()
{
register float foo asm ("$f1");
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-2.c b/gcc/testsuite/gcc.target/mips/oddspreg-2.c
index e2e0a2660bb..efeb0af1b0d 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-2.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-2.c
@@ -2,7 +2,7 @@
/* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
/* { dg-options "-mabi=32 -mno-odd-spreg -mhard-float" } */
-void
+NOMIPS16 void
foo ()
{
register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-3.c b/gcc/testsuite/gcc.target/mips/oddspreg-3.c
index f287eb66e92..8a0d85cc7cd 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-3.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-3.c
@@ -2,7 +2,7 @@
/* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
/* { dg-options "-mabi=32 -mfp32 -march=loongson3a -mhard-float" } */
-void
+NOMIPS16 void
foo ()
{
register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-6.c b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
index 955dea90140..eb376c6b330 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-6.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
@@ -2,7 +2,7 @@
/* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
/* { dg-options "-mabi=32 -mfpxx -mhard-float" } */
-void
+NOMIPS16 void
foo ()
{
register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */