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authorclm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>2014-04-16 21:09:30 +0000
committerclm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>2014-04-16 21:09:30 +0000
commit3fe9ace41bc5eb53bfa6679451646aaa97cd20ae (patch)
tree7623f6762101077be44613e06949ae382edda593
parent10c9192fe3b91ba56278141ddceb2957f7996ba8 (diff)
downloadgcc-3fe9ace41bc5eb53bfa6679451646aaa97cd20ae.tar.gz
2014-04-16 Catherine Moore <clm@codesourcery.com>
gcc/ * mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal): Adjust constraints for microMIPS store patterns. testsuite/ * gcc.target/mips/umips-store16-2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209450 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/mips.md6
-rw-r--r--gcc/testsuite/ChangeLog4
-rw-r--r--gcc/testsuite/gcc.target/mips/umips-store16-2.c22
4 files changed, 34 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 209b4deca91..fe2d1edc1dd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-16 Catherine Moore <clm@codesourcery.com>
+
+ * mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal):
+ Adjust constraints for microMIPS store patterns.
+
2014-04-16 Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/avr-mcus.def: Correct typo for atxmega256a3bu macro.
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index e82772bba34..f914ab67d8a 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4437,7 +4437,7 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:IMOVE32 0 "nonimmediate_operand" "=d,!u,!u,d,e,!u,!ks,d,ZS,ZT,m,*f,*f,*d,*m,*d,*z,*a,*d,*B*C*D,*B*C*D,*d,*m")
- (match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kb,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
+ (match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kbJ,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode))"
@@ -4578,7 +4578,7 @@
(define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZU,m,*a,*d")
- (match_operand:HI 1 "move_operand" "d,J,I,ZU,m,!kb,dJ,*d*J,*a"))]
+ (match_operand:HI 1 "move_operand" "d,J,I,ZU,m,!kbJ,dJ,*d*J,*a"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], HImode)
|| reg_or_0_operand (operands[1], HImode))"
@@ -4654,7 +4654,7 @@
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZV,m,*a,*d")
- (match_operand:QI 1 "move_operand" "d,J,I,ZW,m,!kb,dJ,*d*J,*a"))]
+ (match_operand:QI 1 "move_operand" "d,J,I,ZW,m,!kbJ,dJ,*d*J,*a"))]
"!TARGET_MIPS16
&& (register_operand (operands[0], QImode)
|| reg_or_0_operand (operands[1], QImode))"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 10db7a2eeac..8b83cd425dd 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-04-16 Catherine Moore <clm@codesourcery.com>
+
+ * gcc.target/mips/umips-store16-2.c: New test.
+
2014-04-16 Marc Glisse <marc.glisse@inria.fr>
* g++.dg/cpp0x/initlist-vect.C: New file.
diff --git a/gcc/testsuite/gcc.target/mips/umips-store16-2.c b/gcc/testsuite/gcc.target/mips/umips-store16-2.c
new file mode 100644
index 00000000000..0748edb5692
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-store16-2.c
@@ -0,0 +1,22 @@
+/* { dg-options "(-mmicromips) -dp" } */
+
+MICROMIPS void
+f1 (unsigned char *ptr)
+{
+ *ptr = 0;
+}
+
+MICROMIPS void
+f2 (unsigned short *ptr)
+{
+ *ptr = 0;
+}
+
+MICROMIPS void
+f3 (unsigned int *ptr)
+{
+ *ptr = 0;
+}
+/* { dg-final { scan-assembler "\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
+/* { dg-final { scan-assembler "\tsh\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
+/* { dg-final { scan-assembler "\tsw\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */