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| author | Uros Bizjak <ubizjak@gmail.com> | 2022-02-10 17:23:17 +0100 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2022-02-10 17:23:59 +0100 |
| commit | 53fcc46339239c4958e2a15bb9e59274133bbcf7 (patch) | |
| tree | dec5314a067ea00f6b3774e853c9f69c44950887 | |
| parent | 69febe852753448582ae4a73793816dfb9d91c3b (diff) | |
| download | gcc-53fcc46339239c4958e2a15bb9e59274133bbcf7.tar.gz | |
i386: Fix vec_unpacks_float_lo_v4si operand constraint [PR104469]
2022-02-10 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/104469
* config/i386/sse.md (vec_unpacks_float_lo_v4si):
Change operand 1 constraint to register_operand.
gcc/testsuite/ChangeLog:
PR target/104469
* gcc.target/i386/pr104469.c: New test.
| -rw-r--r-- | gcc/config/i386/sse.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr104469.c | 12 |
2 files changed, 13 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 36b35f68349..b2f56345c65 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9223,7 +9223,7 @@ (define_expand "vec_unpacks_float_hi_v8si" [(set (match_dup 2) (vec_select:V4SI - (match_operand:V8SI 1 "vector_operand") + (match_operand:V8SI 1 "register_operand") (parallel [(const_int 4) (const_int 5) (const_int 6) (const_int 7)]))) (set (match_operand:V4DF 0 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr104469.c b/gcc/testsuite/gcc.target/i386/pr104469.c new file mode 100644 index 00000000000..39cc31fde1f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104469.c @@ -0,0 +1,12 @@ +/* PR target/104469 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512f" } */ + +typedef double __attribute__((__vector_size__ (64))) F; +typedef int __attribute__((__vector_size__ (32))) V; + +F +foo (V v) +{ + return __builtin_convertvector (v, F); +} |