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authormshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>2014-06-10 14:02:56 +0000
committermshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>2014-06-10 14:02:56 +0000
commit74ad6d83e4e7e6164825d157a48ed8034f8bd45a (patch)
tree1dd9bda94d83845278115317ffa852bd1a4e5ec8
parent2ac9c82c8eb2903bdf1fe3069e76b8a16beb73ba (diff)
downloadgcc-74ad6d83e4e7e6164825d157a48ed8034f8bd45a.tar.gz
Reverting previous commit.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211410 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/aarch64/aarch64.c29
2 files changed, 15 insertions, 19 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9fc32cc1cfa..00f23b4cb17 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,3 @@
-2014-06-10 Jiong Wang <jiong.wang@arm.com>
-
- * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
- (aarch64_save_or_restore_callee_save_registers): Fix layout.
-
2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 3eb18e969d7..e7f455bb7c1 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1917,6 +1917,7 @@ aarch64_save_or_restore_fprs (int start_offset, int increment,
rtx (*gen_mem_ref)(enum machine_mode, rtx)
= (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
+
for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
{
if (aarch64_register_saved_on_entry (regno))
@@ -1934,12 +1935,10 @@ aarch64_save_or_restore_fprs (int start_offset, int increment,
{
/* Empty loop. */
}
-
if (regno2 <= V31_REGNUM &&
aarch64_register_saved_on_entry (regno2))
{
rtx mem2;
-
/* Next highest register to be saved. */
mem2 = gen_mem_ref (DFmode,
plus_constant
@@ -1965,10 +1964,10 @@ aarch64_save_or_restore_fprs (int start_offset, int increment,
gen_rtx_REG (DFmode, regno2));
}
- /* The first part of a frame-related parallel insn is
- always assumed to be relevant to the frame
- calculations; subsequent parts, are only
- frame-related if explicitly marked. */
+ /* The first part of a frame-related parallel insn
+ is always assumed to be relevant to the frame
+ calculations; subsequent parts, are only
+ frame-related if explicitly marked. */
RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
regno = regno2;
start_offset += increment * 2;
@@ -1988,14 +1987,15 @@ aarch64_save_or_restore_fprs (int start_offset, int increment,
RTX_FRAME_RELATED_P (insn) = 1;
}
}
+
}
/* offset from the stack pointer of where the saves and
restore's have to happen. */
static void
-aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
- bool restore)
+aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
+ bool restore)
{
rtx insn;
rtx base_rtx = stack_pointer_rtx;
@@ -2027,7 +2027,6 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
aarch64_register_saved_on_entry (regno2))
{
rtx mem2;
-
/* Next highest register to be saved. */
mem2 = gen_mem_ref (Pmode,
plus_constant
@@ -2051,11 +2050,12 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2));
}
- /* The first part of a frame-related parallel insn is
- always assumed to be relevant to the frame
- calculations; subsequent parts, are only
- frame-related if explicitly marked. */
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
+ /* The first part of a frame-related parallel insn
+ is always assumed to be relevant to the frame
+ calculations; subsequent parts, are only
+ frame-related if explicitly marked. */
+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0,
+ 1)) = 1;
regno = regno2;
start_offset += increment * 2;
}
@@ -2075,6 +2075,7 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
}
aarch64_save_or_restore_fprs (start_offset, increment, restore, base_rtx);
+
}
/* AArch64 stack frames generated by this compiler look like: