diff options
author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-04-25 00:17:46 +0000 |
---|---|---|
committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-04-25 00:17:46 +0000 |
commit | aeaf942699cc2eecce34e1f55eba6a177644b73e (patch) | |
tree | c6d2a6befb4c697ae237e41a3c2e310f4ea4b7e8 | |
parent | f0eabc52c9a2d3da0bfc201da7a5c1658b76e9a4 (diff) | |
download | gcc-aeaf942699cc2eecce34e1f55eba6a177644b73e.tar.gz |
Daily bump.
-rw-r--r-- | ChangeLog | 4 | ||||
-rw-r--r-- | gcc/ChangeLog | 205 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/cp/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/po/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 66 | ||||
-rw-r--r-- | libstdc++-v3/ChangeLog | 9 |
7 files changed, 294 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index 1a00f16c181..f0e4319c3cb 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,7 @@ +2023-04-24 Martin Liska <mliska@suse.cz> + + * MAINTAINERS: Fix sorting. + 2023-04-21 Peter Foley <pefoley2@pefoley.com> * configure: Regenerate. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1890cc23c55..83857bf81a9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,208 @@ +2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to + simplify two successive VEC_PERM_EXPRs with same VLA mask, + where mask chooses elements in reverse order. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments + and support diamond shaped basic block form. + (tree_ssa_phiopt_worker): Update call to match_simplify_replacement + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): + Instead of calling last_and_only_stmt, look for the last statement + manually. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p): + New function. + (match_simplify_replacement): Call + empty_bb_or_one_feeding_into_p instead of doing it inline. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/68894 + * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the + continue for the do_hoist_loads diamond case. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange + code for better code readability. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/109604 + * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the + diamond form check from ... + (minmax_replacement): Here. + +2023-04-24 Patrick Palka <ppalka@redhat.com> + + * tree.cc (strip_array_types): Don't define here. + (is_typedef_decl): Don't define here. + (typedef_variant_p): Don't define here. + * tree.h (strip_array_types): Define here. + (is_typedef_decl): Define here. + (typedef_variant_p): Define here. + +2023-04-24 Frederik Harwath <frederik@codesourcery.com> + + * doc/generic.texi (OpenMP): Add != to allowed + conditions and state that vars can be unsigned. + * tree.def (OMP_FOR): Likewise. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (mulv2di3): New expander. + +2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * doc/install.texi: Consistently use Solaris rather than Solaris 2. + Remove explicit Solaris 11 references. + Markup fixes. + (Options specification, --with-gnu-as): as and gas always differ + on Solaris. + Remove /usr/ccs/bin reference. + (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove. + (i?86-*-solaris2*): Merge assembler, linker recommendations ... + (*-*-solaris2*): ... here. + Update bundled GCC versions. + Don't refer to pre-built binaries. + Remove /bin/sh warning. + Update assembler, linker recommendations. + Document GNAT bootstrap compiler. + (sparc-sun-solaris2*): Remove non-UltraSPARC reference. + (sparc64-*-solaris2*): Move content... + (sparcv9-*-solaris2*): ...here. + Add GDC for 64-bit bootstrap compilers. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/109406 + * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL + case. + * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New + pattern. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to... + (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec. + (aarch64_<su>abal2<mode>): New define_expand. + * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function. + (aarch64_rtx_costs): Handle ABD rtxes. + * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete. + * config/aarch64/iterators.md (ABAL2): Delete. + (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to... + (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec. + (<sur>sadv16qi): Rename to... + (<su>sadv16qi): ... This. Adjust for the above. + * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to... + (<su>sad<vsi2qi>): ... This. Adjust for the above. + * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete. + * config/aarch64/iterators.md (ABAL): Delete. + (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to... + (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec. + (aarch64_<su>abdl2<mode>): New define_expand. + * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete. + * config/aarch64/iterators.md (ABDL2): Delete. + (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to... + (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of + unspec. + * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete. + * config/aarch64/iterators.md (ABDL): Delete. + (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md + (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern. + +2023-04-24 Richard Biener <rguenther@suse.de> + + * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid + last_stmt. + * graphite-scop-detection.cc (single_pred_cond_non_loop_exit): + Likewise. + * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise. + (set_switch_stmt_execution_predicate): Likewise. + (phi_result_unknown_predicate): Likewise. + * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise. + (ipa_analyze_indirect_call_uses): Likewise. + * predict.cc (predict_iv_comparison): Likewise. + (predict_extra_loop_exits): Likewise. + (predict_loops): Likewise. + (tree_predict_by_opcode): Likewise. + * gimple-predicate-analysis.cc (predicate::init_from_control_deps): + Likewise. + * gimple-pretty-print.cc (dump_implicit_edges): Likewise. + * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise. + (replace_phi_edge_with_variable): Likewise. + (two_value_replacement): Likewise. + (value_replacement): Likewise. + (minmax_replacement): Likewise. + (spaceship_replacement): Likewise. + (cond_removal_in_builtin_zero_pattern): Likewise. + * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise. + * tree-ssa-sccvn.cc (vn_phi_eq): Likewise. + (vn_phi_lookup): Likewise. + (vn_phi_insert): Likewise. + * tree-ssa-structalias.cc (compute_points_to_sets): Likewise. + * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block): + Likewise. + (back_threader_profitability::possibly_profitable_path_p): + Likewise. + * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges): + Likewise. + * tree-switch-conversion.cc (pass_convert_switch::execute): + Likewise. + (pass_lower_switch<O0>::execute): Likewise. + * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise. + * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise. + * tree-vect-slp.cc (vect_slp_function): Likewise. + * tree-vect-stmts.cc (cfun_returns): Likewise. + * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise. + (vect_loop_dist_alias_call): Likewise. + +2023-04-24 Richard Biener <rguenther@suse.de> + + * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P. + +2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv-vsetvl.cc + (vector_infos_manager::all_avail_in_compatible_p): New function. + (pass_vsetvl::refine_vsetvls): Optimize vsetvls. + * config/riscv/riscv-vsetvl.h: New function. + +2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function + comment for cleanup_insns. + +2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern. + * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions + with the fault first load property. + 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to... diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index b5f339e560b..6d3fa5c3171 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230424 +20230425 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 5762038ec4f..b7c2a1c7d0b 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,8 @@ +2023-04-24 Patrick Palka <ppalka@redhat.com> + + * cp-tree.h (cp_expr_location): Define here. + * tree.cc (cp_expr_location): Don't define here. + 2023-04-21 Jason Merrill <jason@redhat.com> PR c++/108099 diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index 57a804a0de3..a4f8a31a2f8 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +2023-04-24 Joseph Myers <joseph@codesourcery.com> + + * hr.po, sv.po, zh_CN.po: Update. + 2023-04-12 Joseph Myers <joseph@codesourcery.com> * de.po: Update. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 611be74e81a..338a0d818ef 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,69 @@ +2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * gcc.target/aarch64/sve/acle/general/rev-1.c: New test. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * gcc.dg/tree-ssa/phi-opt-23.c: Update testcase. + * gcc.dg/tree-ssa/phi-opt-24.c: Likewise. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Add -fno-ssa-phiopt. + +2023-04-24 Andrew Pinski <apinski@marvell.com> + + PR tree-optimization/109604 + * gcc.c-torture/compile/pr109604-1.c: New test. + * gcc.c-torture/compile/pr109604-2.c: New test. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/sve-neon-modes_1.c: New test. + * gcc.target/aarch64/sve-neon-modes_2.c: New test. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/109406 + * gcc.target/aarch64/sve2/div-by-bitmask_1.c: Adjust for unpredicated SVE2 + MUL. + * gcc.target/aarch64/sve2/unpred_mul_1.c: New test. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/simd/vabal_combine.c: New test. + +2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/simd/addlv_zext.c: New test. + +2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.target/riscv/rvv/vsetvl/avl_single-102.c: New test. + +2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.target/riscv/rvv/vsetvl/ffload-1.c: New test. + * gcc.target/riscv/rvv/vsetvl/ffload-2.c: New test. + * gcc.target/riscv/rvv/vsetvl/ffload-3.c: New test. + * gcc.target/riscv/rvv/vsetvl/ffload-5.c: New test. + * gcc.target/riscv/rvv/vsetvl/ffload-6.c: New test. + * gcc.target/riscv/rvv/vsetvl/ffload-7.c: New test. + +2023-04-24 liuhongt <hongtao.liu@intel.com> + + PR tree-optimization/109011 + * gcc.target/i386/pr109011-b1.c: New test. + * gcc.target/i386/pr109011-b2.c: New test. + * gcc.target/i386/pr109011-d1.c: New test. + * gcc.target/i386/pr109011-d2.c: New test. + * gcc.target/i386/pr109011-q1.c: New test. + * gcc.target/i386/pr109011-q2.c: New test. + * gcc.target/i386/pr109011-w1.c: New test. + * gcc.target/i386/pr109011-w2.c: New test. + * gcc.target/i386/pr109011-dq1.c: New file. + * gcc.target/i386/pr109011-dq2.c: New file. + 2023-04-23 Gaius Mulley <gaiusmod2@gmail.com> * lib/gm2.exp (gm2_target_compile_default): Conditionally diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 745a4aaf7e7..47b17be3f01 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,12 @@ +2023-04-24 Patrick Palka <ppalka@redhat.com> + + * include/bits/max_size_type.h (__max_diff_type::operator>>=): + Fix propagation of sign bit. + * testsuite/std/ranges/iota/max_size_type.cc: Avoid using the + non-standard 'signed typedef-name'. Add some compile-time tests + for right-shifting a negative __max_diff_type value by more than + one. + 2023-04-19 Patrick Palka <ppalka@redhat.com> Jonathan Wakely <jwakely@redhat.com> |