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authoramker <amker@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-25 05:58:19 +0000
committeramker <amker@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-25 05:58:19 +0000
commitb958105ba5e9ee550fab121244d0916041a8d32d (patch)
tree7e5ec618cbaa2dcadb8ccf67c20a6555c57e517b
parent0c2a1f1d507763fbb19ef2ed3c94cd87977ee81b (diff)
downloadgcc-b958105ba5e9ee550fab121244d0916041a8d32d.tar.gz
* doc/sourcebuild.texi (arm_tune_string_ops_prefer_neon): New.
gcc/testsuite/ChangeLog * lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New. * gcc.target/arm/memset-inline-4.c: Skip for arm_tune_string_ops_prefer_neon. * gcc.target/arm/memset-inline-5.c: Ditto. * gcc.target/arm/memset-inline-6.c: Ditto. * gcc.target/arm/memset-inline-8.c: Ditto. * gcc.target/arm/memset-inline-9.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221651 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/doc/sourcebuild.texi3
-rw-r--r--gcc/testsuite/ChangeLog10
-rw-r--r--gcc/testsuite/gcc.target/arm/memset-inline-4.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/memset-inline-5.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/memset-inline-6.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/memset-inline-8.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/memset-inline-9.c3
-rw-r--r--gcc/testsuite/lib/target-supports.exp8
9 files changed, 30 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0f69aa2def8..e04cf2fb3f0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
2015-03-25 Bin Cheng <bin.cheng@arm.com>
+ * doc/sourcebuild.texi (arm_tune_string_ops_prefer_neon): New.
+
+2015-03-25 Bin Cheng <bin.cheng@arm.com>
+
* config/arm/arm.opt (print_tune_info): New option.
* config/arm/arm.c (arm_print_tune_info): New function.
(arm_file_start): Call arm_print_tune_info.
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 58759178c2b..c6ef40e5db7 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1527,6 +1527,9 @@ Some multilibs may be incompatible with this option.
@item arm_neon
ARM target supports generating NEON instructions.
+@item arm_tune_string_ops_prefer_neon
+Test CPU tune supports inlining string operations with NEON instructions.
+
@item arm_neon_hw
Test system supports executing NEON instructions.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4ec4386a808..a93a880bc91 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2015-03-25 Bin Cheng <bin.cheng@arm.com>
+
+ * lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New.
+ * gcc.target/arm/memset-inline-4.c: Skip for
+ arm_tune_string_ops_prefer_neon.
+ * gcc.target/arm/memset-inline-5.c: Ditto.
+ * gcc.target/arm/memset-inline-6.c: Ditto.
+ * gcc.target/arm/memset-inline-8.c: Ditto.
+ * gcc.target/arm/memset-inline-9.c: Ditto.
+
2015-03-24 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58923
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-4.c b/gcc/testsuite/gcc.target/arm/memset-inline-4.c
index 381a2c2099b..c1db2ee9123 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-4.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-4.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-5.c b/gcc/testsuite/gcc.target/arm/memset-inline-5.c
index 9107d811a94..b9391f59edf 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-5.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-5.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-6.c b/gcc/testsuite/gcc.target/arm/memset-inline-6.c
index fcb2e26a95d..0050af1b13b 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-6.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-6.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-8.c b/gcc/testsuite/gcc.target/arm/memset-inline-8.c
index b6e04773ffc..780e449aa3a 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-8.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-8.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-9.c b/gcc/testsuite/gcc.target/arm/memset-inline-9.c
index be9323aae51..66e18b31c2e 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-9.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-9.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -Os -fno-inline" } */
/* { dg-add-options "arm_neon" } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 6b957dea4d4..b57f545fce5 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2954,6 +2954,14 @@ proc check_effective_target_arm_cortex_m { } {
} "-mthumb"]
}
+# Return 1 if this compilation turns on string_ops_prefer_neon on.
+
+proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
+ return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
+ int foo (void) { return 0; }
+ } "-O2 -mprint-tune-info" ]
+}
+
# Return 1 if the target supports executing NEON instructions, 0
# otherwise. Cache the result.