diff options
| author | ramana <ramana@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-26 09:37:38 +0000 |
|---|---|---|
| committer | ramana <ramana@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-26 09:37:38 +0000 |
| commit | c35d742c78070ed908ee7cb07fc356f04622fe52 (patch) | |
| tree | c7e50f1a6dda9e06081f01793482a4f3041e6728 | |
| parent | 58018be108017ac524caff06dfcf4c7818122d60 (diff) | |
| download | gcc-c35d742c78070ed908ee7cb07fc356f04622fe52.tar.gz | |
2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
vld1Q_dupu64 tests.
2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
* gcc.target/arm/neon/vld1Q_dups64.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189884 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/neon.ml | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c | 2 |
5 files changed, 15 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c0550c5b6e7..55075a407e1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and + vld1Q_dupu64 tests. + 2012-07-26 Oleg Endo <olegendo@gcc.gnu.org> PR target/51244 diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml index 24829f2d501..56869c03c40 100644 --- a/gcc/config/arm/neon.ml +++ b/gcc/config/arm/neon.ml @@ -1445,8 +1445,10 @@ let ops = CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, pf_su_8_32; + (* Treated identically to vld1_dup above as we now + do a single load followed by a duplicate. *) Vldx_dup 1, - [Disassembles_as [Use_operands [| VecArray (2, Dreg); + [Disassembles_as [Use_operands [| VecArray (1, Dreg); CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, [S64; U64]; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 254bf802d8d..bc12992365c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate. + * gcc.target/arm/neon/vld1Q_dups64.c: Likewise. + 2012-07-26 Mikael Morin <mikael@gcc.gnu.org> PR fortran/44354 diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c index 912b93d1d6c..4fceee82eda 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c @@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void) out_int64x2_t = vld1q_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c index 234db407b37..ef0a3828c3e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void) out_uint64x2_t = vld1q_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ |