Fix post-reload predicate mismatch ICE during qt build:

        * config/arc/predicates.md (extend_operand): During/after reload,
        allow const_int_operand.
        * config/arc/arc.md (mulsidi3_700): Use extend_operand predicate.
        (umulsidi3_700): Likewise.  Change operand 2 constraint back to "cL".
        (mulsi3_highpart): Change operand 2 constraint alternatives 2 and 3
        to "i".
        (umulsi3_highpart_i): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208487 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 21 insertions, 8 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 92df4717c35..3c6d9f154be 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2014-03-11  Joern Rennecke  <joern.rennecke@embecosm.com>
+
+	* config/arc/predicates.md (extend_operand): During/after reload,
+	allow const_int_operand.
+	* config/arc/arc.md (mulsidi3_700): Use extend_operand predicate.
+	(umulsidi3_700): Likewise.  Change operand 2 constraint back to "cL".
+	(mulsi3_highpart): Change operand 2 constraint alternatives 2 and 3
+	to "i".
+	(umulsi3_highpart_i): Likewise.
+
 2014-03-11  Richard Biener  <rguenther@suse.de>
 
 	* tree-ssa-structalias.c (get_constraint_for_ptr_offset):
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 4b768222f8c..80f6e338a10 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1888,7 +1888,7 @@
 (define_insn_and_split "mulsidi3_700"
   [(set (match_operand:DI 0 "register_operand" "=&r")
 	(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%c"))
-		 (sign_extend:DI (match_operand:SI 2 "register_operand" "cL"))))]
+		 (sign_extend:DI (match_operand:SI 2 "extend_operand" "cL"))))]
   "TARGET_ARC700 && !TARGET_NOMPY_SET"
   "#"
   "&& reload_completed"
@@ -1911,7 +1911,7 @@
 	 (lshiftrt:DI
 	  (mult:DI
 	   (sign_extend:DI (match_operand:SI 1 "register_operand" "%0,c,  0,c"))
-	   (sign_extend:DI (match_operand:SI 2 "extend_operand"    "c,c,  s,s")))
+	   (sign_extend:DI (match_operand:SI 2 "extend_operand"    "c,c,  i,i")))
 	  (const_int 32))))]
   "TARGET_ARC700 && !TARGET_NOMPY_SET"
   "mpyh%? %0,%1,%2"
@@ -1928,7 +1928,7 @@
 	 (lshiftrt:DI
 	  (mult:DI
 	   (zero_extend:DI (match_operand:SI 1 "register_operand" "%0,c,  0,c"))
-	   (zero_extend:DI (match_operand:SI 2 "extend_operand"    "c,c,  s,s")))
+	   (zero_extend:DI (match_operand:SI 2 "extend_operand"    "c,c,  i,i")))
 	  (const_int 32))))]
   "TARGET_ARC700 && !TARGET_NOMPY_SET"
   "mpyhu%? %0,%1,%2"
@@ -2137,8 +2137,7 @@
 (define_insn_and_split "umulsidi3_700"
   [(set (match_operand:DI 0 "dest_reg_operand" "=&r")
 	(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%c"))
-		 (zero_extend:DI (match_operand:SI 2 "register_operand" "c"))))]
-;;		 (zero_extend:DI (match_operand:SI 2 "register_operand" "rL"))))]
+		 (zero_extend:DI (match_operand:SI 2 "extend_operand" "cL"))))]
   "TARGET_ARC700 && !TARGET_NOMPY_SET"
   "#"
   "reload_completed"
diff --git a/gcc/config/arc/predicates.md b/gcc/config/arc/predicates.md
index 779af443517..81bf6277ee8 100644
--- a/gcc/config/arc/predicates.md
+++ b/gcc/config/arc/predicates.md
@@ -776,10 +776,14 @@
   (and (match_code "reg")
        (match_test "REGNO (op) == (TARGET_BIG_ENDIAN ? 58 : 59)")))
 
+; Unfortunately, we can not allow a const_int_operand before reload, because
+; reload needs a non-void mode to guide it how to reload the inside of a
+; {sign_}extend.
 (define_predicate "extend_operand"
-  (ior (match_test "register_operand (op, mode)")
-       (and (match_test "immediate_operand (op, mode)")
-	    (not (match_test "const_int_operand (op, mode)")))))
+  (ior (match_operand 0 "register_operand")
+       (and (match_operand 0 "immediate_operand")
+	    (ior (not (match_operand 0 "const_int_operand"))
+		 (match_test "reload_in_progress || reload_completed")))))
 
 (define_predicate "millicode_store_operation"
   (match_code "parallel")