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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-04-24 00:17:12 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-04-24 00:17:12 +0000 |
| commit | 6c06b9e4c3161a48a9ea0e406421cc21599ed3e7 (patch) | |
| tree | 652e7cd8e5e705c2c97de56c7f7bbb2ddc321f9e /gcc/ChangeLog | |
| parent | 8d7223f65799b170b1314a35bb98249d419e7215 (diff) | |
| download | gcc-6c06b9e4c3161a48a9ea0e406421cc21599ed3e7.tar.gz | |
Daily bump.
Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d8e0e5aa41c..1890cc23c55 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,45 @@ +2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to... + (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This. + +2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/99195 + * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to... + (aarch64_addp<mode><vczle><vczbe>): ... This. + +2023-04-23 Roger Sayle <roger@nextmovesoftware.com> + + * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to + provide reasonable values for common arithmetic operations and + immediate operands (in several machine modes). + +2023-04-23 Roger Sayle <roger@nextmovesoftware.com> + + * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h + format specifier to output high_part register name of SImode reg. + * config/stormy16/stormy16.md (extendhisi2): New define_insn. + (zero_extendqihi2): Fix lengths, consistent formatting and add + "and Rx,#255" alternative, for documentation purposes. + (zero_extendhisi2): New define_insn. + +2023-04-23 Roger Sayle <roger@nextmovesoftware.com> + + * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement + SImode shifts by two by performing a single bit SImode shift twice. + +2023-04-23 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/109593 + * value-range.cc (frange::operator==): Handle NANs. + +2023-04-23 liuhongt <hongtao.liu@intel.com> + + PR rtl-optimization/108707 + * ira-costs.cc (scan_one_insn): Use NO_REGS instead of + GENERAL_REGS when preferred reg_class is not known. + 2023-04-22 Andrew Pinski <apinski@marvell.com> * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): |