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authorThomas Preud'homme <thomas.preudhomme@linaro.org>2018-12-19 15:01:41 +0000
committerThomas Preud'homme <thopre01@gcc.gnu.org>2018-12-19 15:01:41 +0000
commitec5e681485a3a069ccf0316dacba4ce6fa348c6b (patch)
treef105c2e91ef6c469946b6d847eff2c2502d463cc /gcc/config/arm/arm.c
parenta152954ea4fee516e83b4f75a17818fbc8d555bb (diff)
downloadgcc-ec5e681485a3a069ccf0316dacba4ce6fa348c6b.tar.gz
[ARM] Do softfloat when -mfpu set, -mfloat-abi=softfp
FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is not set. Among other things, it makes some of the cmse tests (eg. gcc.target/arm/cmse/baseline/softfp.c) fail when targeting -march=armv8-m.base -mcmse -mfpu=<something> -mfloat-abi=softfp. This commit adds an extra check for TARGET_32BIT to TARGET_HARD_FLOAT such that it is false on TARGET_THUMB1 targets even when a FPU is specified. 2018-12-19 thomas Preud'homme <thomas.preudhomme@linaro.org> gcc/ * config/arm/arm.h (TARGET_HARD_FLOAT): Restrict to TARGET_32BIT targets. * config/arm/arm.c (output_return_instruction): Only check TARGET_HARD_FLOAT to decide whether FP instructions are available. gcc/testsuite/ * gcc.target/arm/cmse/baseline/softfp.c: Force an FPU. From-SVN: r267270
Diffstat (limited to 'gcc/config/arm/arm.c')
-rw-r--r--gcc/config/arm/arm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 40f0574e32e..509f287aa63 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19872,7 +19872,7 @@ output_return_instruction (rtx operand, bool really_return, bool reverse,
"msr%s\tAPSR_nzcvq, %%|lr", conditional);
output_asm_insn (instr, & operand);
- if (TARGET_HARD_FLOAT && !TARGET_THUMB1)
+ if (TARGET_HARD_FLOAT)
{
/* Clear the cumulative exception-status bits (0-4,7) and the
condition code bits (28-31) of the FPSCR. We need to