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| author | Renlin Li <renlin.li@arm.com> | 2013-12-24 15:34:30 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng@gcc.gnu.org> | 2013-12-24 15:34:30 +0000 |
| commit | c75d51aa81c517b616c2984251a4364d45fbd781 (patch) | |
| tree | efe8a2b5e3fb7d97580bd038c64633ea31bafe74 /gcc/config/arm/constraints.md | |
| parent | 8bebb9532b4724afacf514dfe1f0d127cb7f6f07 (diff) | |
| download | gcc-c75d51aa81c517b616c2984251a4364d45fbd781.tar.gz | |
arm-protos.h (vfp_const_double_for_bits): Declare.
gcc/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
* config/arm/constraints.md (Dp): Define new constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
new predicate.
* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
(vfp3_const_double_for_bits): New function.
* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.
gcc/testsuite/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* gcc.target/arm/fixed_float_conversion.c: New test case.
From-SVN: r206195
Diffstat (limited to 'gcc/config/arm/constraints.md')
| -rw-r--r-- | gcc/config/arm/constraints.md | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index e2a3099e041..59ca4b62440 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -31,7 +31,7 @@ ;; 'H' was previously used for FPA. ;; The following multi-letter normal constraints have been used: -;; in ARM/Thumb-2 state: Da, Db, Dc, Dd, Dn, Dl, DL, Do, Dv, Dy, Di, Dt, Dz +;; in ARM/Thumb-2 state: Da, Db, Dc, Dd, Dn, Dl, DL, Do, Dv, Dy, Di, Dt, Dp, Dz ;; in Thumb-1 state: Pa, Pb, Pc, Pd, Pe ;; in Thumb-2 state: Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py @@ -328,12 +328,18 @@ (and (match_code "const_double") (match_test "TARGET_32BIT && TARGET_VFP_DOUBLE && vfp3_const_double_rtx (op)"))) -(define_constraint "Dt" +(define_constraint "Dt" "@internal In ARM/ Thumb2 a const_double which can be used with a vcvt.f32.s32 with fract bits operation" (and (match_code "const_double") (match_test "TARGET_32BIT && TARGET_VFP && vfp3_const_double_for_fract_bits (op)"))) +(define_constraint "Dp" + "@internal + In ARM/ Thumb2 a const_double which can be used with a vcvt.s32.f32 with bits operation" + (and (match_code "const_double") + (match_test "TARGET_32BIT && TARGET_VFP && vfp3_const_double_for_bits (op)"))) + (define_register_constraint "Ts" "(arm_restrict_it) ? LO_REGS : GENERAL_REGS" "For arm_restrict_it the core registers @code{r0}-@code{r7}. GENERAL_REGS otherwise.") |