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authorJames Greenhalgh <james.greenhalgh@arm.com>2013-09-06 13:21:38 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2013-09-06 13:21:38 +0000
commit594726e49e3716e204648651f8fb55b24adf558d (patch)
tree398d855b0783f107bd55db01bb6105ffe1b654db /gcc/config/arm/cortex-r4.md
parent1c83b6738a30cff17008d301bfe4cdd9ae45e727 (diff)
downloadgcc-594726e49e3716e204648651f8fb55b24adf558d.tar.gz
[Patch ARM] Add "type" attribute to Everything!
gcc/ * config/arm/types.md: Add "no_insn", "multiple" and "untyped" types. * config/arm/arm-fixed.md: Add type attribute to all insn patterns. * config/arm/vfp.md: Add type attribute to all insn patterns. * config/arm/arm.md: Add type attribute to all insn patterns. * config/arm/thumb2.md: Add type attribute to all insn patterns. * config/arm/arm1020e.md: Update with new attributes. * config/arm/arm1026ejs.md: Update with new attributes. * config/arm/arm1136jfs.md: Update with new attributes. * config/arm/arm926ejs.md: Update with new attributes. * config/arm/cortex-a15.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4.md: Update with new attributes. * config/arm/cortex-r4.md: Update with new attributes. * config/arm/fa526.md: Update with new attributes. * config/arm/fa606te.md: Update with new attributes. * config/arm/fa626te.md: Update with new attributes. * config/arm/fa726te.md: Update with new attributes. From-SVN: r202323
Diffstat (limited to 'gcc/config/arm/cortex-r4.md')
-rw-r--r--gcc/config/arm/cortex-r4.md3
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/arm/cortex-r4.md b/gcc/config/arm/cortex-r4.md
index 83745c1b4c7..11a6e6419f5 100644
--- a/gcc/config/arm/cortex-r4.md
+++ b/gcc/config/arm/cortex-r4.md
@@ -101,7 +101,8 @@
(and (eq_attr "tune_cortexr4" "yes")
(eq_attr "type" "alu_shift_reg,alus_shift_reg,\
logic_shift_reg,logics_shift_reg,\
- mov_shift_reg,mvn_shift_reg"))
+ mov_shift_reg,mvn_shift_reg,\
+ multiple,no_insn"))
"cortex_r4_alu_shift_reg")
;; An ALU instruction followed by an ALU instruction with no early dep.