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| author | Mihail Ionescu <mihail.ionescu@arm.com> | 2020-01-15 11:35:21 +0000 |
|---|---|---|
| committer | Mihail Ionescu <mihail.ionescu@arm.com> | 2020-01-16 15:12:01 +0000 |
| commit | 0ab81d9cc73303c376a0014774ab6058d40a25a0 (patch) | |
| tree | 3899d6792e134524941f0f809d93e5fbd2c7f887 /gcc/config/arm/unspecs.md | |
| parent | 1e4f3696a24aa0fcdca2dcadc2c7fc83ba6b2e5d (diff) | |
| download | gcc-0ab81d9cc73303c376a0014774ab6058d40a25a0.tar.gz | |
[PATCH, GCC/ARM, 8/10] Do lazy store & load inline when calling nscall function
This patch adds two new patterns for the VLSTM and VLLDM instructions.
cmse_nonsecure_call_inline_register_clear is then modified to
generate VLSTM and VLLDM respectively before and after calls to
functions with the cmse_nonsecure_call attribute in order to have lazy
saving, clearing and restoring of VFP registers. Since these
instructions do not do writeback of the base register, the stack is adjusted
prior the lazy store and after the lazy load with appropriate frame
debug notes to describe the effect on the CFA register.
As with CLRM, VSCCLRM and VSTR/VLDR, the instruction is modeled as an
unspecified operation to the memory pointed to by the base register.
*** gcc/ChangeLog ***
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
(cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
variable as true when floating-point ABI is not hard. Replace
check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
Generate VLSTM and VLLDM instruction respectively before and
after a function call to cmse_nonsecure_call function.
* config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
(VUNSPEC_VLLDM): Likewise.
* config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
(lazy_load_multiple_insn): Likewise.
*** gcc/testsuite/ChangeLog ***
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Add check for VLSTM and
VLLDM.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c: Likewise.
Diffstat (limited to 'gcc/config/arm/unspecs.md')
| -rw-r--r-- | gcc/config/arm/unspecs.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index 22a14919230..8f4a705f43e 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -243,6 +243,10 @@ VUNSPEC_CLRM_APSR ; Represent the clearing of APSR with clrm instruction. VUNSPEC_VSCCLRM_VPR ; Represent the clearing of VPR with vscclrm ; instruction. + VUNSPEC_VLSTM ; Represent the lazy store multiple with vlstm + ; instruction. + VUNSPEC_VLLDM ; Represent the lazy load multiple with vlldm + ; instruction. ]) ;; Enumerators for NEON unspecs. |