summaryrefslogtreecommitdiff
path: root/gcc/config/i386/i386.md
diff options
context:
space:
mode:
authorJakub Jelinek <jakub@redhat.com>2020-01-23 12:39:13 +0100
committerJakub Jelinek <jakub@redhat.com>2020-01-23 12:39:13 +0100
commit9592f639ff4655203f1cffb7c6752696e2721fb0 (patch)
tree949dba7cd858fa9cea9afc9746505573a3054489 /gcc/config/i386/i386.md
parent8a990ffafaaa18981c6e91d4ed88f05ed74c5f3f (diff)
downloadgcc-9592f639ff4655203f1cffb7c6752696e2721fb0.tar.gz
i386: Use bzhi for x & ((1 << y) - 1) or x & ((1U << y) - 1) [PR93346]
The bzhi patterns are quite complicated because they need to accurately describe the behavior of the instruction for all input values. The following patterns are simple and make bzhi recognizable even for cases where not all input values are valid, because the user used a shift, in which case the low 8 bit of the last operand need to be in between 0 and precision-1. 2020-01-23 Jakub Jelinek <jakub@redhat.com> PR target/93346 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3): New define_insn patterns. * gcc.target/i386/pr93346.c: New test.
Diffstat (limited to 'gcc/config/i386/i386.md')
-rw-r--r--gcc/config/i386/i386.md29
1 files changed, 29 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6c674aaea5b..b5b53bbcfaa 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14304,6 +14304,35 @@
(set_attr "prefix" "vex")
(set_attr "mode" "<MODE>")])
+(define_insn "*bmi2_bzhi_<mode>3_2"
+ [(set (match_operand:SWI48 0 "register_operand" "=r")
+ (and:SWI48
+ (plus:SWI48
+ (ashift:SWI48 (const_int 1)
+ (match_operand:QI 2 "register_operand" "r"))
+ (const_int -1))
+ (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_BMI2"
+ "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
+ [(set_attr "type" "bitmanip")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "<MODE>")])
+
+(define_insn "*bmi2_bzhi_<mode>3_3"
+ [(set (match_operand:SWI48 0 "register_operand" "=r")
+ (and:SWI48
+ (not:SWI48
+ (ashift:SWI48 (const_int -1)
+ (match_operand:QI 2 "register_operand" "r")))
+ (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_BMI2"
+ "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
+ [(set_attr "type" "bitmanip")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "<MODE>")])
+
(define_insn "bmi2_pdep_<mode>3"
[(set (match_operand:SWI48 0 "register_operand" "=r")
(unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")