summaryrefslogtreecommitdiff
path: root/gcc/config/ia64
diff options
context:
space:
mode:
authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-29 12:02:45 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-29 12:02:45 +0000
commit3754d04677134616a06eabd18d3f4476e5f5ec23 (patch)
tree9a57dad975c942ce6765490066e2492bc1ce59e9 /gcc/config/ia64
parentced116009c07993af907d1b21b97f68ea6682cd3 (diff)
downloadgcc-3754d04677134616a06eabd18d3f4476e5f5ec23.tar.gz
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c, gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c: Remove redundant enum from machine_mode. gcc/c-family/ * c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant enum from machine_mode. gcc/c/ * c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from machine_mode. gcc/cp/ * constexpr.c: Remove redundant enum from machine_mode. gcc/fortran/ * trans-types.c, trans-types.h: Remove redundant enum from machine_mode. gcc/go/ * go-lang.c: Remove redundant enum from machine_mode. gcc/java/ * builtins.c, java-tree.h, typeck.c: Remove redundant enum from machine_mode. gcc/lto/ * lto-lang.c: Remove redundant enum from machine_mode. gcc/ * addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c, builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h, cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c, config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md, config/aarch64/aarch64.c, config/aarch64/aarch64.h, config/aarch64/aarch64.md, config/alpha/alpha-protos.h, config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c, config/arc/arc.h, config/arc/predicates.md, config/arm/aarch-common-protos.h, config/arm/aarch-common.c, config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h, config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md, config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c, config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c, config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md, config/cr16/cr16-protos.h, config/cr16/cr16.c, config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md, config/darwin-protos.h, config/darwin.c, config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c, config/epiphany/epiphany.md, config/fr30/fr30.c, config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md, config/h8300/h8300-protos.h, config/h8300/h8300.c, config/i386/i386-builtin-types.awk, config/i386/i386-protos.h, config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md, config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h, config/ia64/ia64.c, config/iq2000/iq2000-protos.h, config/iq2000/iq2000.c, config/iq2000/iq2000.md, config/lm32/lm32-protos.h, config/lm32/lm32.c, config/m32c/m32c-protos.h, config/m32c/m32c.c, config/m32r/m32r-protos.h, config/m32r/m32r.c, config/m68k/m68k-protos.h, config/m68k/m68k.c, config/mcore/mcore-protos.h, config/mcore/mcore.c, config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c, config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c, config/mips/mips-protos.h, config/mips/mips.c, config/mmix/mmix-protos.h, config/mmix/mmix.c, config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c, config/moxie/moxie.c, config/msp430/msp430-protos.h, config/msp430/msp430.c, config/nds32/nds32-cost.c, config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c, config/nds32/nds32-protos.h, config/nds32/nds32.c, config/nios2/nios2-protos.h, config/nios2/nios2.c, config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h, config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c, config/rs6000/altivec.md, config/rs6000/rs6000-c.c, config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c, config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c, config/s390/predicates.md, config/s390/s390-protos.h, config/s390/s390.c, config/s390/s390.h, config/s390/s390.md, config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c, config/sh/sh.md, config/sparc/predicates.md, config/sparc/sparc-protos.h, config/sparc/sparc.c, config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c, config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c, config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c, config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h, config/tilepro/tilepro.c, config/v850/v850-protos.h, config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h, config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h, config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h, dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi, doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c, dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h, except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c, fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h, fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c, genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c, graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c, internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c, ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h, libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c, lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c, lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h, output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h, recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h, rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c, sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c, simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def, targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c, tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c, tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c, tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c, tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c, tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c, tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c, tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c, tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c, tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c, var-tracking.c, varasm.c: Remove redundant enum from machine_mode. gcc/ * gengtype.c (main): Treat machine_mode as a scalar typedef. * genmodes.c (emit_insn_modes_h): Hide inline functions if USED_FOR_TARGET. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216834 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64')
-rw-r--r--gcc/config/ia64/ia64-protos.h10
-rw-r--r--gcc/config/ia64/ia64.c156
2 files changed, 83 insertions, 83 deletions
diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h
index efefb41dc28..47c52d57696 100644
--- a/gcc/config/ia64/ia64-protos.h
+++ b/gcc/config/ia64/ia64-protos.h
@@ -35,10 +35,10 @@ extern int addp4_optimize_ok (rtx, rtx);
extern void ia64_emit_cond_move (rtx, rtx, rtx);
extern int ia64_depz_field_mask (rtx, rtx);
extern void ia64_split_tmode_move (rtx[]);
-extern bool ia64_expand_movxf_movrf (enum machine_mode, rtx[]);
+extern bool ia64_expand_movxf_movrf (machine_mode, rtx[]);
extern void ia64_expand_compare (rtx *, rtx *, rtx *);
extern void ia64_expand_vecint_cmov (rtx[]);
-extern bool ia64_expand_vecint_minmax (enum rtx_code, enum machine_mode, rtx[]);
+extern bool ia64_expand_vecint_minmax (enum rtx_code, machine_mode, rtx[]);
extern void ia64_unpack_assemble (rtx, rtx, rtx, bool);
extern void ia64_expand_unpack (rtx [], bool, bool);
extern void ia64_expand_widen_sum (rtx[], bool);
@@ -57,7 +57,7 @@ extern bool ia64_expand_load_address (rtx, rtx);
extern int ia64_hard_regno_rename_ok (int, int);
extern enum reg_class ia64_secondary_reload_class (enum reg_class,
- enum machine_mode, rtx);
+ machine_mode, rtx);
extern const char *get_bundle_name (int);
extern const char *output_probe_stack_range (rtx, rtx);
@@ -68,7 +68,7 @@ extern void ia64_expand_vec_setv2sf (rtx op[3]);
#ifdef TREE_CODE
#ifdef RTX_CODE
-extern rtx ia64_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
+extern rtx ia64_expand_builtin (tree, rtx, rtx, machine_mode, int);
extern rtx ia64_va_arg (tree, tree);
#endif /* RTX_CODE */
@@ -91,7 +91,7 @@ extern void ia64_split_return_addr_rtx (rtx);
#ifdef ARGS_SIZE_RTX
/* expr.h defines ARGS_SIZE_RTX and `enum direction'. */
-extern enum direction ia64_hpux_function_arg_padding (enum machine_mode, const_tree);
+extern enum direction ia64_hpux_function_arg_padding (machine_mode, const_tree);
#endif /* ARGS_SIZE_RTX */
extern void ia64_hpux_handle_builtin_pragma (struct cpp_reader *);
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 275bcd8946b..beb9e606c05 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -188,7 +188,7 @@ static void ia64_init_sched_context (void *, bool);
static void ia64_set_sched_context (void *);
static void ia64_clear_sched_context (void *);
static void ia64_free_sched_context (void *);
-static int ia64_mode_to_int (enum machine_mode);
+static int ia64_mode_to_int (machine_mode);
static void ia64_set_sched_flags (spec_info_t);
static ds_t ia64_get_insn_spec_ds (rtx_insn *);
static ds_t ia64_get_insn_checked_ds (rtx_insn *);
@@ -215,29 +215,29 @@ static rtx gen_fr_restore_x (rtx, rtx, rtx);
static void ia64_option_override (void);
static bool ia64_can_eliminate (const int, const int);
-static enum machine_mode hfa_element_mode (const_tree, bool);
-static void ia64_setup_incoming_varargs (cumulative_args_t, enum machine_mode,
+static machine_mode hfa_element_mode (const_tree, bool);
+static void ia64_setup_incoming_varargs (cumulative_args_t, machine_mode,
tree, int *, int);
-static int ia64_arg_partial_bytes (cumulative_args_t, enum machine_mode,
+static int ia64_arg_partial_bytes (cumulative_args_t, machine_mode,
tree, bool);
-static rtx ia64_function_arg_1 (cumulative_args_t, enum machine_mode,
+static rtx ia64_function_arg_1 (cumulative_args_t, machine_mode,
const_tree, bool, bool);
-static rtx ia64_function_arg (cumulative_args_t, enum machine_mode,
+static rtx ia64_function_arg (cumulative_args_t, machine_mode,
const_tree, bool);
static rtx ia64_function_incoming_arg (cumulative_args_t,
- enum machine_mode, const_tree, bool);
-static void ia64_function_arg_advance (cumulative_args_t, enum machine_mode,
+ machine_mode, const_tree, bool);
+static void ia64_function_arg_advance (cumulative_args_t, machine_mode,
const_tree, bool);
-static unsigned int ia64_function_arg_boundary (enum machine_mode,
+static unsigned int ia64_function_arg_boundary (machine_mode,
const_tree);
static bool ia64_function_ok_for_sibcall (tree, tree);
static bool ia64_return_in_memory (const_tree, const_tree);
static rtx ia64_function_value (const_tree, const_tree, bool);
-static rtx ia64_libcall_value (enum machine_mode, const_rtx);
+static rtx ia64_libcall_value (machine_mode, const_rtx);
static bool ia64_function_value_regno_p (const unsigned int);
-static int ia64_register_move_cost (enum machine_mode, reg_class_t,
+static int ia64_register_move_cost (machine_mode, reg_class_t,
reg_class_t);
-static int ia64_memory_move_cost (enum machine_mode mode, reg_class_t,
+static int ia64_memory_move_cost (machine_mode mode, reg_class_t,
bool);
static bool ia64_rtx_costs (rtx, int, int, int, int *, bool);
static int ia64_unspec_may_trap_p (const_rtx, unsigned);
@@ -303,7 +303,7 @@ static void ia64_globalize_decl_name (FILE *, tree);
static int ia64_hpux_reloc_rw_mask (void) ATTRIBUTE_UNUSED;
static int ia64_reloc_rw_mask (void) ATTRIBUTE_UNUSED;
-static section *ia64_select_rtx_section (enum machine_mode, rtx,
+static section *ia64_select_rtx_section (machine_mode, rtx,
unsigned HOST_WIDE_INT);
static void ia64_output_dwarf_dtprel (FILE *, int, rtx)
ATTRIBUTE_UNUSED;
@@ -318,7 +318,7 @@ static void ia64_vms_init_libfuncs (void)
ATTRIBUTE_UNUSED;
static void ia64_soft_fp_init_libfuncs (void)
ATTRIBUTE_UNUSED;
-static bool ia64_vms_valid_pointer_mode (enum machine_mode mode)
+static bool ia64_vms_valid_pointer_mode (machine_mode mode)
ATTRIBUTE_UNUSED;
static tree ia64_vms_common_object_attribute (tree *, tree, tree, int, bool *)
ATTRIBUTE_UNUSED;
@@ -328,29 +328,29 @@ static tree ia64_handle_version_id_attribute (tree *, tree, tree, int, bool *);
static void ia64_encode_section_info (tree, rtx, int);
static rtx ia64_struct_value_rtx (tree, int);
static tree ia64_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *);
-static bool ia64_scalar_mode_supported_p (enum machine_mode mode);
-static bool ia64_vector_mode_supported_p (enum machine_mode mode);
-static bool ia64_libgcc_floating_mode_supported_p (enum machine_mode mode);
-static bool ia64_legitimate_constant_p (enum machine_mode, rtx);
-static bool ia64_legitimate_address_p (enum machine_mode, rtx, bool);
-static bool ia64_cannot_force_const_mem (enum machine_mode, rtx);
+static bool ia64_scalar_mode_supported_p (machine_mode mode);
+static bool ia64_vector_mode_supported_p (machine_mode mode);
+static bool ia64_libgcc_floating_mode_supported_p (machine_mode mode);
+static bool ia64_legitimate_constant_p (machine_mode, rtx);
+static bool ia64_legitimate_address_p (machine_mode, rtx, bool);
+static bool ia64_cannot_force_const_mem (machine_mode, rtx);
static const char *ia64_mangle_type (const_tree);
static const char *ia64_invalid_conversion (const_tree, const_tree);
static const char *ia64_invalid_unary_op (int, const_tree);
static const char *ia64_invalid_binary_op (int, const_tree, const_tree);
-static enum machine_mode ia64_c_mode_for_suffix (char);
+static machine_mode ia64_c_mode_for_suffix (char);
static void ia64_trampoline_init (rtx, tree, rtx);
static void ia64_override_options_after_change (void);
-static bool ia64_member_type_forces_blk (const_tree, enum machine_mode);
+static bool ia64_member_type_forces_blk (const_tree, machine_mode);
static tree ia64_builtin_decl (unsigned, bool);
static reg_class_t ia64_preferred_reload_class (rtx, reg_class_t);
-static enum machine_mode ia64_get_reg_raw_mode (int regno);
+static machine_mode ia64_get_reg_raw_mode (int regno);
static section * ia64_hpux_function_section (tree, enum node_frequency,
bool, bool);
-static bool ia64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
+static bool ia64_vectorize_vec_perm_const_ok (machine_mode vmode,
const unsigned char *sel);
#define MAX_VECT_LEN 8
@@ -359,7 +359,7 @@ struct expand_vec_perm_d
{
rtx target, op0, op1;
unsigned char perm[MAX_VECT_LEN];
- enum machine_mode vmode;
+ machine_mode vmode;
unsigned char nelt;
bool one_operand_p;
bool testing_p;
@@ -1002,7 +1002,7 @@ ia64_legitimate_address_disp (const_rtx reg, const_rtx disp, bool strict)
/* Implement TARGET_LEGITIMATE_ADDRESS_P. */
static bool
-ia64_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
+ia64_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
rtx x, bool strict)
{
if (ia64_legitimate_address_reg (x, strict))
@@ -1024,7 +1024,7 @@ ia64_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
field in an instruction. */
static bool
-ia64_legitimate_constant_p (enum machine_mode mode, rtx x)
+ia64_legitimate_constant_p (machine_mode mode, rtx x)
{
switch (GET_CODE (x))
{
@@ -1079,7 +1079,7 @@ ia64_legitimate_constant_p (enum machine_mode mode, rtx x)
/* Don't allow TLS addresses to get spilled to memory. */
static bool
-ia64_cannot_force_const_mem (enum machine_mode mode, rtx x)
+ia64_cannot_force_const_mem (machine_mode mode, rtx x)
{
if (mode == RFmode)
return true;
@@ -1286,7 +1286,7 @@ ia64_expand_tls_address (enum tls_model tls_kind, rtx op0, rtx op1,
rtx
ia64_expand_move (rtx op0, rtx op1)
{
- enum machine_mode mode = GET_MODE (op0);
+ machine_mode mode = GET_MODE (op0);
if (!reload_in_progress && !reload_completed && !ia64_move_ok (op0, op1))
op1 = force_reg (mode, op1);
@@ -1613,7 +1613,7 @@ ia64_split_tmode_move (rtx operands[])
we see something like the above, we spill the inner register to memory. */
static rtx
-spill_xfmode_rfmode_operand (rtx in, int force, enum machine_mode mode)
+spill_xfmode_rfmode_operand (rtx in, int force, machine_mode mode)
{
if (GET_CODE (in) == SUBREG
&& GET_MODE (SUBREG_REG (in)) == TImode
@@ -1638,7 +1638,7 @@ spill_xfmode_rfmode_operand (rtx in, int force, enum machine_mode mode)
DONE. */
bool
-ia64_expand_movxf_movrf (enum machine_mode mode, rtx operands[])
+ia64_expand_movxf_movrf (machine_mode mode, rtx operands[])
{
rtx op0 = operands[0];
@@ -1861,7 +1861,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
been reversed, and so the sense of the comparison should be inverted. */
static bool
-ia64_expand_vecint_compare (enum rtx_code code, enum machine_mode mode,
+ia64_expand_vecint_compare (enum rtx_code code, machine_mode mode,
rtx dest, rtx op0, rtx op1)
{
bool negate = false;
@@ -1952,7 +1952,7 @@ ia64_expand_vecint_compare (enum rtx_code code, enum machine_mode mode,
void
ia64_expand_vecint_cmov (rtx operands[])
{
- enum machine_mode mode = GET_MODE (operands[0]);
+ machine_mode mode = GET_MODE (operands[0]);
enum rtx_code code = GET_CODE (operands[3]);
bool negate;
rtx cmp, x, ot, of;
@@ -2002,7 +2002,7 @@ ia64_expand_vecint_cmov (rtx operands[])
/* Emit an integral vector min or max operation. Return true if all done. */
bool
-ia64_expand_vecint_minmax (enum rtx_code code, enum machine_mode mode,
+ia64_expand_vecint_minmax (enum rtx_code code, machine_mode mode,
rtx operands[])
{
rtx xops[6];
@@ -2059,7 +2059,7 @@ ia64_expand_vecint_minmax (enum rtx_code code, enum machine_mode mode,
void
ia64_unpack_assemble (rtx out, rtx lo, rtx hi, bool highp)
{
- enum machine_mode vmode = GET_MODE (lo);
+ machine_mode vmode = GET_MODE (lo);
unsigned int i, high, nelt = GET_MODE_NUNITS (vmode);
struct expand_vec_perm_d d;
bool ok;
@@ -2088,7 +2088,7 @@ ia64_unpack_assemble (rtx out, rtx lo, rtx hi, bool highp)
static rtx
ia64_unpack_sign (rtx vec, bool unsignedp)
{
- enum machine_mode mode = GET_MODE (vec);
+ machine_mode mode = GET_MODE (vec);
rtx zero = CONST0_RTX (mode);
if (unsignedp)
@@ -2119,7 +2119,7 @@ ia64_expand_unpack (rtx operands[3], bool unsignedp, bool highp)
void
ia64_expand_widen_sum (rtx operands[3], bool unsignedp)
{
- enum machine_mode wmode;
+ machine_mode wmode;
rtx l, h, t, sign;
sign = ia64_unpack_sign (operands[1], unsignedp);
@@ -2336,7 +2336,7 @@ void
ia64_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
rtx old_dst, rtx new_dst, enum memmodel model)
{
- enum machine_mode mode = GET_MODE (mem);
+ machine_mode mode = GET_MODE (mem);
rtx old_reg, new_reg, cmp_reg, ar_ccv, label;
enum insn_code icode;
@@ -4503,7 +4503,7 @@ ia64_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
We generate the actual spill instructions during prologue generation. */
static void
-ia64_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode,
+ia64_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode,
tree type, int * pretend_size,
int second_time ATTRIBUTE_UNUSED)
{
@@ -4532,11 +4532,11 @@ ia64_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode,
have already decided to pass them by reference. Top-level zero-sized
aggregates are excluded because our parallels crash the middle-end. */
-static enum machine_mode
+static machine_mode
hfa_element_mode (const_tree type, bool nested)
{
- enum machine_mode element_mode = VOIDmode;
- enum machine_mode mode;
+ machine_mode element_mode = VOIDmode;
+ machine_mode mode;
enum tree_code code = TREE_CODE (type);
int know_element_mode = 0;
tree t;
@@ -4611,7 +4611,7 @@ hfa_element_mode (const_tree type, bool nested)
/* Return the number of words required to hold a quantity of TYPE and MODE
when passed as an argument. */
static int
-ia64_function_arg_words (const_tree type, enum machine_mode mode)
+ia64_function_arg_words (const_tree type, machine_mode mode)
{
int words;
@@ -4658,7 +4658,7 @@ ia64_function_arg_offset (const CUMULATIVE_ARGS *cum,
registers. */
static rtx
-ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
+ia64_function_arg_1 (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named, bool incoming)
{
const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
@@ -4666,7 +4666,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
int basereg = (incoming ? GR_ARG_FIRST : AR_ARG_FIRST);
int words = ia64_function_arg_words (type, mode);
int offset = ia64_function_arg_offset (cum, type, words);
- enum machine_mode hfa_mode = VOIDmode;
+ machine_mode hfa_mode = VOIDmode;
/* For OPEN VMS, emit the instruction setting up the argument register here,
when we know this will be together with the other arguments setup related
@@ -4753,7 +4753,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
for (; offset < byte_size && int_regs < MAX_ARGUMENT_SLOTS; i++)
{
- enum machine_mode gr_mode = DImode;
+ machine_mode gr_mode = DImode;
unsigned int gr_size;
/* If we have an odd 4 byte hunk because we ran out of FR regs,
@@ -4833,7 +4833,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
else
{
/* See comment above. */
- enum machine_mode inner_mode =
+ machine_mode inner_mode =
(BYTES_BIG_ENDIAN && mode == SFmode) ? DImode : mode;
rtx fp_reg = gen_rtx_EXPR_LIST (VOIDmode,
@@ -4853,7 +4853,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
/* Implement TARGET_FUNCION_ARG target hook. */
static rtx
-ia64_function_arg (cumulative_args_t cum, enum machine_mode mode,
+ia64_function_arg (cumulative_args_t cum, machine_mode mode,
const_tree type, bool named)
{
return ia64_function_arg_1 (cum, mode, type, named, false);
@@ -4863,7 +4863,7 @@ ia64_function_arg (cumulative_args_t cum, enum machine_mode mode,
static rtx
ia64_function_incoming_arg (cumulative_args_t cum,
- enum machine_mode mode,
+ machine_mode mode,
const_tree type, bool named)
{
return ia64_function_arg_1 (cum, mode, type, named, true);
@@ -4874,7 +4874,7 @@ ia64_function_incoming_arg (cumulative_args_t cum,
in memory. */
static int
-ia64_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode,
+ia64_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
tree type, bool named ATTRIBUTE_UNUSED)
{
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
@@ -4900,7 +4900,7 @@ ia64_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode,
/* Return ivms_arg_type based on machine_mode. */
static enum ivms_arg_type
-ia64_arg_type (enum machine_mode mode)
+ia64_arg_type (machine_mode mode)
{
switch (mode)
{
@@ -4917,13 +4917,13 @@ ia64_arg_type (enum machine_mode mode)
ia64_function_arg. */
static void
-ia64_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
+ia64_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named)
{
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
int words = ia64_function_arg_words (type, mode);
int offset = ia64_function_arg_offset (cum, type, words);
- enum machine_mode hfa_mode = VOIDmode;
+ machine_mode hfa_mode = VOIDmode;
/* If all arg slots are already full, then there is nothing to do. */
if (cum->words >= MAX_ARGUMENT_SLOTS)
@@ -5015,7 +5015,7 @@ ia64_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
even though their normal alignment is 8 bytes. See ia64_function_arg. */
static unsigned int
-ia64_function_arg_boundary (enum machine_mode mode, const_tree type)
+ia64_function_arg_boundary (machine_mode mode, const_tree type)
{
if (mode == TFmode && TARGET_HPUX && TARGET_ILP32)
return PARM_BOUNDARY * 2;
@@ -5089,8 +5089,8 @@ ia64_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
static bool
ia64_return_in_memory (const_tree valtype, const_tree fntype ATTRIBUTE_UNUSED)
{
- enum machine_mode mode;
- enum machine_mode hfa_mode;
+ machine_mode mode;
+ machine_mode hfa_mode;
HOST_WIDE_INT byte_size;
mode = TYPE_MODE (valtype);
@@ -5127,8 +5127,8 @@ ia64_function_value (const_tree valtype,
const_tree fn_decl_or_type,
bool outgoing ATTRIBUTE_UNUSED)
{
- enum machine_mode mode;
- enum machine_mode hfa_mode;
+ machine_mode mode;
+ machine_mode hfa_mode;
int unsignedp;
const_tree func = fn_decl_or_type;
@@ -5216,7 +5216,7 @@ ia64_function_value (const_tree valtype,
/* Worker function for TARGET_LIBCALL_VALUE. */
static rtx
-ia64_libcall_value (enum machine_mode mode,
+ia64_libcall_value (machine_mode mode,
const_rtx fun ATTRIBUTE_UNUSED)
{
return gen_rtx_REG (mode,
@@ -5678,7 +5678,7 @@ ia64_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
one in class TO, using MODE. */
static int
-ia64_register_move_cost (enum machine_mode mode, reg_class_t from,
+ia64_register_move_cost (machine_mode mode, reg_class_t from,
reg_class_t to)
{
/* ADDL_REGS is the same as GR_REGS for movement purposes. */
@@ -5750,7 +5750,7 @@ ia64_register_move_cost (enum machine_mode mode, reg_class_t from,
memory. */
static int
-ia64_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
+ia64_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t rclass,
bool in ATTRIBUTE_UNUSED)
{
@@ -5804,7 +5804,7 @@ ia64_preferred_reload_class (rtx x, reg_class_t rclass)
enum reg_class
ia64_secondary_reload_class (enum reg_class rclass,
- enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
+ machine_mode mode ATTRIBUTE_UNUSED, rtx x)
{
int regno = -1;
@@ -7876,7 +7876,7 @@ get_spec_load_gen_function (ds_t ts, int mode_no)
return gen_ld[mode_no];
}
-/* Constants that help mapping 'enum machine_mode' to int. */
+/* Constants that help mapping 'machine_mode' to int. */
enum SPEC_MODES
{
SPEC_MODE_INVALID = -1,
@@ -7894,7 +7894,7 @@ enum
/* Return index of the MODE. */
static int
-ia64_mode_to_int (enum machine_mode mode)
+ia64_mode_to_int (machine_mode mode)
{
switch (mode)
{
@@ -10443,7 +10443,7 @@ ia64_init_builtins (void)
rtx
ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
- enum machine_mode mode ATTRIBUTE_UNUSED,
+ machine_mode mode ATTRIBUTE_UNUSED,
int ignore ATTRIBUTE_UNUSED)
{
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
@@ -10467,7 +10467,7 @@ ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
case IA64_BUILTIN_INFQ:
case IA64_BUILTIN_HUGE_VALQ:
{
- enum machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp));
+ machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp));
REAL_VALUE_TYPE inf;
rtx tmp;
@@ -10509,7 +10509,7 @@ ia64_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
most significant bits of the stack slot. */
enum direction
-ia64_hpux_function_arg_padding (enum machine_mode mode, const_tree type)
+ia64_hpux_function_arg_padding (machine_mode mode, const_tree type)
{
/* Exception to normal case for structures/unions/etc. */
@@ -10676,7 +10676,7 @@ ia64_soft_fp_init_libfuncs (void)
}
static bool
-ia64_vms_valid_pointer_mode (enum machine_mode mode)
+ia64_vms_valid_pointer_mode (machine_mode mode)
{
return (mode == SImode || mode == DImode);
}
@@ -10703,7 +10703,7 @@ ia64_reloc_rw_mask (void)
is to honor small data. */
static section *
-ia64_select_rtx_section (enum machine_mode mode, rtx x,
+ia64_select_rtx_section (machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align)
{
if (GET_MODE_SIZE (mode) > 0
@@ -10912,7 +10912,7 @@ ia64_struct_value_rtx (tree fntype,
}
static bool
-ia64_scalar_mode_supported_p (enum machine_mode mode)
+ia64_scalar_mode_supported_p (machine_mode mode)
{
switch (mode)
{
@@ -10938,7 +10938,7 @@ ia64_scalar_mode_supported_p (enum machine_mode mode)
}
static bool
-ia64_vector_mode_supported_p (enum machine_mode mode)
+ia64_vector_mode_supported_p (machine_mode mode)
{
switch (mode)
{
@@ -10958,7 +10958,7 @@ ia64_vector_mode_supported_p (enum machine_mode mode)
/* Implement TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P. */
static bool
-ia64_libgcc_floating_mode_supported_p (enum machine_mode mode)
+ia64_libgcc_floating_mode_supported_p (machine_mode mode)
{
switch (mode)
{
@@ -11175,7 +11175,7 @@ ia64_handle_version_id_attribute (tree *node ATTRIBUTE_UNUSED,
/* Target hook for c_mode_for_suffix. */
-static enum machine_mode
+static machine_mode
ia64_c_mode_for_suffix (char suffix)
{
if (suffix == 'q')
@@ -11214,7 +11214,7 @@ ia64_dconst_0_375 (void)
return ia64_dconst_0_375_rtx;
}
-static enum machine_mode
+static machine_mode
ia64_get_reg_raw_mode (int regno)
{
if (FR_REGNO_P (regno))
@@ -11226,7 +11226,7 @@ ia64_get_reg_raw_mode (int regno)
anymore. */
bool
-ia64_member_type_forces_blk (const_tree, enum machine_mode mode)
+ia64_member_type_forces_blk (const_tree, machine_mode mode)
{
return TARGET_HPUX && mode == TFmode;
}
@@ -11273,7 +11273,7 @@ static bool
expand_vselect_vconcat (rtx target, rtx op0, rtx op1,
const unsigned char *perm, unsigned nelt)
{
- enum machine_mode v2mode;
+ machine_mode v2mode;
rtx x;
v2mode = GET_MODE_2XWIDER_MODE (GET_MODE (op0));
@@ -11708,7 +11708,7 @@ ia64_expand_vec_perm_const (rtx operands[4])
/* Implement targetm.vectorize.vec_perm_const_ok. */
static bool
-ia64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
+ia64_vectorize_vec_perm_const_ok (machine_mode vmode,
const unsigned char *sel)
{
struct expand_vec_perm_d d;
@@ -11781,7 +11781,7 @@ void
ia64_expand_vec_perm_even_odd (rtx target, rtx op0, rtx op1, int odd)
{
struct expand_vec_perm_d d;
- enum machine_mode vmode = GET_MODE (target);
+ machine_mode vmode = GET_MODE (target);
unsigned int i, nelt = GET_MODE_NUNITS (vmode);
bool ok;