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author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-04 04:11:52 +0000 |
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committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-04 04:11:52 +0000 |
commit | c910419dffff2133d4f4e28dfe6312bcf13e825e (patch) | |
tree | ff5c96fd74ddbd915ef3a28100ba32c1e32246dc /gcc/config/m32c/bitops.md | |
parent | e1db7b202fcfc7de631a70a429a74865b45d925f (diff) | |
download | gcc-c910419dffff2133d4f4e28dfe6312bcf13e825e.tar.gz |
* config/m32c/bitops.md, config/m32c/jump.md,
config/m32c/m32c.c, config/m32c/m32c.h, config/m32r/m32r.c,
config/m32r/m32r.h, config/m32r/m32r.md,
config/m32r/predicates.md, config/m68hc11/larith.asm,
config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h,
config/m68k/m68k.h, config/mcore/mcore.md, config/mips/4k.md,
config/mips/mips-protos.h, config/mips/mips.c,
config/mips/mips.h, config/mips/mips.md, config/mips/mips16.S,
config/mn10300/mn10300.h, config/mn10300/predicates.md,
config/mt/mt.c, config/mt/mt.h, config/mt/mt.md: Follow
spelling conventions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@121565 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32c/bitops.md')
-rw-r--r-- | gcc/config/m32c/bitops.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/m32c/bitops.md b/gcc/config/m32c/bitops.md index 87322d38629..33a7058e936 100644 --- a/gcc/config/m32c/bitops.md +++ b/gcc/config/m32c/bitops.md @@ -31,7 +31,7 @@ ; On the M32C, "address" for bit instructions is a regular address, ; and the bit number is stored in a separate field. Thus, we can let ; gcc do more interesting things. However, the M32C cannot set all -; the bits in a 16 bit register, which the R8C/M16C can do. +; the bits in a 16-bit register, which the R8C/M16C can do. ; However, it all means that we end up with two sets of patterns, one ; for each chip. |