* config/mcore/mcore.h (target_flags, HARDLIT_BIT, ALIGN8_BIT, DIV_BIT)

	(RELAX_IMM_BIT, W_FIELD_BIT, OVERALIGN_FUNC_BIT, CGDATA_BIT)
	(SLOW_BYTES_BIT, LITTLE_END_BIT, M340_BIT, TARGET_HARDLIT)
	(TARGET_DIV, TARGET_RELAX_IMM, TARGET_W_FIELD, TARGET_OVERALIGN_FUNC)
	(TARGET_CG_DATA, TARGET_SLOW_BYTES, TARGET_LITTLE_END, TARGET_M340)
	(TARGET_SWITCHES, mcore_stack_increment_string)
	(TARGET_OPTIONS): Delete.
	(TARGET_DEFAULT, OPTIMIZATION_OPTIONS): Use MASK_* constants rather
	than *_BIT constants.
	(TARGET_8ALIGN): #undef old definition before redefining to 1.
	* config/mcore/mcore.c (mcore_stack_increment_string): Delete.
	(TARGET_DEFAULT_TARGET_FLAGS): Override default to TARGET_DEFAULT.
	(mcore_override_options): Delete mcore_stack_increment code.
	Change use of M340_BIT to MASK_M340.
	* config/mcore/mcore.opt: New file.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97544 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 80 insertions, 0 deletions

diff --git a/gcc/config/mcore/mcore.opt b/gcc/config/mcore/mcore.opt
new file mode 100644
index 00000000000..75538796e24
--- /dev/null
+++ b/gcc/config/mcore/mcore.opt
@@ -0,0 +1,80 @@
+; Options for the Motorola MCore port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING.  If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+m210
+Target RejectNegative Report InverseMask(M340)
+Generate code for the M*Core M210
+
+m340
+Target RejectNegative Report Mask(M340)
+Generate code for the M*Core M340
+
+m4align
+Target RejectNegative Report InverseMask(8ALIGN)
+Set maximum alignment to 4
+
+m4byte-functions
+Target Report Mask(OVERALIGN_FUNC)
+Force functions to be aligned to a 4 byte boundary
+
+m8align
+Target RejectNegative Report Mask(8ALIGN)
+Set maximum alignment to 8
+
+mbig-endian
+Target RejectNegative Report InverseMask(LITTLE_END)
+Generate big-endian code
+
+mcallgraph-data
+Target Report Mask(CG_DATA)
+Emit call graph information
+
+mdiv
+Target Report Mask(DIV)
+Use the divide instruction
+
+mhardlit
+Target Report Mask(HARDLIT)
+Inline constants if it can be done in 2 insns or less
+
+mlittle-endian
+Target RejectNegative Report Mask(LITTLE_END)
+Generate little-endian code
+
+; Not used by the compiler proper.
+mno-lsim
+Target RejectNegative Undocumented
+
+mrelax-immediates
+Target Report Mask(RELAX_IMM)
+Use arbitrary sized immediates in bit operations
+
+mslow-bytes
+Target Report Mask(SLOW_BYTES)
+Prefer word accesses over byte accesses
+
+mstack-increment=
+Target RejectNegative Joined UInteger Var(mcore_stack_increment) VarExists
+Set the maximum amount for a single stack increment operation
+
+mwide-bitfields
+Target Report Mask(W_FIELD)
+Always treat bitfields as int-sized