diff options
| author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-05-11 11:13:27 +0000 |
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| committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-05-11 11:13:27 +0000 |
| commit | c41143fb1d63596ff2a0f6da741b4bae73b8be16 (patch) | |
| tree | d70c0763693cfef7bc877f21e079986944261a5f /gcc/config/pa/pa64-regs.h | |
| parent | eb0badc13724022c8828a55e516d0eecdc487cc3 (diff) | |
| download | gcc-c41143fb1d63596ff2a0f6da741b4bae73b8be16.tar.gz | |
2011-05-11 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 173647 using svnmerge
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@173652 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa/pa64-regs.h')
| -rw-r--r-- | gcc/config/pa/pa64-regs.h | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/gcc/config/pa/pa64-regs.h b/gcc/config/pa/pa64-regs.h index 23dc7780e4e..b5f04309fbc 100644 --- a/gcc/config/pa/pa64-regs.h +++ b/gcc/config/pa/pa64-regs.h @@ -149,10 +149,11 @@ along with GCC; see the file COPYING3. If not see /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On the HP-PA, the cpu registers can hold any mode. We - force this to be an even register is it cannot hold the full mode. */ + force this to be an even register if it cannot hold the full mode. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ((REGNO) == 0 \ ? (MODE) == CCmode || (MODE) == CCFPmode \ + : (REGNO) == 60 ? SCALAR_INT_MODE_P (MODE) \ /* Make wide modes be in aligned registers. */ \ : FP_REGNO_P (REGNO) \ ? (VALID_FP_MODE_P (MODE) \ @@ -230,19 +231,6 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, {0x00000000, 0x10000000}, /* SHIFT_REGS */ \ {0xfffffffe, 0x3fffffff}} /* ALL_REGS */ -/* The following macro defines cover classes for Integrated Register - Allocator. Cover classes is a set of non-intersected register - classes covering all hard registers used for register allocation - purpose. Any move between two registers of a cover class should be - cheaper than load or store of the registers. The macro value is - array of register classes with LIM_REG_CLASSES used as the end - marker. */ - -#define IRA_COVER_CLASSES \ -{ \ - GENERAL_REGS, FP_REGS, SHIFT_REGS, LIM_REG_CLASSES \ -} - /* Defines invalid mode changes. */ #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ |