diff options
author | geoffk <geoffk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-02-03 06:36:02 +0000 |
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committer | geoffk <geoffk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-02-03 06:36:02 +0000 |
commit | b4f9573e66383d8db22f382c6462668fcb725810 (patch) | |
tree | b9fc41b4284dd1212ec0f59c15bb2c40b47e1e1e /gcc/config/rs6000 | |
parent | cf9d73cabc8e16df7b38ae95d87fccaae6e097b6 (diff) | |
download | gcc-b4f9573e66383d8db22f382c6462668fcb725810.tar.gz |
2005-02-02 Geoffrey Keating <geoffk@apple.com>
* config/rs6000/altivec.md (altivec_dst): Make the first operand
a REG, not a MEM.
(altivec_dstt): Likewise.
(altivec_dstst): Likewise.
(altivec_dststt): Likewise.
* config/rs6000/rs6000.c (altivec_expand_dst_builtin): Adjust creation
of first operand.
Index: testsuite/ChangeLog
2005-02-02 Geoffrey Keating <geoffk@apple.com>
* gcc.dg/altivec-19.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@94652 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r-- | gcc/config/rs6000/altivec.md | 24 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 2 |
2 files changed, 13 insertions, 13 deletions
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 6084e165b1d..1b3beffadfc 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -1542,35 +1542,35 @@ [(set_attr "type" "vecsimple")]) (define_insn "altivec_dst" - [(unspec [(match_operand:V4SI 0 "memory_operand" "Q") + [(unspec [(match_operand 0 "register_operand" "b") (match_operand:SI 1 "register_operand" "r") (match_operand:QI 2 "immediate_operand" "i")] 190)] - "TARGET_ALTIVEC" - "dst %P0,%1,%2" + "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode" + "dst %0,%1,%2" [(set_attr "type" "vecsimple")]) (define_insn "altivec_dstt" - [(unspec [(match_operand:V4SI 0 "memory_operand" "Q") + [(unspec [(match_operand 0 "register_operand" "b") (match_operand:SI 1 "register_operand" "r") (match_operand:QI 2 "immediate_operand" "i")] 191)] - "TARGET_ALTIVEC" - "dstt %P0,%1,%2" + "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode" + "dstt %0,%1,%2" [(set_attr "type" "vecsimple")]) (define_insn "altivec_dstst" - [(unspec [(match_operand:V4SI 0 "memory_operand" "Q") + [(unspec [(match_operand 0 "register_operand" "b") (match_operand:SI 1 "register_operand" "r") (match_operand:QI 2 "immediate_operand" "i")] 192)] - "TARGET_ALTIVEC" - "dstst %P0,%1,%2" + "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode" + "dstst %0,%1,%2" [(set_attr "type" "vecsimple")]) (define_insn "altivec_dststt" - [(unspec [(match_operand:V4SI 0 "memory_operand" "Q") + [(unspec [(match_operand 0 "register_operand" "b") (match_operand:SI 1 "register_operand" "r") (match_operand:QI 2 "immediate_operand" "i")] 193)] - "TARGET_ALTIVEC" - "dststt %P0,%1,%2" + "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode" + "dststt %0,%1,%2" [(set_attr "type" "vecsimple")]) (define_insn "altivec_lvsl" diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4406f1b10ec..f1bb23f84bd 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -7225,7 +7225,7 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, } if (! (*insn_data[d->icode].operand[0].predicate) (op0, mode0)) - op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0)); + op0 = copy_to_mode_reg (Pmode, op0); if (! (*insn_data[d->icode].operand[1].predicate) (op1, mode1)) op1 = copy_to_mode_reg (mode1, op1); |