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| author | Mike Stump <mikestump@comcast.net> | 2013-10-30 03:02:00 +0000 |
|---|---|---|
| committer | Mike Stump <mrs@gcc.gnu.org> | 2013-10-30 03:02:00 +0000 |
| commit | d8487c949ad5f1fac62020ab22544422490b37d2 (patch) | |
| tree | 3e4d8c33a6e93f29e60f5b1a8bb6ff6874206439 /gcc/config/sh/sh-modes.def | |
| parent | f0be72ea222f22adc00c57472fcd9ebfde003cb1 (diff) | |
| download | gcc-d8487c949ad5f1fac62020ab22544422490b37d2.tar.gz | |
machmode.def (PARTIAL_INT_MODE): Add precision and name.
* machmode.def (PARTIAL_INT_MODE): Add precision and name.
* genmodes.c (PARTIAL_INT_MODE): Add precision and name.
(make_vector_mode): Increase namebuf to 16.
(emit_insn_modes_h): When processing BImode, don't
also match partial int modes.
(emit_class_narrowest_mode): Likewise.
* config/bfin/bfin-modes.def: Add precision to PDI.
* config/m32c/m32c-modes.def: Add precision to PSI.
* config/msp430/msp430-modes.def: Add precision to PSI.
* config/rs6000/rs6000-modes.def: Add precision to PTI.
* config/sh/sh-modes.def: Add precision to PSI and PDI.
From-SVN: r204193
Diffstat (limited to 'gcc/config/sh/sh-modes.def')
| -rw-r--r-- | gcc/config/sh/sh-modes.def | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/sh/sh-modes.def b/gcc/config/sh/sh-modes.def index aec007986ef..aa56038d614 100644 --- a/gcc/config/sh/sh-modes.def +++ b/gcc/config/sh/sh-modes.def @@ -18,9 +18,9 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ /* The SH uses a partial integer mode to represent the FPSCR register. */ -PARTIAL_INT_MODE (SI); +PARTIAL_INT_MODE (SI, 22, PSI); /* PDI mode is used to represent a function address in a target register. */ -PARTIAL_INT_MODE (DI); +PARTIAL_INT_MODE (DI, 64, PDI); /* Vector modes. */ VECTOR_MODE (INT, QI, 2); /* V2QI */ |