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authorAdrian Straetling <straetling@de.ibm.com>2005-12-14 16:11:14 +0000
committerUlrich Weigand <uweigand@gcc.gnu.org>2005-12-14 16:11:14 +0000
commit08a5aaa2e3b0384f72b118ec42d6fb64d22ca891 (patch)
tree9492d238108627924872c2c6f044744d83f2bc92 /gcc/config
parent1b48c8cc6aa67c74548b9710eb3bed80c073f870 (diff)
downloadgcc-08a5aaa2e3b0384f72b118ec42d6fb64d22ca891.tar.gz
s390.md ("*tstdi_extimm", [...]): Merge.
2005-12-14 Adrian Straetling <straetling@de.ibm.com> * config/s390/s390.md ("*tstdi_extimm", "*tstsi_extimm"): Merge. ("*tstdi_cconly_extimm", "*tstsi_cconly_extimm"): Merge. ("*tstdi_cconly2", "*tstsi_cconly2"): Merge. Move other tst* patterns to retain partial order. From-SVN: r108517
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/s390/s390.md97
1 files changed, 36 insertions, 61 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 274c2336edd..d4e515c50e8 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -430,7 +430,11 @@
[(set_attr "op_type" "RI")])
+;
; Load-and-Test instructions
+;
+
+; tst(di|si) intruction pattern(s).
(define_insn "*tstdi_sign"
[(set (reg CC_REGNUM)
@@ -443,28 +447,28 @@
"ltgfr\t%2,%0"
[(set_attr "op_type" "RRE")])
-(define_insn "*tstdi_extimm"
+(define_insn "*tst<mode>_extimm"
[(set (reg CC_REGNUM)
- (compare (match_operand:DI 0 "nonimmediate_operand" "d,m")
- (match_operand:DI 1 "const0_operand" "")))
- (set (match_operand:DI 2 "register_operand" "=d,d")
+ (compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
+ (match_operand:GPR 1 "const0_operand" "")))
+ (set (match_operand:GPR 2 "register_operand" "=d,d")
(match_dup 0))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT && TARGET_EXTIMM"
+ "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
- ltgr\t%2,%0
- ltg\t%2,%0"
- [(set_attr "op_type" "RRE,RXY")])
+ lt<g>r\t%2,%0
+ lt<g>\t%2,%0"
+ [(set_attr "op_type" "RR<E>,RXY")])
-(define_insn "*tstdi_cconly_extimm"
+(define_insn "*tst<mode>_cconly_extimm"
[(set (reg CC_REGNUM)
- (compare (match_operand:DI 0 "nonimmediate_operand" "d,m")
- (match_operand:DI 1 "const0_operand" "")))
- (clobber (match_scratch:DI 2 "=X,d"))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT && TARGET_EXTIMM"
+ (compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
+ (match_operand:GPR 1 "const0_operand" "")))
+ (clobber (match_scratch:GPR 2 "=X,d"))]
+ "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
"@
- ltgr\t%0,%0
- ltg\t%2,%0"
- [(set_attr "op_type" "RRE,RXY")])
+ lt<g>r\t%0,%0
+ lt<g>\t%2,%0"
+ [(set_attr "op_type" "RR<E>,RXY")])
(define_insn "*tstdi"
[(set (reg CC_REGNUM)
@@ -476,46 +480,6 @@
"ltgr\t%2,%0"
[(set_attr "op_type" "RRE")])
-(define_insn "*tstdi_cconly"
- [(set (reg CC_REGNUM)
- (compare (match_operand:DI 0 "register_operand" "d")
- (match_operand:DI 1 "const0_operand" "")))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT"
- "ltgr\t%0,%0"
- [(set_attr "op_type" "RRE")])
-
-(define_insn "*tstdi_cconly_31"
- [(set (reg CC_REGNUM)
- (compare (match_operand:DI 0 "register_operand" "d")
- (match_operand:DI 1 "const0_operand" "")))]
- "s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT"
- "srda\t%0,0"
- [(set_attr "op_type" "RS")
- (set_attr "atype" "reg")])
-
-(define_insn "*tstsi_extimm"
- [(set (reg CC_REGNUM)
- (compare (match_operand:SI 0 "nonimmediate_operand" "d,m")
- (match_operand:SI 1 "const0_operand" "")))
- (set (match_operand:SI 2 "register_operand" "=d,d")
- (match_dup 0))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
- "@
- ltr\t%2,%0
- lt\t%2,%0"
- [(set_attr "op_type" "RR,RXY")])
-
-(define_insn "*tstsi_cconly_extimm"
- [(set (reg CC_REGNUM)
- (compare (match_operand:SI 0 "nonimmediate_operand" "d,m")
- (match_operand:SI 1 "const0_operand" "")))
- (clobber (match_scratch:SI 2 "=X,d"))]
- "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM"
- "@
- ltr\t%0,%0
- lt\t%2,%0"
- [(set_attr "op_type" "RR,RXY")])
-
(define_insn "*tstsi"
[(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S")
@@ -541,13 +505,24 @@
icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")])
-(define_insn "*tstsi_cconly2"
+(define_insn "*tstdi_cconly_31"
+ [(set (reg CC_REGNUM)
+ (compare (match_operand:DI 0 "register_operand" "d")
+ (match_operand:DI 1 "const0_operand" "")))]
+ "s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT"
+ "srda\t%0,0"
+ [(set_attr "op_type" "RS")
+ (set_attr "atype" "reg")])
+
+(define_insn "*tst<mode>_cconly2"
[(set (reg CC_REGNUM)
- (compare (match_operand:SI 0 "register_operand" "d")
- (match_operand:SI 1 "const0_operand" "")))]
+ (compare (match_operand:GPR 0 "register_operand" "d")
+ (match_operand:GPR 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode)"
- "ltr\t%0,%0"
- [(set_attr "op_type" "RR")])
+ "lt<g>r\t%0,%0"
+ [(set_attr "op_type" "RR<E>")])
+
+; tst(hi|qi) intruction pattern(s).
(define_insn "*tst<mode>CCT"
[(set (reg CC_REGNUM)