2011-05-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>

      PR target/47930
      * config/arm/arm.opt (marm): Document it.
      (mthumb): Reject negative variant.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@173481 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 8 insertions, 8 deletions

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 2a46c377b0e..848aa3746e0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -10282,15 +10282,15 @@ there is a function name embedded immediately preceding this location
 and has length @code{((pc[-3]) & 0xff000000)}.
 
 @item -mthumb
+@itemx -marm
+@opindex marm
 @opindex mthumb
-Generate code for the Thumb instruction set.  The default is to
-use the 32-bit ARM instruction set.
-This option automatically enables either 16-bit Thumb-1 or
-mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}}
-and @option{-march=@var{name}} options.  This option is not passed to the
-assembler. If you want to force assembler files to be interpreted as Thumb code,
-either add a @samp{.thumb} directive to the source or pass the @option{-mthumb}
-option directly to the assembler by prefixing it with @option{-Wa}.
+
+Select between generating code that executes in ARM and Thumb
+states.  The default for most configurations is to generate code
+that executes in ARM state, but the default can be changed by
+configuring GCC with the @option{--with-mode=}@var{state}
+configure option.
 
 @item -mtpcs-frame
 @opindex mtpcs-frame