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author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-09-15 22:48:06 +0000 |
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committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-09-15 22:48:06 +0000 |
commit | 7800959d242076fdcbf694e75ac731ba8b61ee0d (patch) | |
tree | 28007d4004633363bcf80433f7aa22989ce61c32 /gcc/doc/rtl.texi | |
parent | 55a802aea9950d1b6144d5526d1a776cd1f79119 (diff) | |
download | gcc-7800959d242076fdcbf694e75ac731ba8b61ee0d.tar.gz |
* ChangeLog: Follow spelling conventions.
* ChangeLog.0: Likewise.
* ChangeLog.1: Likewise.
* ChangeLog.2: Likewise.
* ChangeLog.4: Likewise.
* ChangeLog.6: Likewise.
* config.gcc: Likewise.
* dwarfout.c: Likewise.
* reload1.c: Likewise.
* simplify-rtx.c: Likewise.
* unwind-sjlj.c: Likewise.
* config/avr/avr.h: Likewise.
* config/d30v/d30v.h: Likewise.
* config/frv/frv.c: Likewise.
* config/frv/frv.h: Likewise.
* config/ip2k/ip2k.h: Likewise.
* config/m88k/m88k-move.sh: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/stormy16/stormy16.h: Likewise.
* doc/extend.texi: Likewise.
* doc/interface.texi: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
* doc/rtl.texi: Likewise.
* doc/tm.texi: Likewise.
* doc/trouble.texi: Likewise.
* ginclude/float.h: Likewise.
* treelang/treelang.texi: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57179 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc/rtl.texi')
-rw-r--r-- | gcc/doc/rtl.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index 5a016bea42f..1c9a4e49230 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -1545,7 +1545,7 @@ preferable approach if only a small subset of instructions modify the condition code. Other machines store condition codes in general registers; in such cases a pseudo register should be used. -Some machines, such as the Sparc and RS/6000, have two sets of +Some machines, such as the SPARC and RS/6000, have two sets of arithmetic instructions, one that sets and one that does not set the condition code. This is best handled by normally generating the instruction that does not set the condition code, and making a pattern |