diff options
| author | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-02-16 15:34:28 +0000 |
|---|---|---|
| committer | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-02-16 15:34:28 +0000 |
| commit | 72e3d3638d3d464d276b13b2fa9b86c55a08c40f (patch) | |
| tree | 3b3d3f1e75c66f654e5766a8981e1f3f9e0f9992 /gcc/ira-costs.c | |
| parent | 38091110b0abe5afe1594f002f58521fd02b46d3 (diff) | |
| download | gcc-72e3d3638d3d464d276b13b2fa9b86c55a08c40f.tar.gz | |
PR rtl-optimization/52208
* ira-costs.c (scan_one_insn): Don't decrease mem_cost
for MEMs with REG_EQUIV, if the MEM isn't general_operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184310 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/ira-costs.c')
| -rw-r--r-- | gcc/ira-costs.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index 8e1e8466437..34e6ef9346b 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1,5 +1,5 @@ /* IRA hard register and memory cost calculation for allocnos or pseudos. - Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011 + Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. @@ -1306,14 +1306,21 @@ scan_one_insn (rtx insn) Similarly if we're loading other constants from memory (constant pool, TOC references, small data areas, etc) and this is the only - assignment to the destination pseudo. */ + assignment to the destination pseudo. + + Don't do this if SET_SRC (set) isn't a general operand, if it is + a memory requiring special instructions to load it, decreasing + mem_cost might result in it being loaded using the specialized + instruction into a register, then stored into stack and loaded + again from the stack. See PR52208. */ if (set != 0 && REG_P (SET_DEST (set)) && MEM_P (SET_SRC (set)) && (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != NULL_RTX && ((MEM_P (XEXP (note, 0))) || (CONSTANT_P (XEXP (note, 0)) && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), XEXP (note, 0)) - && REG_N_SETS (REGNO (SET_DEST (set))) == 1))) + && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) { enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); |