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author | Michael Matz <matz@suse.de> | 2009-08-25 13:33:54 +0000 |
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committer | Michael Matz <matz@gcc.gnu.org> | 2009-08-25 13:33:54 +0000 |
commit | 8e7aa1f9a319b100c721a7d83294a799a295407c (patch) | |
tree | 21065dda4814644807909923e74947363f96ca60 /gcc/optabs.c | |
parent | b32e7cdb5df3f84bfdc0dc683f7c94adf76043cf (diff) | |
download | gcc-8e7aa1f9a319b100c721a7d83294a799a295407c.tar.gz |
expr.h (struct separate_ops, sepops): New type for passing around an exploded simple expression.
* expr.h (struct separate_ops, sepops): New type for passing
around an exploded simple expression.
* optabs.c (expand_widen_pattern_expr, expand_vec_shift_expr):
Use this structure instead of expression tree.
(get_vcond_icode, expand_vec_cond_expr_p): Don't take whole
expression, only its type.
(expand_vec_cond_expr): Take type and individual operands instead
of full expression.
* optabs.h (expand_widen_pattern_expr, expand_vec_cond_expr,
expand_vec_shift_expr): Change prototype accordingly.
* tree-vect-stmts.c (vectorizable_condition): Change call of
expand_vec_cond_expr_p to pass only type.
* expr.c (do_store_flags): Change prototype and implementation
to take an exploded expression.
(expand_expr_real_1): New local ops initialized with details
of the full expression. Use it instead of full
expression in calls to do_store_flags, expand_vec_cond_expr,
expand_widen_pattern_expr and expand_vec_shift_expr.
From-SVN: r151079
Diffstat (limited to 'gcc/optabs.c')
-rw-r--r-- | gcc/optabs.c | 54 |
1 files changed, 28 insertions, 26 deletions
diff --git a/gcc/optabs.c b/gcc/optabs.c index fcc1649caf3..61d8bcfe298 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -530,8 +530,8 @@ optab_for_tree_code (enum tree_code code, const_tree type, type-promotion (vec-unpack) 1 oprnd0 - - */ rtx -expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target, - int unsignedp) +expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op, + rtx target, int unsignedp) { tree oprnd0, oprnd1, oprnd2; enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode; @@ -541,19 +541,19 @@ expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target, rtx temp; rtx pat; rtx xop0, xop1, wxop; - int nops = TREE_OPERAND_LENGTH (exp); + int nops = TREE_CODE_LENGTH (ops->code); - oprnd0 = TREE_OPERAND (exp, 0); + oprnd0 = ops->op0; tmode0 = TYPE_MODE (TREE_TYPE (oprnd0)); widen_pattern_optab = - optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0), optab_default); + optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default); icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code; gcc_assert (icode != CODE_FOR_nothing); xmode0 = insn_data[icode].operand[1].mode; if (nops >= 2) { - oprnd1 = TREE_OPERAND (exp, 1); + oprnd1 = ops->op1; tmode1 = TYPE_MODE (TREE_TYPE (oprnd1)); xmode1 = insn_data[icode].operand[2].mode; } @@ -568,7 +568,7 @@ expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target, { gcc_assert (tmode1 == tmode0); gcc_assert (op1); - oprnd2 = TREE_OPERAND (exp, 2); + oprnd2 = ops->op2; wmode = TYPE_MODE (TREE_TYPE (oprnd2)); wxmode = insn_data[icode].operand[3].mode; } @@ -777,19 +777,19 @@ force_expand_binop (enum machine_mode mode, optab binoptab, /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */ rtx -expand_vec_shift_expr (tree vec_shift_expr, rtx target) +expand_vec_shift_expr (sepops ops, rtx target) { enum insn_code icode; rtx rtx_op1, rtx_op2; enum machine_mode mode1; enum machine_mode mode2; - enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr)); - tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0); - tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1); + enum machine_mode mode = TYPE_MODE (ops->type); + tree vec_oprnd = ops->op0; + tree shift_oprnd = ops->op1; optab shift_optab; rtx pat; - switch (TREE_CODE (vec_shift_expr)) + switch (ops->code) { case VEC_RSHIFT_EXPR: shift_optab = vec_shr_optab; @@ -6835,14 +6835,14 @@ vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode) return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1); } -/* Return insn code for VEC_COND_EXPR EXPR. */ +/* Return insn code for TYPE, the type of a VEC_COND_EXPR. */ static inline enum insn_code -get_vcond_icode (tree expr, enum machine_mode mode) +get_vcond_icode (tree type, enum machine_mode mode) { enum insn_code icode = CODE_FOR_nothing; - if (TYPE_UNSIGNED (TREE_TYPE (expr))) + if (TYPE_UNSIGNED (type)) icode = vcondu_gen_code[mode]; else icode = vcond_gen_code[mode]; @@ -6850,27 +6850,29 @@ get_vcond_icode (tree expr, enum machine_mode mode) } /* Return TRUE iff, appropriate vector insns are available - for vector cond expr expr in VMODE mode. */ + for vector cond expr with type TYPE in VMODE mode. */ bool -expand_vec_cond_expr_p (tree expr, enum machine_mode vmode) +expand_vec_cond_expr_p (tree type, enum machine_mode vmode) { - if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing) + if (get_vcond_icode (type, vmode) == CODE_FOR_nothing) return false; return true; } -/* Generate insns for VEC_COND_EXPR. */ +/* Generate insns for a VEC_COND_EXPR, given its TYPE and its + three operands. */ rtx -expand_vec_cond_expr (tree vec_cond_expr, rtx target) +expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2, + rtx target) { enum insn_code icode; rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1; - enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr)); - bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr)); + enum machine_mode mode = TYPE_MODE (vec_cond_type); + bool unsignedp = TYPE_UNSIGNED (vec_cond_type); - icode = get_vcond_icode (vec_cond_expr, mode); + icode = get_vcond_icode (vec_cond_type, mode); if (icode == CODE_FOR_nothing) return 0; @@ -6878,17 +6880,17 @@ expand_vec_cond_expr (tree vec_cond_expr, rtx target) target = gen_reg_rtx (mode); /* Get comparison rtx. First expand both cond expr operands. */ - comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0), + comparison = vector_compare_rtx (op0, unsignedp, icode); cc_op0 = XEXP (comparison, 0); cc_op1 = XEXP (comparison, 1); /* Expand both operands and force them in reg, if required. */ - rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1)); + rtx_op1 = expand_normal (op1); if (!insn_data[icode].operand[1].predicate (rtx_op1, mode) && mode != VOIDmode) rtx_op1 = force_reg (mode, rtx_op1); - rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2)); + rtx_op2 = expand_normal (op2); if (!insn_data[icode].operand[2].predicate (rtx_op2, mode) && mode != VOIDmode) rtx_op2 = force_reg (mode, rtx_op2); |