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author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-12-25 15:15:10 +0000 |
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committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-12-25 15:15:10 +0000 |
commit | 41a6f238b44ca41c7a514ef889b64f7df4532698 (patch) | |
tree | c9d2c0b2dd77109ef11a66cdf42b6e1a0fc4430e /gcc/ra.h | |
parent | 90a38175f02383508a1c2714d2ce6e9cdd4b3e73 (diff) | |
download | gcc-41a6f238b44ca41c7a514ef889b64f7df4532698.tar.gz |
* output.h: Fix comment typos.
* predict.c: Likewise.
* print-tree.c: Likewise.
* profile.c: Likewise.
* ra-build.c: Likewise.
* ra-colorize.c: Likewise.
* ra-debug.c: Likewise.
* ra-rewrite.c: Likewise.
* ra.c: Likewise.
* ra.h: Likewise.
* real.c: Likewise.
* recog.c: Likewise.
* reg-stack.c: Likewise.
* regclass.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@60502 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/ra.h')
-rw-r--r-- | gcc/ra.h | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -62,7 +62,7 @@ struct tagged_conflict In the process of building the interference graph web parts are connected together, if they have common instructions and reference the same register. That way live ranges are build (by connecting defs and - uses) and implicitely complete webs (by connecting web parts in common + uses) and implicitly complete webs (by connecting web parts in common uses). */ struct web_part { @@ -378,7 +378,7 @@ extern sbitmap igraph; /* This is the bitmap of all (even partly) conflicting super webs. If bit I*num_webs+J or J*num_webs+I is set, then I and J (both being super web indices) conflict, maybe only partially. Note the - assymetry. */ + asymmetry. */ extern sbitmap sup_igraph; /* After the first pass, and when interference region spilling is @@ -430,7 +430,7 @@ extern struct df *df; which backward reach the end of B. */ extern bitmap *live_at_end; -/* One pass is: collecting registers refs, buiding I-graph, spilling. +/* One pass is: collecting registers refs, building I-graph, spilling. And this is how often we already ran that for the current function. */ extern int ra_pass; @@ -491,7 +491,7 @@ extern HARD_REG_SET usable_regs[N_REG_CLASSES]; /* For each class C the count of hardregs in usable_regs[C]. */ extern unsigned int num_free_regs[N_REG_CLASSES]; /* For each mode M the hardregs, which are MODE_OK for M, and have - enough space behind them to hold an M value. Additinally + enough space behind them to hold an M value. Additionally if reg R is OK for mode M, but it needs two hardregs, then R+1 will also be set here, even if R+1 itself is not OK for M. I.e. this represent the possible resources which could be taken away be a value |