* config/i386/i386.md (*ashl<mode>3_mask): New insn_and_split pattern.

	(*<shiftrt_insn><mode>3_mask): Ditto.
	(*<rotate_insn><mode>3_mask): Ditto.

testsuite/ChangeLog:

	* gcc.target/i386/shift_mask.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@164895 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 31 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/shift_mask.c b/gcc/testsuite/gcc.target/i386/shift_mask.c
new file mode 100644
index 00000000000..29c84bd1dff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/shift_mask.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int test_sal (int a, int c)
+{
+  return a << (c & 0x1f);
+}
+
+int test_sar (int a, int c)
+{
+  return a >> (c & 0x1f);
+}
+
+unsigned int test_shr (unsigned int a, int c)
+{
+  return a >> (c & 0x1f);
+}
+
+unsigned int test_rol (unsigned int a, int c)
+{
+  int z = c & 0x1f;
+  return (a << z) | (a >> (32 - z));
+}
+
+unsigned int test_ror (unsigned int a, int c)
+{
+  int z = c & 0x1f;
+  return (a >> z) | (a << (32 - z));
+}
+
+/* { dg-final { scan-assembler-not "and" } } */