diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 14 | ||||
| -rw-r--r-- | gcc/config/rs6000/spe.md | 28 |
3 files changed, 23 insertions, 27 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cdd56bed6b..8657351619b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-02-24 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/spe.md (spe_fix_truncsfsi2): Delete. + (spe_fixuns_truncsfsi2): Delete. + + * config/rs6000/rs6000.md (fix_truncsfsi2): Delete. + (fixuns_truncsfsi2): Delete. + 2004-02-24 Josef Zlomek <zlomekj@suse.cz> PR/14240 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index af0d781d148..b49a0acbc8a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4959,20 +4959,6 @@ "fsel %0,%1,%2,%3" [(set_attr "type" "fp")]) -;; Conversions to and from floating-point. - -(define_expand "fixuns_truncsfsi2" - [(set (match_operand:SI 0 "gpc_reg_operand" "") - (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))] - "TARGET_HARD_FLOAT && !TARGET_FPRS" - "") - -(define_expand "fix_truncsfsi2" - [(set (match_operand:SI 0 "gpc_reg_operand" "") - (fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))] - "TARGET_HARD_FLOAT && !TARGET_FPRS" - "") - ; For each of these conversions, there is a define_expand, a define_insn ; with a '#' template, and a define_split (with C code). The idea is ; to allow constant folding with the template of the define_insn, diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index d4a8896f300..07ee0987198 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -83,19 +83,21 @@ "efsctuiz %0,%1" [(set_attr "type" "fp")]) -(define_insn "spe_fixuns_truncsfsi2" - [(set (match_operand:SI 0 "gpc_reg_operand" "=r") - (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] - "TARGET_HARD_FLOAT && !TARGET_FPRS" - "efsctui %0,%1" - [(set_attr "type" "fp")]) - -(define_insn "spe_fix_truncsfsi2" - [(set (match_operand:SI 0 "gpc_reg_operand" "=r") - (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] - "TARGET_HARD_FLOAT && !TARGET_FPRS" - "efsctsi %0,%1" - [(set_attr "type" "fp")]) +; These instructions aren't IEEE compliant. They get some corner cases +; wrong. Don't enable them! +;(define_insn "spe_fixuns_truncsfsi2" +; [(set (match_operand:SI 0 "gpc_reg_operand" "=r") +; (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] +; "TARGET_HARD_FLOAT && !TARGET_FPRS" +; "efsctui %0,%1" +; [(set_attr "type" "fp")]) +; +;(define_insn "spe_fix_truncsfsi2" +; [(set (match_operand:SI 0 "gpc_reg_operand" "=r") +; (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] +; "TARGET_HARD_FLOAT && !TARGET_FPRS" +; "efsctsi %0,%1" +; [(set_attr "type" "fp")]) (define_insn "spe_floatunssisf2" [(set (match_operand:SF 0 "gpc_reg_operand" "=r") |