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-rw-r--r--gcc/ChangeLog10
-rw-r--r--gcc/config/v850/t-v8505
-rw-r--r--gcc/config/v850/t-v850e4
-rw-r--r--gcc/config/v850/v850.h14
-rw-r--r--gcc/doc/invoke.texi15
5 files changed, 44 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 38c55bb054a..1608f4f1804 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,15 @@
2003-09-04 Nick Clifton <nickc@redhat.com>
+ * config.gcc: Add v850e1 target. Allow --with-cpu to accept
+ v850e1.
+ * config/v850/v850.h: Accept v850e1 as a default CPU.
+ Accept -mv850e1 as a command line option.
+ * doc/invoke.texi: Document new -mv850e1 command line switch.
+ * config/v850/t-v850: Treat -mv850e1 as a multilib alias for
+ -mv850e.
+
+2003-09-04 Nick Clifton <nickc@redhat.com>
+
* config.gcc (v850e-*-*): Use t-v850e makefile fragment.
* config/v850/t-v850: Only produce one extra multilib - for
the v850e.
diff --git a/gcc/config/v850/t-v850 b/gcc/config/v850/t-v850
index 8a7063f92fe..4890ee3a9ff 100644
--- a/gcc/config/v850/t-v850
+++ b/gcc/config/v850/t-v850
@@ -84,9 +84,14 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
MULTILIB_OPTIONS = mv850e
MULTILIB_DIRNAMES = v850e
INSTALL_LIBGCC = install-multilib
+MULTILIB_MATCHES = mv850e=mv850e1
TCFLAGS = -mno-app-regs -msmall-sld -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow
v850-c.o: $(srcdir)/config/v850/v850-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
$(TM_H) $(CPPLIB_H) $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/v850/v850-c.c
+
+# Local Variables:
+# mode: Makefile
+# End:
diff --git a/gcc/config/v850/t-v850e b/gcc/config/v850/t-v850e
index f6546026eef..97724e58109 100644
--- a/gcc/config/v850/t-v850e
+++ b/gcc/config/v850/t-v850e
@@ -90,3 +90,7 @@ TCFLAGS = -mno-app-regs -msmall-sld -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsign
v850-c.o: $(srcdir)/config/v850/v850-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
$(TM_H) $(CPPLIB_H) $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/v850/v850-c.c
+
+# Local Variables:
+# mode: Makefile
+# End:
diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h
index 52e631334e5..7ebf12d6693 100644
--- a/gcc/config/v850/v850.h
+++ b/gcc/config/v850/v850.h
@@ -32,6 +32,7 @@
#define TARGET_CPU_generic 1
#define TARGET_CPU_v850e 2
+#define TARGET_CPU_v850e1 3
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT TARGET_CPU_generic
@@ -56,6 +57,17 @@
#define TARGET_VERSION fprintf (stderr, " (NEC V850E)");
#endif
+#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
+#undef MASK_DEFAULT
+#define MASK_DEFAULT MASK_V850E /* No practical difference. */
+#undef SUBTARGET_ASM_SPEC
+#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (NEC V850E1)");
+#endif
+
#define ASM_SPEC "%{mv*:-mv%*}"
#define CPP_SPEC "%{mv850e:-D__v850e__} %{mv850:-D__v850__} %(subtarget_cpp_spec)"
@@ -176,6 +188,8 @@ extern int target_flags;
{ "v850", MASK_V850, \
N_("Compile for the v850 processor") }, \
{ "v850", -(MASK_V850 ^ MASK_CPU), "" }, \
+ { "v850e1", MASK_V850E, N_("Compile for v850e1 processor") }, \
+ { "v850e1", -(MASK_V850E ^ MASK_CPU), "" }, /* Make sure that the other bits are cleared. */ \
{ "v850e", MASK_V850E, N_("Compile for v850e processor") }, \
{ "v850e", -(MASK_V850E ^ MASK_CPU), "" }, /* Make sure that the other bits are cleared. */ \
{ "small-sld", MASK_SMALL_SLD, N_("Enable the use of the short load instructions") }, \
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 359e64fa608..4ca859bf0c9 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -571,6 +571,7 @@ in the following sections.
-mtda=@var{n} -msda=@var{n} -mzda=@var{n} @gol
-mapp-regs -mno-app-regs @gol
-mdisable-callt -mno-disable-callt @gol
+-mv850e1 @gol
-mv850e @gol
-mv850 -mbig-switch}
@@ -9700,14 +9701,20 @@ the compiler. This setting is the default.
@opindex mno-app-regs
This option will cause r2 and r5 to be treated as fixed registers.
+@item -mv850e1
+@opindex mv850e1
+Specify that the target processor is the V850E1. The preprocessor
+constants @samp{__v850e1__} and @samp{__v850e__} will be defined if
+this option is used.
+
@item -mv850e
@opindex mv850e
Specify that the target processor is the V850E. The preprocessor
constant @samp{__v850e__} will be defined if this option is used.
-If neither @option{-mv850} nor @option{-mv850e} are defined
-then a default target processor will be chosen and the relevant
-@samp{__v850*__} preprocessor constant will be defined.
+If neither @option{-mv850} nor @option{-mv850e} nor @option{-mv850e1}
+are defined then a default target processor will be chosen and the
+relevant @samp{__v850*__} preprocessor constant will be defined.
The preprocessor constants @samp{__v850} and @samp{__v851__} are always
defined, regardless of which processor variant is the target.
@@ -9715,7 +9722,7 @@ defined, regardless of which processor variant is the target.
@item -mdisable-callt
@opindex mdisable-callt
This option will suppress generation of the CALLT instruction for the
-v850e flavors of the v850 architecture. The default is
+v850e and v850e1 flavors of the v850 architecture. The default is
@option{-mno-disable-callt} which allows the CALLT instruction to be used.
@end table