diff options
Diffstat (limited to 'gcc/config/arm')
| -rw-r--r-- | gcc/config/arm/README-interworking | 2 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 23 | ||||
| -rw-r--r-- | gcc/config/arm/iterators.md | 2 | ||||
| -rw-r--r-- | gcc/config/arm/t-arm | 2 | ||||
| -rw-r--r-- | gcc/config/arm/vxworks.h | 2 |
5 files changed, 19 insertions, 12 deletions
diff --git a/gcc/config/arm/README-interworking b/gcc/config/arm/README-interworking index 7f2eda83b49..cfa7f66e294 100644 --- a/gcc/config/arm/README-interworking +++ b/gcc/config/arm/README-interworking @@ -227,7 +227,7 @@ considerations when building programs and DLLs: Switching between the ARM and Thumb instruction sets is accomplished via the BX instruction which takes as an argument a register name. -Control is transfered to the address held in this register (with the +Control is transferred to the address held in this register (with the bottom bit masked out), and if the bottom bit is set, then Thumb instruction processing is enabled, otherwise ARM instruction processing is enabled. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7a9819705e5..8a862275b5b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -46,7 +46,6 @@ #include "ggc.h" #include "except.h" #include "c-family/c-pragma.h" /* ??? */ -#include "integrate.h" #include "tm_p.h" #include "target.h" #include "target-def.h" @@ -2588,7 +2587,7 @@ optimal_immediate_sequence (enum rtx_code code, unsigned HOST_WIDE_INT val, int insns1, insns2; struct four_ints tmp_sequence; - /* If we aren't targetting ARM, the best place to start is always at + /* If we aren't targeting ARM, the best place to start is always at the bottom, otherwise look more closely. */ if (TARGET_ARM) { @@ -8473,7 +8472,7 @@ cortex_a9_sched_adjust_cost (rtx insn, rtx link, rtx dep, int * cost) && reg_overlap_mentioned_p (SET_DEST (PATTERN (insn)), SET_DEST (PATTERN (dep)))) { - /* FMACS is a special case where the dependant + /* FMACS is a special case where the dependent instruction can be issued 3 cycles before the normal latency in case of an output dependency. */ @@ -9459,7 +9458,7 @@ neon_expand_vector_init (rtx target, rtx vals) /* Construct the vector in memory one field at a time and load the whole vector. */ - mem = assign_stack_temp (mode, GET_MODE_SIZE (mode), 0); + mem = assign_stack_temp (mode, GET_MODE_SIZE (mode)); for (i = 0; i < n_elts; i++) emit_move_insn (adjust_address_nv (mem, inner_mode, i * GET_MODE_SIZE (inner_mode)), @@ -16187,7 +16186,7 @@ arm_output_epilogue (rtx sibling) now we have to use add/sub in those cases. However, the value of that would be marginal, as both mov and add/sub are 32-bit in ARM mode, and it would require extra conditionals - in arm_expand_prologue to distingish ARM-apcs-frame case + in arm_expand_prologue to distinguish ARM-apcs-frame case (where frame pointer is required to point at first register) and ARM-non-apcs-frame. Therefore, such change is postponed until real need arise. */ @@ -25638,10 +25637,18 @@ arm_evpc_neon_vrev (struct expand_vec_perm_d *d) return false; } - for (i = 0; i < nelt; i += diff) + for (i = 0; i < nelt ; i += diff + 1) for (j = 0; j <= diff; j += 1) - if (d->perm[i + j] != i + diff - j) - return false; + { + /* This is guaranteed to be true as the value of diff + is 7, 3, 1 and we should have enough elements in the + queue to generate this. Getting a vector mask with a + value of diff other than these values implies that + something is wrong by the time we get here. */ + gcc_assert (i + j < nelt); + if (d->perm[i + j] != i + diff - j) + return false; + } /* Success! */ if (d->testing_p) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 15672647e51..bb0d44e75e0 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -36,7 +36,7 @@ ;; A list of integer modes that are less than a word (define_mode_iterator NARROW [QI HI]) -;; A list of all the integer modes upto 64bit +;; A list of all the integer modes up to 64bit (define_mode_iterator QHSD [QI HI SI DI]) ;; A list of the 32bit and 64bit integer modes diff --git a/gcc/config/arm/t-arm b/gcc/config/arm/t-arm index 1128d1904b0..2bc97a65dac 100644 --- a/gcc/config/arm/t-arm +++ b/gcc/config/arm/t-arm @@ -78,7 +78,7 @@ arm.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ insn-config.h conditions.h output.h \ $(INSN_ATTR_H) $(FLAGS_H) reload.h $(FUNCTION_H) \ $(EXPR_H) $(OPTABS_H) $(RECOG_H) $(CGRAPH_H) \ - $(GGC_H) except.h $(C_PRAGMA_H) $(INTEGRATE_H) $(TM_P_H) \ + $(GGC_H) except.h $(C_PRAGMA_H) $(TM_P_H) \ $(TARGET_H) $(TARGET_DEF_H) debug.h langhooks.h $(DF_H) \ intl.h libfuncs.h $(PARAMS_H) $(OPTS_H) $(srcdir)/config/arm/arm-cores.def \ $(srcdir)/config/arm/arm-arches.def $(srcdir)/config/arm/arm-fpus.def diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h index 887691326e5..391c166336b 100644 --- a/gcc/config/arm/vxworks.h +++ b/gcc/config/arm/vxworks.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GCC, - for ARM with targetting the VXWorks run time environment. + for ARM with targeting the VXWorks run time environment. Copyright (C) 1999, 2000, 2003, 2004, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |