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-rw-r--r--gcc/config/ia64/predicates.md4
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/ia64/predicates.md b/gcc/config/ia64/predicates.md
index e06c521a056..6622b2001f4 100644
--- a/gcc/config/ia64/predicates.md
+++ b/gcc/config/ia64/predicates.md
@@ -624,3 +624,7 @@
return REG_P (op) && REG_POINTER (op);
})
+;; True if this is the right-most vector element; for mux1 @brcst.
+(define_predicate "mux1_brcst_element"
+ (and (match_code "const_int")
+ (match_test "INTVAL (op) == (TARGET_BIG_ENDIAN ? 7 : 0)")))