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-rw-r--r--gcc/config/m68hc11/m68hc11.md432
1 files changed, 233 insertions, 199 deletions
diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md
index 4cd495aad37..ec6956eafb5 100644
--- a/gcc/config/m68hc11/m68hc11.md
+++ b/gcc/config/m68hc11/m68hc11.md
@@ -115,6 +115,24 @@
;; Such split pattern must also be valid when z_replacement_completed == 2
;; because flow/cse is not aware that D is composed of {a, b}.
;;
+;; o Split patterns that generate a (mem:QI (symbol_reg _.dx)) to access
+;; the high part of a soft register must be expanded after z_replacement
+;; pass.
+;;
+;;---------------------------------------------------------------------------
+;; Constants
+
+(define_constants [
+ ;; Register numbers
+ (X_REGNUM 0) ; Index X register
+ (D_REGNUM 1) ; Data register
+ (Y_REGNUM 2) ; Index Y register
+ (SP_REGNUM 3) ; Stack pointer
+ (PC_REGNUM 4) ; Program counter
+ (A_REGNUM 5) ; A (high part of D)
+ (B_REGNUM 6) ; B (low part of D)
+ (CC_REGNUM 7) ; Condition code register
+])
;;--------------------------------------------------------------------
;;- Test
@@ -156,7 +174,7 @@
""
"*
{
- if (D_REG_P (operands[0]))
+ if (D_REG_P (operands[0]) && !TARGET_M6812)
return \"std\\t%t0\";
else
return \"cp%0\\t#0\";
@@ -222,10 +240,10 @@
(use (match_operand:HI 1 "hard_reg_operand" "dxy"))
(use (reg:HI 11))]
"z_replacement_completed == 2"
- [(set (mem:HI (pre_dec:HI (reg:HI 3))) (match_dup 1))
+ [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 1))
(set (match_dup 1) (match_dup 2))
(set (cc0) (match_dup 0))
- (set (match_dup 1) (mem:HI (post_inc:HI (reg:HI 3))))]
+ (set (match_dup 1) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[2] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
@@ -313,10 +331,10 @@
(use (match_operand:HI 2 "hard_reg_operand" "dxy"))
(use (reg:HI 11))]
"z_replacement_completed == 2"
- [(set (mem:HI (pre_dec:HI (reg:HI 3))) (match_dup 2))
+ [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 2))
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
- (set (match_dup 2) (mem:HI (post_inc:HI (reg:HI 3))))]
+ (set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
;;
@@ -330,12 +348,12 @@
(compare (match_operand:QI 0 "hard_addr_reg_operand" "xy")
(match_operand:QI 1 "cmp_operand" "uimA")))]
"z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode"
- [(parallel [(set (reg:HI 1) (match_dup 3))
- (set (match_dup 3) (reg:HI 1))])
+ [(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+ (set (match_dup 3) (reg:HI D_REGNUM))])
(set (cc0)
- (compare (reg:QI 1) (match_dup 1)))
- (parallel [(set (reg:HI 1) (match_dup 3))
- (set (match_dup 3) (reg:HI 1))])]
+ (compare (reg:QI D_REGNUM) (match_dup 1)))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+ (set (match_dup 3) (reg:HI D_REGNUM))])]
"operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));")
(define_split
@@ -392,10 +410,10 @@
(use (match_operand:HI 2 "hard_reg_operand" "dxy"))
(use (reg:HI 11))]
"z_replacement_completed == 2"
- [(set (mem:HI (pre_dec:HI (reg:HI 3))) (match_dup 2))
+ [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 2))
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
- (set (match_dup 2) (mem:HI (post_inc:HI (reg:HI 3))))]
+ (set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
(define_expand "cmpdf"
@@ -703,11 +721,11 @@
"z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode
&& !reg_mentioned_p (operands[0], operands[1])
&& !D_REG_P (operands[1])"
- [(parallel [(set (reg:HI 1) (match_dup 2))
- (set (match_dup 2) (reg:HI 1))])
- (set (reg:QI 1) (match_dup 1))
- (parallel [(set (reg:HI 1) (match_dup 2))
- (set (match_dup 2) (reg:HI 1))])]
+ [(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
+ (set (match_dup 2) (reg:HI D_REGNUM))])
+ (set (reg:QI D_REGNUM) (match_dup 1))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 2))
+ (set (match_dup 2) (reg:HI D_REGNUM))])]
"operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));")
;;
@@ -719,11 +737,11 @@
"z_replacement_completed == 2 && GET_MODE (operands[1]) == QImode
&& !reg_mentioned_p (operands[1], operands[0])
&& !D_REG_P (operands[0])"
- [(parallel [(set (reg:HI 1) (match_dup 2))
- (set (match_dup 2) (reg:HI 1))])
- (set (match_dup 0) (reg:QI 1))
- (parallel [(set (reg:HI 1) (match_dup 2))
- (set (match_dup 2) (reg:HI 1))])]
+ [(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
+ (set (match_dup 2) (reg:HI D_REGNUM))])
+ (set (match_dup 0) (reg:QI D_REGNUM))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 2))
+ (set (match_dup 2) (reg:HI D_REGNUM))])]
"operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));")
(define_insn "*movqi2_push"
@@ -1048,15 +1066,11 @@
[(set (match_operand:SI 0 "non_push_operand" "=mu")
(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "dxy")))]
"reload_completed && !X_REG_P (operands[0])"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (const_int 0))
- (set (match_dup 5) (const_int 0))]
+ [(set (match_dup 2) (zero_extend:HI (match_dup 1)))
+ (set (match_dup 3) (const_int 0))]
"
operands[2] = m68hc11_gen_lowpart (HImode, operands[0]);
- operands[3] = gen_rtx (REG, HImode, REGNO (operands[1]));
- operands[4] = m68hc11_gen_lowpart (HImode, operands[0]);
- operands[4] = m68hc11_gen_highpart (QImode, operands[4]);
- operands[5] = m68hc11_gen_highpart (HImode, operands[0]);")
+ operands[3] = m68hc11_gen_highpart (HImode, operands[0]);")
(define_split
[(set (match_operand:SI 0 "hard_reg_operand" "=D")
@@ -1320,8 +1334,8 @@
[(set (match_operand:SI 0 "register_operand" "=D")
(sign_extend:SI (match_operand:HI 1 "register_operand" "A")))]
"reload_completed && (Y_REG_P (operands[1]) || Z_REG_P (operands[1]))"
- [(set (reg:HI 1) (match_dup 1))
- (set (match_dup 0) (sign_extend:SI (reg:HI 1)))]
+ [(set (reg:HI D_REGNUM) (match_dup 1))
+ (set (match_dup 0) (sign_extend:SI (reg:HI D_REGNUM)))]
"")
(define_insn "extendhisi2"
@@ -1409,13 +1423,13 @@
(match_dup 0)))
(clobber (match_scratch:HI 1 "=X"))]
"reload_completed && z_replacement_completed == 2"
- [(set (reg:HI 1) (ashift:HI (reg:HI 1) (const_int 1)))
- (parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])
- (set (reg:QI 6) (rotate:QI (reg:QI 6) (reg:QI 7)))
- (set (reg:QI 5) (rotate:QI (reg:QI 5) (reg:QI 7)))
- (parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])]
+ [(set (reg:HI D_REGNUM) (ashift:HI (reg:HI D_REGNUM) (const_int 1)))
+ (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])
+ (set (reg:QI B_REGNUM) (rotate:QI (reg:QI B_REGNUM) (reg:QI CC_REGNUM)))
+ (set (reg:QI A_REGNUM) (rotate:QI (reg:QI A_REGNUM) (reg:QI CC_REGNUM)))
+ (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])]
"")
@@ -1472,9 +1486,9 @@
(match_operand:SI 2 "memory_operand" "m,m")))
(clobber (match_scratch:HI 3 "=X,X"))]
"reload_completed"
- [(set (reg:HI 1) (zero_extend:HI (match_dup 1)))
+ [(set (reg:HI D_REGNUM) (zero_extend:HI (match_dup 1)))
(parallel [(set (match_dup 0)
- (plus:SI (zero_extend:SI (reg:HI 1)) (match_dup 2)))
+ (plus:SI (zero_extend:SI (reg:HI D_REGNUM)) (match_dup 2)))
(clobber (match_dup 3))])]
"")
@@ -1658,7 +1672,7 @@
(clobber (match_scratch:HI 3 "=X"))]
"reload_completed && z_replacement_completed == 2
&& ((INTVAL (operands[2]) & 0x0FFFF) == 0)"
- [(set (reg:HI 0) (plus:HI (reg:HI 0) (match_dup 3)))]
+ [(set (reg:HI X_REGNUM) (plus:HI (reg:HI X_REGNUM) (match_dup 3)))]
"operands[3] = m68hc11_gen_highpart (HImode, operands[2]);")
(define_split
@@ -1669,13 +1683,13 @@
"reload_completed && z_replacement_completed == 2
&& (GET_CODE (operands[2]) != CONST_INT ||
(!(INTVAL (operands[2]) >= -65536 && INTVAL (operands[2]) <= 65535)))"
- [(set (reg:HI 1) (plus:HI (reg:HI 1) (match_dup 3)))
- (parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])
- (set (reg:QI 6) (plus:QI (plus:QI (reg:QI 7) (reg:QI 6)) (match_dup 4)))
- (set (reg:QI 5) (plus:QI (plus:QI (reg:QI 7) (reg:QI 5)) (match_dup 5)))
- (parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])]
+ [(set (reg:HI D_REGNUM) (plus:HI (reg:HI D_REGNUM) (match_dup 3)))
+ (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])
+ (set (reg:QI B_REGNUM) (plus:QI (plus:QI (reg:QI CC_REGNUM) (reg:QI B_REGNUM)) (match_dup 4)))
+ (set (reg:QI A_REGNUM) (plus:QI (plus:QI (reg:QI CC_REGNUM) (reg:QI A_REGNUM)) (match_dup 5)))
+ (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])]
"operands[3] = m68hc11_gen_lowpart (HImode, operands[2]);
operands[4] = m68hc11_gen_highpart (HImode, operands[2]);
operands[5] = m68hc11_gen_highpart (QImode, operands[4]);
@@ -1689,7 +1703,7 @@
[(set (match_operand:HI 0 "register_operand" "=x")
(plus:HI (plus:HI (match_operand:HI 1 "register_operand" "0")
(const_int 0))
- (reg:HI 7)))]
+ (reg:HI CC_REGNUM)))]
""
"*
{
@@ -1746,25 +1760,39 @@
"")
(define_insn "*addhi3_68hc12"
- [(set (match_operand:HI 0 "register_operand" "=d,A*w,A*w")
- (plus:HI (match_operand:HI 1 "register_operand" "%0,0,Aw")
- (match_operand:HI 2 "general_operand" "imA*wu,id,id")))]
+ [(set (match_operand:HI 0 "register_operand" "=*d,A*w,A*w,A")
+ (plus:HI (match_operand:HI 1 "register_operand" "%0,0,Aw,0")
+ (match_operand:HI 2 "general_operand" "imA*wu,id,id,!muA")))]
"TARGET_M6812"
"*
{
int val;
const char* insn_code;
+ if (which_alternative >= 3)
+ {
+ if (A_REG_P (operands[2]))
+ {
+ CC_STATUS_INIT;
+ output_asm_insn (\"xgd%2\", operands);
+ output_asm_insn (\"lea%0 d,%0\", operands);
+ return \"xgd%2\";
+ }
+ return \"#\";
+ }
+
if (D_REG_P (operands[0]))
{
if (X_REG_P (operands[2]))
{
+ m68hc11_notice_keep_cc (operands[0]);
output_asm_insn (\"xgdx\", operands);
output_asm_insn (\"leax\\td,%2\", operands);
return \"xgdx\";
}
else if (Y_REG_P (operands[2]))
{
+ m68hc11_notice_keep_cc (operands[0]);
output_asm_insn (\"xgdy\", operands);
output_asm_insn (\"leay\\td,%2\", operands);
return \"xgdy\";
@@ -1784,7 +1812,7 @@
if (val != -1 || val != 1 || !rtx_equal_p (operands[0], operands[1]))
{
- cc_status = cc_prev_status;
+ m68hc11_notice_keep_cc (operands[0]);
switch (REGNO (operands[0]))
{
case HARD_X_REGNUM:
@@ -1922,9 +1950,9 @@
"")
(define_insn "*addhi3"
- [(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d,!w")
- (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0,0")
- (match_operand:HI 2 "general_operand" "N,i,I,umi*A*d,!*d*w,i")))]
+ [(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d")
+ (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0")
+ (match_operand:HI 2 "general_operand" "N,i,I,umi*A*d,!*d*w")))]
"TARGET_M6811"
"*
{
@@ -2110,7 +2138,7 @@
;;
(define_insn "*adcq"
[(set (match_operand:QI 0 "register_operand" "=q")
- (plus:QI (plus:QI (reg:QI 7)
+ (plus:QI (plus:QI (reg:QI CC_REGNUM)
(match_operand:QI 1 "register_operand" "%0"))
(match_operand:QI 2 "general_operand" "ium")))]
""
@@ -2201,13 +2229,13 @@
(clobber (match_scratch:HI 3 "=X"))]
"reload_completed && z_replacement_completed == 2
&& X_REG_P (operands[1])"
- [(set (reg:HI 1) (minus:HI (reg:HI 1) (match_dup 3)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])
- (set (reg:QI 6) (minus:QI (minus:QI (reg:QI 7) (reg:QI 6)) (match_dup 4)))
- (set (reg:QI 5) (minus:QI (minus:QI (reg:QI 7) (reg:QI 5)) (match_dup 5)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])]
+ [(set (reg:HI D_REGNUM) (minus:HI (reg:HI D_REGNUM) (match_dup 3)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])
+ (set (reg:QI B_REGNUM) (minus:QI (minus:QI (reg:QI CC_REGNUM) (reg:QI B_REGNUM)) (match_dup 4)))
+ (set (reg:QI A_REGNUM) (minus:QI (minus:QI (reg:QI CC_REGNUM) (reg:QI A_REGNUM)) (match_dup 5)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])]
"operands[3] = m68hc11_gen_lowpart (HImode, operands[2]);
operands[4] = m68hc11_gen_highpart (HImode, operands[2]);
operands[5] = m68hc11_gen_highpart (QImode, operands[4]);
@@ -2220,13 +2248,13 @@
(clobber (match_scratch:HI 3 "=X"))]
"reload_completed && z_replacement_completed == 2
&& X_REG_P (operands[2])"
- [(set (reg:HI 1) (minus:HI (reg:HI 1) (match_dup 3)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])
- (set (reg:QI 6) (minus:QI (minus:QI (reg:QI 7) (reg:QI 6)) (match_dup 4)))
- (set (reg:QI 5) (minus:QI (minus:QI (reg:QI 7) (reg:QI 5)) (match_dup 5)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])
+ [(set (reg:HI D_REGNUM) (minus:HI (reg:HI D_REGNUM) (match_dup 3)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])
+ (set (reg:QI B_REGNUM) (minus:QI (minus:QI (reg:QI CC_REGNUM) (reg:QI B_REGNUM)) (match_dup 4)))
+ (set (reg:QI A_REGNUM) (minus:QI (minus:QI (reg:QI CC_REGNUM) (reg:QI A_REGNUM)) (match_dup 5)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])
(set (reg:SI 0) (neg:SI (reg:SI 0)))]
"operands[3] = m68hc11_gen_lowpart (HImode, operands[1]);
operands[4] = m68hc11_gen_highpart (HImode, operands[1]);
@@ -2365,7 +2393,7 @@
;;
(define_insn "*subcq"
[(set (match_operand:QI 0 "register_operand" "=q")
- (minus:QI (minus:QI (reg:QI 7)
+ (minus:QI (minus:QI (reg:QI CC_REGNUM)
(match_operand:QI 1 "register_operand" "0"))
(match_operand:QI 2 "general_operand" "ium")))]
""
@@ -2927,10 +2955,10 @@
(match_operand:QI 1 "general_operand" "dxy,imu"))
(match_operand:SI 2 "general_operand" "imuD,imuD")]))]
"z_replacement_completed == 2"
- [(set (reg:QI 5) (match_dup 4))
- (set (reg:QI 1) (match_dup 7))
- (set (reg:QI 6) (match_op_dup 3 [(reg:QI 6) (match_dup 5)]))
- (set (reg:HI 0) (match_dup 6))]
+ [(set (reg:QI A_REGNUM) (match_dup 4))
+ (set (reg:QI D_REGNUM) (match_dup 7))
+ (set (reg:QI B_REGNUM) (match_op_dup 3 [(reg:QI B_REGNUM) (match_dup 5)]))
+ (set (reg:HI X_REGNUM) (match_dup 6))]
"PUT_MODE (operands[3], QImode);
if (X_REG_P (operands[2]))
{
@@ -2957,9 +2985,9 @@
(match_operand:HI 1 "general_operand" "dA,imu"))
(match_operand:SI 2 "general_operand" "imuD,imuD")]))]
"reload_completed"
- [(set (reg:HI 1) (match_dup 4))
- (set (reg:HI 1) (match_op_dup 3 [(reg:HI 1) (match_dup 5)]))
- (set (reg:HI 0) (match_dup 6))]
+ [(set (reg:HI D_REGNUM) (match_dup 4))
+ (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 5)]))
+ (set (reg:HI X_REGNUM) (match_dup 6))]
"PUT_MODE (operands[3], HImode);
if (X_REG_P (operands[2]))
{
@@ -3003,9 +3031,9 @@
(match_operand:QI 1 "general_operand" "imud"))
(match_operand:HI 2 "general_operand" "dimu")]))]
"z_replacement_completed == 2"
- [(set (reg:QI 6) (match_dup 6))
- (set (reg:QI 5) (match_dup 4))
- (set (reg:QI 6) (match_op_dup 3 [(reg:QI 6) (match_dup 5)]))]
+ [(set (reg:QI B_REGNUM) (match_dup 6))
+ (set (reg:QI A_REGNUM) (match_dup 4))
+ (set (reg:QI B_REGNUM) (match_op_dup 3 [(reg:QI B_REGNUM) (match_dup 5)]))]
"
PUT_MODE (operands[3], QImode);
if (D_REG_P (operands[2]))
@@ -3034,8 +3062,8 @@
(match_operand:HI 2 "general_operand" "dimu")
(const_int 8))]))]
"z_replacement_completed == 2"
- [(set (reg:QI 6) (match_dup 5))
- (set (reg:QI 5) (match_dup 4))]
+ [(set (reg:QI A_REGNUM) (match_dup 4))
+ (set (reg:QI B_REGNUM) (match_dup 5))]
"
if (GET_CODE (operands[3]) == AND)
{
@@ -3074,9 +3102,9 @@
(const_int 16))
(match_operand:SI 2 "general_operand" "uim,0")]))]
"reload_completed"
- [(set (reg:HI 1) (match_dup 4))
- (set (reg:HI 1) (match_op_dup 3 [(reg:HI 1) (match_dup 5)]))
- (set (reg:HI 0) (match_dup 6))]
+ [(set (reg:HI D_REGNUM) (match_dup 4))
+ (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 5)]))
+ (set (reg:HI X_REGNUM) (match_dup 6))]
"operands[5] = m68hc11_gen_highpart (HImode, operands[1]);
if (X_REG_P (operands[2]))
{
@@ -3110,11 +3138,11 @@
(const_int 16))
(match_operand:SI 2 "general_operand" "0,0")]))]
"z_replacement_completed == 2"
- [(parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])
- (set (reg:HI 1) (match_op_dup 3 [(reg:HI 1) (match_dup 4)]))
- (parallel [(set (reg:HI 1) (reg:HI 0))
- (set (reg:HI 0) (reg:HI 1))])]
+ [(parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 4)]))
+ (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
+ (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])]
"operands[4] = m68hc11_gen_lowpart (HImode, operands[1]);
PUT_MODE (operands[3], HImode);")
@@ -3177,17 +3205,19 @@
/* If we are adding a small constant to X or Y, it's
better to use one or several inx/iny instructions. */
&& !(GET_CODE (operands[3]) == PLUS
- && (TARGET_M6812
+ && ((TARGET_M6812
+ && (immediate_operand (operands[2], HImode)
+ || hard_reg_operand (operands[2], HImode)))
|| (GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) >= -4
&& INTVAL (operands[2]) <= 4)))"
[(set (match_dup 4) (match_dup 5))
(set (match_dup 8) (match_dup 7))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1) (match_op_dup 3 [(reg:HI 1) (match_dup 6)]))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 6)]))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"
/* Save the operand2 in a temporary location and use it. */
if (H_REG_P (operands[2])
@@ -3224,16 +3254,18 @@
/* If we are adding a small constant to X or Y, it's
better to use one or several inx/iny instructions. */
&& !(GET_CODE (operands[3]) == PLUS
- && (TARGET_M6812
+ && ((TARGET_M6812
+ && (immediate_operand (operands[2], HImode)
+ || hard_reg_operand (operands[2], HImode)))
|| (GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) >= -4
&& INTVAL (operands[2]) <= 4)))"
[(set (match_dup 0) (match_dup 1))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1) (match_op_dup 3 [(reg:HI 1) (match_dup 2)]))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 2)]))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"
")
@@ -3283,11 +3315,11 @@
[(match_operand 1 "general_operand" "uim*d*A")]))]
"z_replacement_completed == 2"
[(set (match_dup 4) (match_dup 5))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1) (match_op_dup 2 [(match_dup 3)]))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_op_dup 2 [(match_dup 3)]))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"
{
if ((H_REG_P (operands[1])
@@ -3331,11 +3363,11 @@
&& GET_CODE (operands[2]) == CONST_INT
&& (INTVAL (operands[2]) == 1 || INTVAL (operands[2]) == -1))"
[(set (match_dup 5) (match_dup 6))
- (parallel [(set (reg:HI 1) (match_dup 4))
- (set (match_dup 4) (reg:HI 1))])
- (set (reg:QI 1) (match_op_dup 3 [(reg:QI 1) (match_dup 7)]))
- (parallel [(set (reg:HI 1) (match_dup 4))
- (set (match_dup 4) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 4))
+ (set (match_dup 4) (reg:HI D_REGNUM))])
+ (set (reg:QI D_REGNUM) (match_op_dup 3 [(reg:QI D_REGNUM) (match_dup 7)]))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 4))
+ (set (match_dup 4) (reg:HI D_REGNUM))])]
"operands[4] = gen_rtx (REG, HImode, REGNO (operands[0]));
/* For the second operand is a hard register or if the address
@@ -3410,11 +3442,11 @@
[(match_operand:QI 1 "general_operand" "uim*d*x*y")]))]
"z_replacement_completed == 2"
[(set (match_dup 4) (match_dup 5))
- (parallel [(set (reg:HI 1) (match_dup 3))
- (set (match_dup 3) (reg:HI 1))])
- (set (reg:QI 1) (match_op_dup 2 [(match_dup 6)]))
- (parallel [(set (reg:HI 1) (match_dup 3))
- (set (match_dup 3) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+ (set (match_dup 3) (reg:HI D_REGNUM))])
+ (set (reg:QI D_REGNUM) (match_op_dup 2 [(match_dup 6)]))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 3))
+ (set (match_dup 3) (reg:HI D_REGNUM))])]
"
{
operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
@@ -3530,12 +3562,12 @@
(not:SI (match_operand:SI 1 "non_push_operand" "0")))]
"z_replacement_completed == 2
&& (!D_REG_P (operands[0]) || (optimize && optimize_size == 0))"
- [(set (reg:HI 1) (not:HI (reg:HI 1)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])
- (set (reg:HI 1) (not:HI (reg:HI 1)))
- (parallel [(set (reg:HI 0) (reg:HI 1))
- (set (reg:HI 1) (reg:HI 0))])]
+ [(set (reg:HI D_REGNUM) (not:HI (reg:HI D_REGNUM)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])
+ (set (reg:HI D_REGNUM) (not:HI (reg:HI D_REGNUM)))
+ (parallel [(set (reg:HI X_REGNUM) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (reg:HI X_REGNUM))])]
"
{
/* The result pattern only works for D register.
@@ -3623,15 +3655,15 @@
(set (match_dup 4) (match_dup 2))
(set (match_dup 2) (match_dup 5))
- (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 6) (match_dup 2))
(set (match_dup 2) (match_dup 7))
- (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 8) (match_dup 2))
(set (match_dup 2) (match_dup 9))
- (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 10) (match_dup 2))]
"operands[3] = m68hc11_gen_lowpart (SImode, operands[1]);
operands[5] = m68hc11_gen_highpart (HImode, operands[3]);
@@ -3663,8 +3695,8 @@
(const_int 16))
(match_operand:SI 2 "general_operand" "0")))]
"z_replacement_completed == 2"
- [(set (reg:HI 1) (plus:HI (reg:HI 1) (match_dup 3)))
- (set (reg:HI 0) (plus:HI (plus:HI (reg:HI 0) (const_int 0)) (reg:HI 7)))]
+ [(set (reg:HI D_REGNUM) (plus:HI (reg:HI D_REGNUM) (match_dup 3)))
+ (set (reg:HI X_REGNUM) (plus:HI (plus:HI (reg:HI X_REGNUM) (const_int 0)) (reg:HI CC_REGNUM)))]
"operands[3] = m68hc11_gen_highpart (HImode, operands[1]);")
(define_insn "addsi_ashift16"
@@ -3685,7 +3717,7 @@
(match_operand:SI 1 "general_operand" "0")))
(clobber (match_scratch:HI 3 "=X"))]
"0 && reload_completed && z_replacement_completed == 2"
- [(set (reg:HI 0) (plus:HI (reg:HI 0) (match_dup 4)))]
+ [(set (reg:HI X_REGNUM) (plus:HI (reg:HI X_REGNUM) (match_dup 4)))]
"
{
operands[4] = m68hc11_gen_lowpart (HImode, operands[2]);
@@ -3705,8 +3737,8 @@
(const_int 65535))
(match_operand:SI 2 "general_operand" "0")))]
"z_replacement_completed == 2"
- [(set (reg:HI 1) (plus:HI (reg:HI 1) (match_dup 3)))
- (set (reg:HI 0) (plus:HI (plus:HI (reg:HI 0) (const_int 0)) (reg:HI 7)))]
+ [(set (reg:HI D_REGNUM) (plus:HI (reg:HI D_REGNUM) (match_dup 3)))
+ (set (reg:HI X_REGNUM) (plus:HI (plus:HI (reg:HI X_REGNUM) (const_int 0)) (reg:HI CC_REGNUM)))]
"operands[3] = m68hc11_gen_lowpart (HImode, operands[1]);")
;;
@@ -3766,8 +3798,8 @@
(const_int 16)))
(clobber (match_scratch:HI 2 "=X"))]
"reload_completed"
- [(set (reg:HI 0) (match_dup 1))
- (set (reg:HI 1) (const_int 0))]
+ [(set (reg:HI X_REGNUM) (match_dup 1))
+ (set (reg:HI D_REGNUM) (const_int 0))]
"")
(define_insn "*ashlsi3_const1"
@@ -3910,7 +3942,7 @@
(define_insn "*ashlhi3_2"
[(set (match_operand:HI 0 "register_operand" "=d")
(ashift:HI (match_operand:HI 1 "register_operand" "0")
- (match_operand:HI 2 "register_operand" "x")))
+ (match_operand:HI 2 "register_operand" "+x")))
(clobber (match_dup 2))]
""
"*
@@ -3919,10 +3951,10 @@
return \"bsr\\t___lshlhi3\";
}")
-(define_insn ""
+(define_insn "*ashlhi3"
[(set (strict_low_part (match_operand:HI 0 "register_operand" "+d"))
(ashift:HI (match_dup 0)
- (match_operand:HI 1 "register_operand" "x")))
+ (match_operand:HI 1 "register_operand" "+x")))
(clobber (match_dup 1))]
""
"*
@@ -4177,9 +4209,9 @@
output_asm_insn (\"rolb\", operands);
output_asm_insn (\"rola\", operands);
output_asm_insn (\"tab\", operands);
- output_asm_insn (\"anda\\t#1\", operands);
+ output_asm_insn (\"anda\\t#0\", operands);
output_asm_insn (\"bcc\\t%l0\", ops);
- output_asm_insn (\"oraa\\t#0xFE\", ops);
+ output_asm_insn (\"coma\", ops);
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\",
CODE_LABEL_NUMBER (ops[0]));
@@ -4199,7 +4231,7 @@
(define_insn "*ashrhi3"
[(set (match_operand:HI 0 "register_operand" "=d,x")
(ashiftrt:HI (match_operand:HI 1 "register_operand" "0,0")
- (match_operand:HI 2 "register_operand" "x,d")))
+ (match_operand:HI 2 "register_operand" "+x,+d")))
(clobber (match_dup 2))]
""
"*
@@ -4387,14 +4419,14 @@
(match_operand:DI 2 "const_int_operand" "")))
(clobber (match_scratch:HI 3 "=d"))]
"z_replacement_completed && INTVAL (operands[2]) >= 56"
- [(set (reg:QI 1) (match_dup 9))
- (set (reg:QI 1) (lshiftrt:QI (reg:QI 1) (match_dup 8)))
- (set (reg:HI 1) (zero_extend:HI (reg:QI 1)))
- (set (match_dup 4) (reg:HI 1))
- (set (reg:QI 1) (const_int 0))
- (set (match_dup 5) (reg:HI 1))
- (set (match_dup 6) (reg:HI 1))
- (set (match_dup 7) (reg:HI 1))]
+ [(set (reg:QI D_REGNUM) (match_dup 9))
+ (set (reg:QI D_REGNUM) (lshiftrt:QI (reg:QI D_REGNUM) (match_dup 8)))
+ (set (reg:HI D_REGNUM) (zero_extend:HI (reg:QI D_REGNUM)))
+ (set (match_dup 4) (reg:HI D_REGNUM))
+ (set (reg:QI D_REGNUM) (const_int 0))
+ (set (match_dup 5) (reg:HI D_REGNUM))
+ (set (match_dup 6) (reg:HI D_REGNUM))
+ (set (match_dup 7) (reg:HI D_REGNUM))]
"operands[8] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 56);
operands[4] = m68hc11_gen_lowpart (SImode, operands[0]);
operands[5] = m68hc11_gen_highpart (HImode, operands[4]);
@@ -4415,13 +4447,13 @@
(clobber (match_scratch:HI 3 "=d"))]
"z_replacement_completed && INTVAL (operands[2]) >= 48
&& INTVAL (operands[2]) < 56"
- [(set (reg:HI 1) (match_dup 9))
- (set (reg:HI 1) (lshiftrt:HI (reg:HI 1) (match_dup 8)))
- (set (match_dup 4) (reg:HI 1))
- (set (reg:HI 1) (const_int 0))
- (set (match_dup 5) (reg:HI 1))
- (set (match_dup 6) (reg:HI 1))
- (set (match_dup 7) (reg:HI 1))]
+ [(set (reg:HI D_REGNUM) (match_dup 9))
+ (set (reg:HI D_REGNUM) (lshiftrt:HI (reg:HI D_REGNUM) (match_dup 8)))
+ (set (match_dup 4) (reg:HI D_REGNUM))
+ (set (reg:HI D_REGNUM) (const_int 0))
+ (set (match_dup 5) (reg:HI D_REGNUM))
+ (set (match_dup 6) (reg:HI D_REGNUM))
+ (set (match_dup 7) (reg:HI D_REGNUM))]
"operands[8] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 48);
operands[4] = m68hc11_gen_lowpart (SImode, operands[0]);
operands[5] = m68hc11_gen_highpart (HImode, operands[4]);
@@ -4452,15 +4484,15 @@
(set (match_dup 4) (match_dup 2))
(set (match_dup 2) (match_dup 5))
- (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 6) (match_dup 2))
(set (match_dup 2) (match_dup 7))
- (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 8) (match_dup 2))
(set (match_dup 2) (match_dup 9))
- (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI 7)))
+ (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
(set (match_dup 10) (match_dup 2))]
"operands[3] = m68hc11_gen_highpart (SImode, operands[1]);
operands[5] = m68hc11_gen_lowpart (HImode, operands[3]);
@@ -4508,8 +4540,10 @@
(const_int 16)))
(clobber (match_scratch:HI 2 "=X,X,X,X"))]
""
- "#
+ "@
+ #
xgdx\\n\\tldx\\t#0
+ #
#")
(define_insn "*lshrsi3_const1"
@@ -4727,7 +4761,7 @@
(define_insn "*lshrhi3"
[(set (match_operand:HI 0 "register_operand" "=d,x")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "0,0")
- (match_operand:HI 2 "register_operand" "x,d")))
+ (match_operand:HI 2 "register_operand" "+x,+d")))
(clobber (match_dup 2))]
""
"*
@@ -4868,7 +4902,7 @@
(define_insn "*rotlqi3_with_carry"
[(set (match_operand:QI 0 "register_operand" "=d,!q")
(rotate:QI (match_operand:QI 1 "register_operand" "0,0")
- (reg:QI 7)))]
+ (reg:QI CC_REGNUM)))]
""
"*
{
@@ -4881,7 +4915,7 @@
(define_insn "*rotlhi3_with_carry"
[(set (match_operand:HI 0 "register_operand" "=d")
(rotate:HI (match_operand:HI 1 "register_operand" "0")
- (reg:HI 7)))]
+ (reg:HI CC_REGNUM)))]
""
"*
{
@@ -4892,7 +4926,7 @@
(define_insn "*rotrhi3_with_carry"
[(set (match_operand:HI 0 "register_operand" "=d")
(rotatert:HI (match_operand:HI 1 "register_operand" "0")
- (reg:HI 7)))]
+ (reg:HI CC_REGNUM)))]
""
"*
{
@@ -5328,7 +5362,7 @@
;;
;;- Call a function that returns no value.
(define_insn "call"
- [(call (match_operand:QI 0 "memory_operand" "mAi")
+ [(call (match_operand:QI 0 "memory_operand" "m")
(match_operand:SI 1 "general_operand" "g"))]
;; Operand 1 not really used on the m68hc11.
""
@@ -5349,7 +5383,7 @@
(define_insn "call_value"
[(set (match_operand 0 "" "=g")
- (call (match_operand:QI 1 "general_operand" "mAi")
+ (call (match_operand:QI 1 "memory_operand" "m")
(match_operand:SI 2 "general_operand" "g")))]
""
"*
@@ -5478,7 +5512,7 @@
(define_insn "*return_16bit"
[(return)
- (use (reg:HI 1))]
+ (use (reg:HI D_REGNUM))]
"reload_completed && m68hc11_total_frame_size () == 0"
"*
{
@@ -5545,13 +5579,13 @@
(define_peephole
[(set (match_operand:HI 0 "hard_reg_operand" "xy")
(match_operand:HI 1 "const_int_operand" ""))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1)
- (plus (reg:HI 1)
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM)
+ (plus (reg:HI D_REGNUM)
(match_operand:HI 2 "general_operand" "")))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"(INTVAL (operands[1]) & 0x0FF) == 0"
"*
{
@@ -5634,9 +5668,9 @@
;; (set ...) insn.
;;
(define_peephole
- [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI 1))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI D_REGNUM))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"find_regno_note (ins1, REG_DEAD, HARD_D_REGNUM)"
"*
{
@@ -5648,10 +5682,10 @@
;; Same as above but due to some split, there may be a noop set
;; between the two.
(define_peephole
- [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI 1))
+ [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI D_REGNUM))
(set (match_dup 0) (match_dup 0))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
"find_regno_note (ins1, REG_DEAD, HARD_D_REGNUM)"
"*
{
@@ -5665,9 +5699,9 @@
;; and we must, at least, setup X/Y with value of D.
;;
(define_peephole
- [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI 1))
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ [(set (match_operand:HI 0 "hard_reg_operand" "A") (reg:HI D_REGNUM))
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
""
"*
{
@@ -5685,9 +5719,9 @@
;;; need to emit anything. Otherwise, we just need an copy of D to X/Y.
;;;
(define_peephole
- [(parallel [(set (reg:HI 1) (match_operand:HI 0 "hard_reg_operand" "A"))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1) (match_dup 0))]
+ [(parallel [(set (reg:HI D_REGNUM) (match_operand:HI 0 "hard_reg_operand" "A"))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_dup 0))]
"find_regno_note (insn, REG_DEAD, REGNO (operands[0]))"
"*
{
@@ -5701,9 +5735,9 @@
;;; need to emit anything. Otherwise, we just need an copy of D to X/Y.
;;;
(define_peephole
- [(parallel [(set (reg:HI 1) (match_operand:HI 0 "hard_reg_operand" "A"))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:QI 1) (match_operand:QI 1 "hard_reg_operand" "A"))]
+ [(parallel [(set (reg:HI D_REGNUM) (match_operand:HI 0 "hard_reg_operand" "A"))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:QI D_REGNUM) (match_operand:QI 1 "hard_reg_operand" "A"))]
"REGNO (operands[0]) == REGNO (operands[1])
&& find_regno_note (insn, REG_DEAD, REGNO (operands[0]))"
"*
@@ -5718,9 +5752,9 @@
;;; need to emit anything. Otherwise, we just need a copy of D to X/Y.
;;;
(define_peephole
- [(parallel [(set (reg:HI 1) (match_operand:HI 0 "hard_reg_operand" "A"))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:HI 1) (match_dup 0))]
+ [(parallel [(set (reg:HI D_REGNUM) (match_operand:HI 0 "hard_reg_operand" "A"))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:HI D_REGNUM) (match_dup 0))]
""
"*
{
@@ -5738,9 +5772,9 @@
;;; with the xgdx.
;;;
(define_peephole
- [(parallel [(set (reg:HI 1) (match_operand:HI 0 "hard_reg_operand" "A"))
- (set (match_dup 0) (reg:HI 1))])
- (set (reg:QI 1) (match_operand:QI 1 "hard_reg_operand" "A"))]
+ [(parallel [(set (reg:HI D_REGNUM) (match_operand:HI 0 "hard_reg_operand" "A"))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (set (reg:QI D_REGNUM) (match_operand:QI 1 "hard_reg_operand" "A"))]
"REGNO (operands[0]) == REGNO (operands[1])"
"*
{
@@ -5757,10 +5791,10 @@
;;; Catch two consecutive xgdx or xgdy, emit nothing.
;;;
(define_peephole
- [(parallel [(set (reg:HI 1) (match_operand:HI 0 "hard_reg_operand" "A"))
- (set (match_dup 0) (reg:HI 1))])
- (parallel [(set (reg:HI 1) (match_dup 0))
- (set (match_dup 0) (reg:HI 1))])]
+ [(parallel [(set (reg:HI D_REGNUM) (match_operand:HI 0 "hard_reg_operand" "A"))
+ (set (match_dup 0) (reg:HI D_REGNUM))])
+ (parallel [(set (reg:HI D_REGNUM) (match_dup 0))
+ (set (match_dup 0) (reg:HI D_REGNUM))])]
""
"*
{
@@ -5834,7 +5868,7 @@
;;
(define_peephole
[(set (match_operand:HI 0 "hard_reg_operand" "dA") (const_int -1))
- (set (match_dup 0) (plus:HI (match_dup 0) (reg:HI 3)))]
+ (set (match_dup 0) (plus:HI (match_dup 0) (reg:HI SP_REGNUM)))]
"TARGET_M6811"
"*
{
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