diff options
Diffstat (limited to 'gcc/config/mips/mips.h')
| -rw-r--r-- | gcc/config/mips/mips.h | 45 |
1 files changed, 30 insertions, 15 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index e8abdcaef9e..9a55f02fc7c 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -114,6 +114,13 @@ struct mips_cpu_info { int isa; }; +/* Enumerates the setting of the -mcode-readable option. */ +enum mips_code_readable_setting { + CODE_READABLE_NO, + CODE_READABLE_PCREL, + CODE_READABLE_YES +}; + #ifndef USED_FOR_TARGET extern char mips_print_operand_punct[256]; /* print_operand punctuation chars */ extern const char *current_function_file; /* filename current function is in */ @@ -138,6 +145,7 @@ extern const struct mips_cpu_info mips_cpu_info_table[]; extern const struct mips_cpu_info *mips_arch_info; extern const struct mips_cpu_info *mips_tune_info; extern const struct mips_rtx_cost_data *mips_cost; +extern enum mips_code_readable_setting mips_code_readable; #endif /* Macros to silence warnings about numbers being signed in traditional @@ -214,6 +222,16 @@ extern const struct mips_rtx_cost_data *mips_cost; /* Generate mips16e register save/restore sequences. */ #define GENERATE_MIPS16E_SAVE_RESTORE (GENERATE_MIPS16E && mips_abi == ABI_32) +/* True if we're generating a form of MIPS16 code in which general + text loads are allowed. */ +#define TARGET_MIPS16_TEXT_LOADS \ + (TARGET_MIPS16 && mips_code_readable == CODE_READABLE_YES) + +/* True if we're generating a form of MIPS16 code in which PC-relative + loads are allowed. */ +#define TARGET_MIPS16_PCREL_LOADS \ + (TARGET_MIPS16 && mips_code_readable >= CODE_READABLE_PCREL) + /* Generic ISA defines. */ #define ISA_MIPS1 (mips_isa == 1) #define ISA_MIPS2 (mips_isa == 2) @@ -2270,17 +2288,18 @@ typedef struct mips_args { #define SYMBOL_REF_LONG_CALL_P(X) \ ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_LONG_CALL) != 0) -/* Specify the machine mode that this machine uses - for the index in the tablejump instruction. - ??? Using HImode in mips16 mode can cause overflow. */ -#define CASE_VECTOR_MODE \ - (TARGET_MIPS16 ? HImode : ptr_mode) +/* True if we're generating a form of MIPS16 code in which jump tables + are stored in the text section and encoded as 16-bit PC-relative + offsets. This is only possible when general text loads are allowed, + since the table access itself will be an "lh" instruction. */ +/* ??? 16-bit offsets can overflow in large functions. */ +#define TARGET_MIPS16_SHORT_JUMP_TABLES TARGET_MIPS16_TEXT_LOADS -/* Define as C expression which evaluates to nonzero if the tablejump - instruction expects the table to contain offsets from the address of the - table. - Do not define this if the table should contain absolute addresses. */ -#define CASE_VECTOR_PC_RELATIVE (TARGET_MIPS16) +#define JUMP_TABLES_IN_TEXT_SECTION TARGET_MIPS16_SHORT_JUMP_TABLES + +#define CASE_VECTOR_MODE (TARGET_MIPS16_SHORT_JUMP_TABLES ? HImode : ptr_mode) + +#define CASE_VECTOR_PC_RELATIVE TARGET_MIPS16_SHORT_JUMP_TABLES /* Define this as 1 if `char' should by default be signed; else as 0. */ #ifndef DEFAULT_SIGNED_CHAR @@ -2650,7 +2669,7 @@ while (0) #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ do { \ - if (TARGET_MIPS16) \ + if (TARGET_MIPS16_SHORT_JUMP_TABLES) \ fprintf (STREAM, "\t.half\t%sL%d-%sL%d\n", \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ else if (TARGET_GPWORD) \ @@ -2673,10 +2692,6 @@ do { \ LOCAL_LABEL_PREFIX, VALUE); \ } while (0) -/* When generating MIPS16 code, we want the jump table to be in the text - section so that we can load its address using a PC-relative addition. */ -#define JUMP_TABLES_IN_TEXT_SECTION TARGET_MIPS16 - /* This is how to output an assembler line that says to advance the location counter to a multiple of 2**LOG bytes. */ |