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Diffstat (limited to 'gcc/config/sparc/sparc.md')
-rw-r--r--gcc/config/sparc/sparc.md26
1 files changed, 13 insertions, 13 deletions
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 21cf0a3bc8c..b15c39e4524 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -8113,19 +8113,19 @@
;; Optimize (1LL<<x)-1
;; XXX this also needs to be fixed to handle equal subregs
;; XXX first before we could re-enable it.
-(define_insn ""
- [(set (match_operand:DI 0 "register_operand" "=h")
- (plus:DI (ashift:DI (const_int 1)
- (match_operand:SI 2 "arith_operand" "rI"))
- (const_int -1)))]
- "0 && TARGET_V8PLUS"
- "*
-{
- if (GET_CODE (operands[2]) == REG && REGNO (operands[2]) == REGNO (operands[0]))
- return \"mov\\t1, %L0\;sllx\\t%L0, %2, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
- return \"mov\\t1, %H0\;sllx\\t%H0, %2, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
-}"
- [(set_attr "length" "4")])
+;(define_insn ""
+; [(set (match_operand:DI 0 "register_operand" "=h")
+; (plus:DI (ashift:DI (const_int 1)
+; (match_operand:SI 1 "arith_operand" "rI"))
+; (const_int -1)))]
+; "0 && TARGET_V8PLUS"
+; "*
+;{
+; if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == REGNO (operands[0]))
+; return \"mov\\t1, %L0\;sllx\\t%L0, %1, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
+; return \"mov\\t1, %H0\;sllx\\t%H0, %1, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
+;}"
+; [(set_attr "length" "4")])
(define_insn "*cmp_cc_ashift_1"
[(set (reg:CC_NOOV 100)