diff options
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 545 |
1 files changed, 517 insertions, 28 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e12241c97c1..20a9395f0b7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -307,6 +307,7 @@ Objective-C and Objective-C++ Dialects}. -fcompare-debug@r{[}=@var{opts}@r{]} -fcompare-debug-second @gol -feliminate-dwarf2-dups -feliminate-unused-debug-types @gol -feliminate-unused-debug-symbols -femit-class-debug-always @gol +-fenable-icf-debug @gol -fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs @gol -frandom-seed=@var{string} -fsched-verbose=@var{n} @gol -fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose @gol @@ -320,7 +321,7 @@ Objective-C and Objective-C++ Dialects}. -femit-struct-debug-baseonly -femit-struct-debug-reduced @gol -femit-struct-debug-detailed@r{[}=@var{spec-list}@r{]} @gol -p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol --print-multi-directory -print-multi-lib @gol +-print-multi-directory -print-multi-lib -print-multi-os-directory @gol -print-prog-name=@var{program} -print-search-dirs -Q @gol -print-sysroot -print-sysroot-headers-suffix @gol -save-temps -save-temps=cwd -save-temps=obj -time@r{[}=@var{file}@r{]}} @@ -345,12 +346,13 @@ Objective-C and Objective-C++ Dialects}. -finline-small-functions -fipa-cp -fipa-cp-clone -fipa-matrix-reorg -fipa-pta @gol -fipa-pure-const -fipa-reference -fipa-struct-reorg @gol -fipa-type-escape -fira-algorithm=@var{algorithm} @gol --fira-region=@var{region} -fira-coalesce -fno-ira-share-save-slots @gol +-fira-region=@var{region} -fira-coalesce @gol +-fira-loop-pressure -fno-ira-share-save-slots @gol -fno-ira-share-spill-slots -fira-verbose=@var{n} @gol -fivopts -fkeep-inline-functions -fkeep-static-consts @gol -floop-block -floop-interchange -floop-strip-mine -fgraphite-identity @gol --floop-parallelize-all @gol --fmerge-all-constants -fmerge-constants -fmodulo-sched @gol +-floop-parallelize-all -flto -flto-compression-level -flto-report -fltrans @gol +-fltrans-output-list -fmerge-all-constants -fmerge-constants -fmodulo-sched @gol -fmodulo-sched-allow-regmoves -fmove-loop-invariants -fmudflap @gol -fmudflapir -fmudflapth -fno-branch-count-reg -fno-default-inline @gol -fno-defer-pop -fno-function-cse -fno-guess-branch-probability @gol @@ -389,7 +391,7 @@ Objective-C and Objective-C++ Dialects}. -funit-at-a-time -funroll-all-loops -funroll-loops @gol -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol --fwhole-program @gol +-fwhole-program -fwhopr -fwpa -fuse-linker-plugin @gol --param @var{name}=@var{value} -O -O0 -O1 -O2 -O3 -Os} @@ -471,7 +473,7 @@ Objective-C and Objective-C++ Dialects}. -mfix-cortex-m3-ldrd} @emph{AVR Options} -@gccoptlist{-mmcu=@var{mcu} -msize -mno-interrupts @gol +@gccoptlist{-mmcu=@var{mcu} -mno-interrupts @gol -mcall-prologues -mtiny-stack -mint8} @emph{Blackfin Options} @@ -592,7 +594,7 @@ Objective-C and Objective-C++ Dialects}. -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol -maes -mpclmul @gol --msse4a -m3dnow -mpopcnt -mabm -mfma4 @gol +-msse4a -m3dnow -mpopcnt -mabm -mfma4 -mxop -mlwp @gol -mthreads -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol @@ -707,7 +709,7 @@ Objective-C and Objective-C++ Dialects}. -mbranch-cost=@var{num} -mbranch-likely -mno-branch-likely @gol -mfp-exceptions -mno-fp-exceptions @gol -mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol --mrelax-pic-calls -mno-relax-pic-calls} +-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address} @emph{MMIX Options} @gccoptlist{-mlibfuncs -mno-libfuncs -mepsilon -mno-epsilon -mabi=gnu @gol @@ -781,6 +783,18 @@ See RS/6000 and PowerPC Options. -msim -mmvme -mads -myellowknife -memb -msdata @gol -msdata=@var{opt} -mvxworks -G @var{num} -pthread} +@emph{RX Options} +@gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol +-mcpu= -patch=@gol +-mbig-endian-data -mlittle-endian-data @gol +-msmall-data @gol +-msim -mno-sim@gol +-mas100-syntax -mno-as100-syntax@gol +-mrelax@gol +-mmax-constant-size=@gol +-mint-register=@gol +-msave-acc-in-interrupts} + @emph{S/390 and zSeries Options} @gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol -mhard-float -msoft-float -mhard-dfp -mno-hard-dfp @gol @@ -834,7 +848,11 @@ See RS/6000 and PowerPC Options. -msafe-dma -munsafe-dma @gol -mbranch-hints @gol -msmall-mem -mlarge-mem -mstdmain @gol --mfixed-range=@var{register-range}} +-mfixed-range=@var{register-range} @gol +-mea32 -mea64 @gol +-maddress-space-conversion -mno-address-space-conversion @gol +-mcache-size=@var{cache-size} @gol +-matomic-updates -mno-atomic-updates} @emph{System V Options} @gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}} @@ -861,7 +879,8 @@ See i386 and x86-64 Options. @emph{i386 and x86-64 Windows Options} @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll --mnop-fun-dllimport -mthread -municode -mwin32 -mwindows} +-mnop-fun-dllimport -mthread -municode -mwin32 -mwindows +-fno-set-stack-executable} @emph{Xstormy16 Options} @gccoptlist{-msim} @@ -4315,7 +4334,7 @@ minimum maximum, so we do not diagnose overlength strings in C++@. This option is implied by @option{-pedantic}, and can be disabled with @option{-Wno-overlength-strings}. -@item -Wunsuffixed-float-constants +@item -Wunsuffixed-float-constants @r{(C and Objective-C only)} @opindex Wunsuffixed-float-constants GCC will issue a warning for any floating constant that does not have @@ -4609,6 +4628,11 @@ The default is @samp{-femit-struct-debug-detailed=all}. This option works only with DWARF 2. +@item -fenable-icf-debug +@opindex fenable-icf-debug +Generate additional debug information to support identical code folding (ICF). +This option only works with DWARF version 2 or higher. + @item -fno-merge-debug-strings @opindex fmerge-debug-strings @opindex fno-merge-debug-strings @@ -5524,6 +5548,16 @@ that enable them. The directory name is separated from the switches by @samp{-}, without spaces between multiple switches. This is supposed to ease shell-processing. +@item -print-multi-os-directory +@opindex print-multi-os-directory +Print the path to OS libraries for the selected +multilib, relative to some @file{lib} subdirectory. If OS libraries are +present in the @file{lib} subdirectory and no multilibs are used, this is +usually just @file{.}, if OS libraries are present in @file{lib@var{suffix}} +sibling directories this prints e.g.@: @file{../lib64}, @file{../lib} or +@file{../lib32}, or if OS libraries are present in @file{lib/@var{subdir}} +subdirectories it prints e.g.@: @file{amd64}, @file{sparcv9} or @file{ev6}. + @item -print-prog-name=@var{program} @opindex print-prog-name Like @option{-print-file-name}, but searches for a program such as @samp{cpp}. @@ -5621,6 +5655,9 @@ each of them. Not all optimizations are controlled directly by a flag. Only optimizations that have a flag are listed in this section. +Most of the optimizations are not enabled if a @option{-O} level is not set on +the command line, even if individual optimization flags are specified. + Depending on the target and how GCC was configured, a slightly different set of optimizations may be enabled at each @option{-O} level than those listed here. You can invoke GCC with @samp{-Q --help=optimizers} @@ -6210,6 +6247,15 @@ give the best results in most cases and for most architectures. Do optimistic register coalescing. This option might be profitable for architectures with big regular register files. +@item -fira-loop-pressure +@opindex fira-loop-pressure +Use IRA to evaluate register pressure in loops for decision to move +loop invariants. Usage of this option usually results in generation +of faster and smaller code on machines with big register files (>= 32 +registers) but it can slow compiler down. + +This option is enabled at level @option{-O3} for some targets. + @item -fno-ira-share-save-slots @opindex fno-ira-share-save-slots Switch off sharing stack slots used for saving call used hard @@ -7105,12 +7151,237 @@ and those merged by attribute @code{externally_visible} become static functions and in effect are optimized more aggressively by interprocedural optimizers. While this option is equivalent to proper use of the @code{static} keyword for programs consisting of a single file, in combination with option -@option{--combine} this flag can be used to compile many smaller scale C -programs since the functions and variables become local for the whole combined -compilation unit, not for the single source file itself. +@option{-combine}, @option{-flto} or @option{-fwhopr} this flag can be used to +compile many smaller scale programs since the functions and variables become +local for the whole combined compilation unit, not for the single source file +itself. This option implies @option{-fwhole-file} for Fortran programs. +@item -flto +@opindex flto +This option runs the standard link-time optimizer. When invoked +with source code, it generates GIMPLE (one of GCC's internal +representations) and writes it to special ELF sections in the object +file. When the object files are linked together, all the function +bodies are read from these ELF sections and instantiated as if they +had been part of the same translation unit. + +To use the link-timer optimizer, @option{-flto} needs to be specified at +compile time and during the final link. For example, + +@smallexample +gcc -c -O2 -flto foo.c +gcc -c -O2 -flto bar.c +gcc -o myprog -flto -O2 foo.o bar.o +@end smallexample + +The first two invocations to GCC will save a bytecode representation +of GIMPLE into special ELF sections inside @file{foo.o} and +@file{bar.o}. The final invocation will read the GIMPLE bytecode from +@file{foo.o} and @file{bar.o}, merge the two files into a single +internal image, and compile the result as usual. Since both +@file{foo.o} and @file{bar.o} are merged into a single image, this +causes all the inter-procedural analyses and optimizations in GCC to +work across the two files as if they were a single one. This means, +for example, that the inliner will be able to inline functions in +@file{bar.o} into functions in @file{foo.o} and vice-versa. + +Another (simpler) way to enable link-time optimization is, + +@smallexample +gcc -o myprog -flto -O2 foo.c bar.c +@end smallexample + +The above will generate bytecode for @file{foo.c} and @file{bar.c}, +merge them together into a single GIMPLE representation and optimize +them as usual to produce @file{myprog}. + +The only important thing to keep in mind is that to enable link-time +optimizations the @option{-flto} flag needs to be passed to both the +compile and the link commands. + +Note that when a file is compiled with @option{-flto}, the generated +object file will be larger than a regular object file because it will +contain GIMPLE bytecodes and the usual final code. This means that +object files with LTO information can be linked as a normal object +file. So, in the previous example, if the final link is done with + +@smallexample +gcc -o myprog foo.o bar.o +@end smallexample + +The only difference will be that no inter-procedural optimizations +will be applied to produce @file{myprog}. The two object files +@file{foo.o} and @file{bar.o} will be simply sent to the regular +linker. + +Additionally, the optimization flags used to compile individual files +are not necessarily related to those used at link-time. For instance, + +@smallexample +gcc -c -O0 -flto foo.c +gcc -c -O0 -flto bar.c +gcc -o myprog -flto -O3 foo.o bar.o +@end smallexample + +This will produce individual object files with unoptimized assembler +code, but the resulting binary @file{myprog} will be optimized at +@option{-O3}. Now, if the final binary is generated without +@option{-flto}, then @file{myprog} will not be optimized. + +When producing the final binary with @option{-flto}, GCC will only +apply link-time optimizations to those files that contain bytecode. +Therefore, you can mix and match object files and libraries with +GIMPLE bytecodes and final object code. GCC will automatically select +which files to optimize in LTO mode and which files to link without +further processing. + +There are some code generation flags that GCC will preserve when +generating bytecodes, as they need to be used during the final link +stage. Currently, the following options are saved into the GIMPLE +bytecode files: @option{-fPIC}, @option{-fcommon} and all the +@option{-m} target flags. + +At link time, these options are read-in and reapplied. Note that the +current implementation makes no attempt at recognizing conflicting +values for these options. If two or more files have a conflicting +value (e.g., one file is compiled with @option{-fPIC} and another +isn't), the compiler will simply use the last value read from the +bytecode files. It is recommended, then, that all the files +participating in the same link be compiled with the same options. + +Another feature of LTO is that it is possible to apply interprocedural +optimizations on files written in different languages. This requires +some support in the language front end. Currently, the C, C++ and +Fortran front ends are capable of emitting GIMPLE bytecodes, so +something like this should work + +@smallexample +gcc -c -flto foo.c +g++ -c -flto bar.cc +gfortran -c -flto baz.f90 +g++ -o myprog -flto -O3 foo.o bar.o baz.o -lgfortran +@end smallexample + +Notice that the final link is done with @command{g++} to get the C++ +runtime libraries and @option{-lgfortran} is added to get the Fortran +runtime libraries. In general, when mixing languages in LTO mode, you +should use the same link command used when mixing languages in a +regular (non-LTO) compilation. This means that if your build process +was mixing languages before, all you need to add is @option{-flto} to +all the compile and link commands. + +If object files containing GIMPLE bytecode are stored in a library +archive, say @file{libfoo.a}, it is possible to extract and use them +in an LTO link if you are using @command{gold} as the linker (which, +in turn requires GCC to be configured with @option{--enable-gold}). +To enable this feature, use the flag @option{-fuse-linker-plugin} at +link-time: + +@smallexample +gcc -o myprog -O2 -flto -fuse-linker-plugin a.o b.o -lfoo +@end smallexample + +With the linker plugin enabled, @command{gold} will extract the needed +GIMPLE files from @file{libfoo.a} and pass them on to the running GCC +to make them part of the aggregated GIMPLE image to be optimized. + +If you are not using @command{gold} and/or do not specify +@option{-fuse-linker-plugin} then the objects inside @file{libfoo.a} +will be extracted and linked as usual, but they will not participate +in the LTO optimization process. + +Link time optimizations do not require the presence of the whole +program to operate. If the program does not require any symbols to +be exported, it is possible to combine @option{-flto} and +@option{-fwhopr} with @option{-fwhole-program} to allow the +interprocedural optimizers to use more aggressive assumptions which +may lead to improved optimization opportunities. + +Regarding portability: the current implementation of LTO makes no +attempt at generating bytecode that can be ported between different +types of hosts. The bytecode files are versioned and there is a +strict version check, so bytecode files generated in one version of +GCC will not work with an older/newer version of GCC. + +This option is disabled by default. + +@item -fwhopr +@opindex fwhopr +This option is identical in functionality to @option{-flto} but it +differs in how the final link stage is executed. Instead of loading +all the function bodies in memory, the callgraph is analyzed and +optimization decisions are made (whole program analysis or WPA). Once +optimization decisions are made, the callgraph is partitioned and the +different sections are compiled separately (local transformations or +LTRANS)@. This process allows optimizations on very large programs +that otherwise would not fit in memory. This option enables +@option{-fwpa} and @option{-fltrans} automatically. + +Disabled by default. + +@item -fwpa +@opindex fwpa +This is an internal option used by GCC when compiling with +@option{-fwhopr}. You should never need to use it. + +This option runs the link-time optimizer in the whole-program-analysis +(WPA) mode, which reads in summary information from all inputs and +performs a whole-program analysis based on summary information only. +It generates object files for subsequent runs of the link-time +optimizer where individual object files are optimized using both +summary information from the WPA mode and the actual function bodies. +It then drives the LTRANS phase. + +Disabled by default. + +@item -fltrans +@opindex fltrans +This is an internal option used by GCC when compiling with +@option{-fwhopr}. You should never need to use it. + +This option runs the link-time optimizer in the local-transformation (LTRANS) +mode, which reads in output from a previous run of the LTO in WPA mode. +In the LTRANS mode, LTO optimizes an object and produces the final assembly. + +Disabled by default. + +@item -fltrans-output-list=@var{file} +@opindex fltrans-output-list +This is an internal option used by GCC when compiling with +@option{-fwhopr}. You should never need to use it. + +This option specifies a file to which the names of LTRANS output files are +written. This option is only meaningful in conjunction with @option{-fwpa}. + +Disabled by default. + +@item -flto-compression-level=@var{n} +This option specifies the level of compression used for intermediate +language written to LTO object files, and is only meaningful in +conjunction with LTO mode (@option{-fwhopr}, @option{-flto}). Valid +values are 0 (no compression) to 9 (maximum compression). Values +outside this range are clamped to either 0 or 9. If the option is not +given, a default balanced compression setting is used. + +@item -flto-report +Prints a report with internal details on the workings of the link-time +optimizer. The contents of this report vary from version to version, +it is meant to be useful to GCC developers when processing object +files in LTO mode (via @option{-fwhopr} or @option{-flto}). + +Disabled by default. + +@item -fuse-linker-plugin +Enables the extraction of objects with GIMPLE bytecode information +from library archives. This option relies on features available only +in @command{gold}, so to use this you must configure GCC with +@option{--enable-gold}. See @option{-flto} for a description on the +effect of this flag and how to use it. + +Disabled by default. + @item -fcprop-registers @opindex fcprop-registers After register allocation and post-register allocation instruction splitting, @@ -8156,6 +8427,14 @@ lower quality register allocation algorithm will be used. The algorithm do not use pseudo-register conflicts. The default value of the parameter is 2000. +@item ira-loop-reserved-regs +IRA can be used to evaluate more accurate register pressure in loops +for decision to move loop invariants (see @option{-O3}). The number +of available registers reserved for some other purposes is described +by this parameter. The default value of the parameter is 2 which is +minimal number of registers needed for execution of typical +instruction. This value is the best found from numerous experiments. + @item loop-invariant-max-bbs-in-loop Loop invariant motion can be very expensive, both in compile time and in amount of needed compile time memory, with very large loops. Loops @@ -9268,6 +9547,7 @@ platform. * picoChip Options:: * PowerPC Options:: * RS/6000 and PowerPC Options:: +* RX Options:: * S/390 and zSeries Options:: * Score Options:: * SH Options:: @@ -9706,10 +9986,6 @@ Instruction set avr5 is for the enhanced AVR core with up to 128K program memory space (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323, atmega64, atmega128, at43usb355, at94k). -@item -msize -@opindex msize -Output instruction sizes to the asm file. - @item -mno-interrupts @opindex mno-interrupts Generated code is not compatible with hardware interrupts. @@ -10685,7 +10961,7 @@ These @samp{-m} options are defined for the DEC Alpha/VMS implementations: @table @gcctabopt @item -mvms-return-codes @opindex mvms-return-codes -Return VMS condition codes from main. The default is to return POSIX +Return VMS condition codes from main. The default is to return POSIX style condition (e.g.@: error) codes. @item -mdebug-main=@var{prefix} @@ -11729,6 +12005,10 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -mno-sse4a @itemx -mfma4 @itemx -mno-fma4 +@itemx -mxop +@itemx -mno-xop +@itemx -mlwp +@itemx -mno-lwp @itemx -m3dnow @itemx -mno-3dnow @itemx -mpopcnt @@ -11742,8 +12022,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @opindex m3dnow @opindex mno-3dnow These switches enable or disable the use of instructions in the MMX, -SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, SSE4A, FMA4, ABM or -3DNow!@: extended instruction sets. +SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, SSE4A, FMA4, XOP, +LWP, ABM or 3DNow!@: extended instruction sets. These extensions are also available as built-in functions: see @ref{X86 Built-in Functions}, for details of the functions enabled and disabled by these switches. @@ -11816,6 +12096,10 @@ Note that while the throughput of the sequence is higher than the throughput of the non-reciprocal instruction, the precision of the sequence can be decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994). +Note that GCC implements 1.0f/sqrtf(x) in terms of RSQRTSS (or RSQRTPS) +already with @option{-ffast-math} (or the above option combination), and +doesn't need @option{-mrecip}. + @item -mveclibabi=@var{type} @opindex mveclibabi Specifies the ABI type to use for vectorizing intrinsics using an @@ -13934,6 +14218,27 @@ an assembler and a linker that supports the @code{.reloc} assembly directive and @code{-mexplicit-relocs} is in effect. With @code{-mno-explicit-relocs}, this optimization can be performed by the assembler and the linker alone without help from the compiler. + +@item -mmcount-ra-address +@itemx -mno-mcount-ra-address +@opindex mmcount-ra-address +@opindex mno-mcount-ra-address +Emit (do not emit) code that allows @code{_mcount} to modify the +calling function's return address. When enabled, this option extends +the usual @code{_mcount} interface with a new @var{ra-address} +parameter, which has type @code{intptr_t *} and is passed in register +@code{$12}. @code{_mcount} can then modify the return address by +doing both of the following: +@itemize +@item +Returning the new address in register @code{$31}. +@item +Storing the new address in @code{*@var{ra-address}}, +if @var{ra-address} is nonnull. +@end itemize + +The default is @option{-mno-mcount-ra-address}. + @end table @node MMIX Options @@ -14379,11 +14684,11 @@ Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type @var{cpu_type}. Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp}, -@samp{505}, @samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604}, -@samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400}, -@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, -@samp{860}, @samp{970}, @samp{8540}, @samp{e300c2}, @samp{e300c3}, -@samp{e500mc}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, +@samp{476}, @samp{476fp}, @samp{505}, @samp{601}, @samp{602}, @samp{603}, +@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740}, +@samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, +@samp{860}, @samp{970}, @samp{8540}, @samp{a2}, @samp{e300c2}, +@samp{e300c3}, @samp{e500mc}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{common}, @samp{powerpc}, @samp{powerpc64}, @samp{rios}, @@ -14727,7 +15032,7 @@ hardware floating is used. @opindex mmulhw @opindex mno-mulhw Generate code that uses (does not use) the half-word multiply and -multiply-accumulate instructions on the IBM 405, 440 and 464 processors. +multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors. These instructions are generated by default when targetting those processors. @@ -14736,7 +15041,7 @@ processors. @opindex mdlmzb @opindex mno-dlmzb Generate code that uses (does not use) the string-search @samp{dlmzb} -instruction on the IBM 405, 440 and 464 processors. This instruction is +instruction on the IBM 405, 440, 464 and 476 processors. This instruction is generated by default when targetting those processors. @item -mno-bit-align @@ -15104,6 +15409,142 @@ This option sets flags for both the preprocessor and linker. @end table +@node RX Options +@subsection RX Options +@cindex RX Options + +These @option{-m} options are defined for RX implementations: + +@table @gcctabopt +@item -m64bit-doubles +@itemx -m32bit-doubles +@itemx -fpu +@itemx -nofpu +@opindex m64bit-doubles +@opindex m32bit-doubles +@opindex fpu +@opindex nofpu +Make the @code{double} data type be 64-bits (@option{-m64bit-doubles}) +or 32-bits (@option{-m32bit-doubles}) in size. The default is +@option{-m64bit-doubles}. @emph{Note} the RX's hardware floating +point instructions are only used for 32-bit floating point values, and +then only if @option{-ffast-math} has been specified on the command +line. This is because the RX FPU instructions do not properly support +denormal (or sub-normal) values. + +The options @option{-fpu} and @option{-nofpu} have been provided at +the request of Rensas for compatibility with their toolchain. The +@option{-mfpu} option enables the use of RX FPU instructions by +selecting 32-bit doubles and enabling unsafe math optimizations. The +@option{-mnofpu} option disables the use of RX FPU instructions, even +if @option{-m32bit-doubles} is active and unsafe math optimizations +have been enabled. + +@item -mcpu=@var{name} +@itemx -patch=@var{name} +@opindex -mcpu +@opindex -patch +Selects the type of RX CPU to be targeted. Currently on two types are +supported, the generic @var{RX600} and the specific @var{RX610}. The +only difference between them is that the @var{RX610} does not support +the @code{MVTIPL} instruction. + +@item -mbig-endian-data +@itemx -mlittle-endian-data +@opindex mbig-endian-data +@opindex mlittle-endian-data +Store data (but not code) in the big-endian format. The default is +@option{-mlittle-endian-data}, ie to store data in the little endian +format. + +@item -msmall-data-limit=@var{N} +@opindex msmall-data-limit +Specifies the maximum size in bytes of global and static variables +which can be placed into the small data area. Using the small data +area can lead to smaller and faster code, but the size of area is +limited and it is up to the programmer to ensure that the area does +not overflow. Also when the small data area is used one of the RX's +registers (@code{r13}) is reserved for use pointing to this area, so +it is no longer available for use by the compiler. This could result +in slower and/or larger code if variables which once could have been +held in @code{r13} are now pushed onto the stack. + +Note, common variables (variables which have not been initialised) and +constants are not placed into the small data area as they are assigned +to other sections in the output executeable. + +The default value is zero, which disables this feature. Note, this +feature is not enabled by default with higher optimization levels +(@option{-O2} etc) because of the potentially deterimental effects of +reserving register @code{r13}. It is up to the programmer to +experiment and discover whether this feature is of benefit to their +program. + +@item -msim +@item -mno-sim +@opindex msim +@opindex mno-sim +Use the simulator runtime. The default is to use the libgloss board +specific runtime. + +@item -mas100-syntax +@item -mno-as100-syntax +@opindex mas100-syntax +@opindex mno-as100-syntax +When generating assembler output use a syntax that is compatible with +Renesas's AS100 assembler. This syntax can also be handled by the GAS +assembler but it has some restrictions so generating it is not the +default option. + +@item -mmax-constant-size=@var{N} +@opindex mmax-constant-size +Specifies the maxium size, in bytes, of a constant that can be used as +an operand in a RX instruction. Although the RX instruction set does +allow consants of up to 4 bytes in length to be used in instructions, +a longer value equates to a longer instruction. Thus in some +circumstances it can be beneficial to restrict the size of constants +that are used in instructions. Constants that are too big are instead +placed into a constant pool and referenced via register indirection. + +The value @var{N} can be between 0 and 3. A value of 0, the default, +means that constants of any size are allowed. + +@item -mrelax +@opindex mrelax +Enable linker relaxation. Linker relaxation is a process whereby the +linker will attempt to reduce the size of a program by finding shorter +versions of various instructions. Disabled by default. + +@item -mint-register=@var{N} +@opindex mint-register +Specify the number of registers to reserve for fast interrupt handler +functions. The value @var{N} can be between 0 and 4. A value of 1 +means that register @code{r13} will be reserved for ther exclusive use +of fast interrupt handlers. A value of 2 reserves @code{r13} and +@code{r12}. A value of 3 reserves @code{r13}, @code{r12} and +@code{r11}, and a value of 4 reserves @code{r13} through @code{r10}. +A value of 0, the default, does not reserve any registers. + +@item -msave-acc-in-interrupts +@opindex msave-acc-in-interrupts +Specifies that interrupt handler functions should preserve the +accumulator register. This is only necessary if normal code might use +the accumulator register, for example because it performs 64-bit +multiplications. The default is to ignore the accumulator as this +makes the interrupt handlers faster. + +@end table + +@emph{Note:} The generic GCC command line @option{-ffixed-@var{reg}} +has special significance to the RX port when used with the +@code{interrupt} function attribute. This attribute indicates a +function intended to process fast interrupts. GCC will will ensure +that it only uses the registers @code{r10}, @code{r11}, @code{r12} +and/or @code{r13} and only provided that the normal use of the +corresponding registers have been restricted via the +@option{-ffixed-@var{reg}} or @option{-mint-register} command line +options. + @node S/390 and zSeries Options @subsection S/390 and zSeries Options @cindex S/390 and zSeries Options @@ -15983,6 +16424,46 @@ useful when compiling kernel code. A register range is specified as two registers separated by a dash. Multiple register ranges can be specified separated by a comma. +@item -mea32 +@itemx -mea64 +@opindex mea32 +@opindex mea64 +Compile code assuming that pointers to the PPU address space accessed +via the @code{__ea} named address space qualifier are either 32 or 64 +bits wide. The default is 32 bits. As this is an ABI changing option, +all object code in an executable must be compiled with the same setting. + +@item -maddress-space-conversion +@itemx -mno-address-space-conversion +@opindex maddress-space-conversion +@opindex mno-address-space-conversion +Allow/disallow treating the @code{__ea} address space as superset +of the generic address space. This enables explicit type casts +between @code{__ea} and generic pointer as well as implicit +conversions of generic pointers to @code{__ea} pointers. The +default is to allow address space pointer conversions. + +@item -mcache-size=@var{cache-size} +@opindex mcache-size +This option controls the version of libgcc that the compiler links to an +executable and selects a software-managed cache for accessing variables +in the @code{__ea} address space with a particular cache size. Possible +options for @var{cache-size} are @samp{8}, @samp{16}, @samp{32}, @samp{64} +and @samp{128}. The default cache size is 64KB. + +@item -matomic-updates +@itemx -mno-atomic-updates +@opindex matomic-updates +@opindex mno-atomic-updates +This option controls the version of libgcc that the compiler links to an +executable and selects whether atomic updates to the software-managed +cache of PPU-side variables are used. If you use atomic updates, changes +to a PPU variable from SPU code using the @code{__ea} named address space +qualifier will not interfere with changes to other PPU variables residing +in the same cache line from PPU code. If you do not use atomic updates, +such interference may occur; however, writing back cache lines will be +more efficient. The default behavior is to use atomic updates. + @item -mdual-nops @itemx -mdual-nops=@var{n} @opindex mdual-nops @@ -16285,6 +16766,14 @@ specifies that a GUI application is to be generated by instructing the linker to set the PE header subsystem type appropriately. +@item -fno-set-stack-executable +@opindex fno-set-stack-executable +This option is available for MinGW targets. It specifies that +the executable flag for stack used by nested functions isn't +set. This is necessary for binaries running in kernel mode of +Windows, as there the user32 API, which is used to set executable +privileges, isn't available. + @item -mpe-aligned-commons @opindex mpe-aligned-commons This option is available for Cygwin and MinGW targets. It |