diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c new file mode 100644 index 00000000000..e492a4e3bae --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c @@ -0,0 +1,19 @@ +/* Test the `vrev64Qs8' ARM Neon intrinsic. */ +/* This file was autogenerated by neon-testgen. */ + +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */ + +#include "arm_neon.h" + +void test_vrev64Qs8 (void) +{ + int8x16_t out_int8x16_t; + int8x16_t arg0_int8x16_t; + + out_int8x16_t = vrev64q_s8 (arg0_int8x16_t); +} + +/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { cleanup-saved-temps } } */ |