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Diffstat (limited to 'gcc/testsuite/gcc.target/arm/neon/vrev64s8.c')
-rw-r--r--gcc/testsuite/gcc.target/arm/neon/vrev64s8.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
new file mode 100644
index 00000000000..8b4dc987f44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
@@ -0,0 +1,19 @@
+/* Test the `vrev64s8' ARM Neon intrinsic. */
+/* This file was autogenerated by neon-testgen. */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm_neon.h"
+
+void test_vrev64s8 (void)
+{
+ int8x8_t out_int8x8_t;
+ int8x8_t arg0_int8x8_t;
+
+ out_int8x8_t = vrev64_s8 (arg0_int8x8_t);
+}
+
+/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */