diff options
| author | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-08-09 21:33:11 +0000 |
|---|---|---|
| committer | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-08-09 21:33:11 +0000 |
| commit | d4886c3ba4261064551190a6e72f1299a65b576f (patch) | |
| tree | 921e4b983ea72a9b39a2c04154940c1875464813 | |
| parent | f84a47ce8a7028902e7294c173c8720aca82fa5d (diff) | |
| download | gdb-1999-08-09.tar.gz | |
import gdb-1999-08-09 snapshotgdb-1999-08-09
118 files changed, 11955 insertions, 12060 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 21950fb5e09..bb3f6c634b1 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,297 @@ +Sun Aug 8 12:06:47 1999 Fred Fish <fnf@cygnus.com> + + * coffread.c (process_coff_symbol): Remove section_offsets from + prototype and function definition. Get section_offsets from the + passed objfile and pass it on to callees the same way. + (coff_symtab_read): Ditto. + (coff_symfile_read): Ditto. + * dbxread.c (read_dbx_dynamic_symtab): Ditto. + (read_dbx_symtab): Ditto. + (dbx_symfile_read): Ditto. + (coffstab_build_psymtabs): Ditto. + (elfstab_build_psymtabs): Ditto. + (stabsect_build_psymtabs): Ditto. + * dstread.c (dst_symfile_read): Ditto. + * elfread.c (elf_symfile_read): Ditto. + * jv-class.c (jv_class_symfile_read): Ditto. + * mipsread.c (mipscoff_symfile_read): Ditto. + * nlmread.c (nlm_symfile_read): Ditto. + * os9kread.c (os9k_symfile_read): Ditto. + * somread.c (som_symfile_read): Ditto. + * stabsread.h (elfstab_build_psymtabs): Ditto. + * xcoffread.c (xcoff_initial_scan): Ditto. + + * symfile.h (sym_read): Remove section_offsets from prototype. + * symfile.c (syms_from_objfile): Call sym_read without + section_offsets. + (reread_symbols): Ditto. + + * elfread.c (elfstab_offset_sections): Use SIZEOF_SECTION_OFFSETS + to allocate sections offsets array. + * xcoffread.c (xcoff_symfile_offsets): Ditto. + + * partial-stab.h (section_offsets): Get from objfile. + * dbxread.c (read_dbx_symtab): Fix typo that made -1 casted + to a CORE_ADDR look like an subtraction expression. + * objfiles.h: Add some comments. + * symfile.c: Add some comments. + * objfiles.c: Add some comments. + (objfile_relocated): Use ALL_OBJFILE_OSECTIONS to iterate over + sections. + (find_pc_sect_sections): Use ALL_OBJSECTIONS to iterate over all + sections in all objfiles. + * symfile.c (syms_from_objfile): Use ALL_OBJFILE_OSECTIONS. + + * irix5-nat.c (symbol_add_stub): Fix typo that made taking the + address of lowest_sect with '&' look like a bitwise and op. + * osfsolib.c (symbol_add_stub): Ditto. + * solib.c (symbol_add_stub): Ditto. + * symfile.c (syms_from_objfile): Ditto. + + * dwarf2read.c (dwarf2_build_psymtabs_hard): Minor format tweak. + * symfile.c (syms_from_objfile): Ditto, and fix typo. + * top.c (init_main): Fix typo in comment (DEFULAT_PROMPT). + * doc/gdbint.texinfo (find_sym_fns): This replaces symfile_init. + +1999-08-08 James Ingham <jingham@leda.cygnus.com> + + * remote.c (remote_insert_breakpoint): Fix typo in Z packet support. + Also move Z packet support OUTSIDE of REMOTE_BREAKPOINT ifdef, + since this is not set for all targets that support the Z packet. + +Fri Aug 6 17:17:28 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * defs.h (fatal): Delete declaration. + (internal_error): Declare. + * utils.c (nomem): Call internal_error instead of fatal. + (fatal_dump_core): Delete. + (malloc_botch): Print message direct to stderr. + (fatal): Delete definition. + * utils.c (internal_error): Define. + + * gdbarch.h, gdbarch.c, hppah-nat.c, ch-exp.c, dsrec.c, sh-tdep.c, + infptrace.c, f-lang.c, symm-nat.c, top.c, m3-nat.c, v850-tdep.c, + remote-vx.c, remote-sim.c, remote-mips.c, source.c, infcmd.c, + findvar.c, remote.c: Replace fatal with call to internal_error. + +Sun Aug 8 15:28:33 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * ser-pipe.c (STDIN_FILENO, STDOUT_FILENO, STDERR_FILENO): Move + definition from here. + * defs.h: To here. + +Sat Aug 7 21:44:59 1999 Fred Fish <fnf@cygnus.com> + + * remote.c (remote_insert_breakpoint): Fix typo, missing ';'. + +Sun Aug 8 11:26:57 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * mips-tdep.c (mips_gdbarch_init): Add break; to the default case. + +Fri Aug 6 19:26:03 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * defs.h: Delete #if ANSI_PROTOTYPES code, GDB assumes ISO-C. + * remote-rdp.c (send_rdp), remote-os9k.c (printf_monitor), + remote-mips.c: (mips_error), remote-array.c: (printf_monitor, + debuglogs), complaints.c (complain), monitor.c: + (monitor_printf_noecho, monitor_printf), language.c (type_error, + range_error), remote-st.c: (printf_stdebug), remote-sim.c + (gdb_os_printf_filtered, gdb_os_vprintf_filtered, + gdb_os_evprintf_filtered, gdb_os_error), serial.c (serial_printf), + utils.c (warning, error, fatal, fatal_dump_core, (query, + fprintf_filtered, fprintf_unfiltered, fprintfi_filtered, + printf_filtered, printf_unfiltered, printfi_filtered): Delete + legacy #ifndef ANSI_PROTOTYPES varargs code. + + * defs.h: Don't #include <varargs.h>. + * remote-rdp.c, remote-os9k.c, remote-mips.c, remote-array.c, + monitor.c, remote-st.c: Don't include <varargs.h> or <stdarg.h>. + +1999-08-06 James Ingham <jingham@leda.cygnus.com> + + * configure.in, configure: add the --enable-multi-ice to determine + whether to configure and build the multi-ice-gdb-server. Note, + for now this only builds on cygwin, so don't enable it for other + platforms... + +1999-08-06 Tom Tromey <tromey@cygnus.com> + + * Makefile.in (SFILES): Added kod.c and kod-cisco.c. + (COMMON_OBS): Added kod.o and kod-cisco.o. + (kod-cisco.o): New target. + (kod.o): New target. + * kod-cisco.c: New file. + * kod.c: New file. + +1999-08-06 James Ingham <jingham@leda.cygnus.com> + + These are some fixups for the Arm, and support for the + disassembly-flavor for the ARM. + + * defs.h: Declare the disassembly_flavor_hook + * top.c: Define the disassembly_flavor_hook + * i386-tdep.c: Remove unnecessary declaration of the + disassembly_flavor_hook. + + * config/arm/tm-arm.h: Change definition of + arm_init_extra_frame_info. + Add a few more comments. + * arm-tdep.c (arm_init_extra_frame_info): Listen to and use the + fromleaf parameter passed into init_extra_frame_info. + (set_disassembly_flavor_sfunc): New Function. + (set_disassembly_flavor): New Function. + (arm_othernames): Use the set_disassembly_flavor. + (_initialize_arm_tdep): Setup the disassembly flavor commands, and + initialize the flavor. + (arm_frameless_function_invocation): Adjust for + frameless functions that have 1 or 2 instructions that mimic the + standard APCS form. + (arm_scan_prologue): Be more careful about scanning the function + prologue. Don't match things that just have a few of the prologue + instructions out of order, and don't get thrown by the scheduler + migrating instructions into the prologue. + + Add support for the "Z" and "z" packets to request the stub + to set a breakpoint. + + * remote.c (set_remote_protocol_Z_packet_cmd): New function. + (show_remote_protocol_Z_packet_cmd): New Function. + (remote_open_1): Init the Z packet config. + (remote_async_open_1): Init the Z packet config. + (remote_insert_breakpoint): Use the "Z" packet if supported. + (remote_remove_breakpoint): Use the "z" packet if supported. + (remote_insert_watchpoint): New Function - currently wired to + nothing. + (remote_remove_watchpoint): Ditto. + (remote_insert_hw_breakpoint): Ditto. + (remote_remove_hw_breakpoint): Ditto. + +1999-08-06 Stan Shebs <shebs@andros.cygnus.com> + + * infcmd.c: Include parser-defs.h. + (interrupt_target_command): Declare. + (stack_dummy_testing): Remove old funky flag. + (run_stack_dummy): Remove unused reference to old funky flag. + +1999-08-06 Tom Tromey <tromey@cygnus.com> + + * command.c (do_setshow_command): Call set_hook if not NULL. + * top.c (set_hook): New hook definition. + * defs.h (set_hook): Declare. + +1999-08-05 Stan Shebs <shebs@andros.cygnus.com> + + * infrun.c: Convert code to pure standard C, elim some warnings. + (stopped_for_shlib_catchpoint): Remove, never used. + +1999-08-05 Keith Seitz <keiths@cygnus.com> + + * NEWS: Mention new Motorola MCore target. + + * sparc-tdep.c (gdb_print_insn_sparc): Print insns of the current + architecture. + +Thu Aug 5 20:41:22 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * configure.in (configdirs): Add check for socketpair. + * configure, config.in: Re-generate. + + From Mon Jul 19 10:46:18 1999 Philippe De Muyter <phdm@macqel.be>: + * ser-pipe.c (sys/wait.h): Include this file only #if HAVE_SYS_WAIT_H. + (STDIN_FILENO, STDOUT_FILENO, STDERR_FILENO): Macros defined if needed. + +Thu Aug 5 20:04:17 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * target.c (debug_to_open, debug_to_attach, debug_to_post_attach, + debug_to_require_attach, debug_to_detach, debug_to_require_detach, + debug_to_wait, debug_to_post_wait, debug_to_fetch_registers, + debug_to_store_registers, debug_to_prepare_to_store, + debug_to_xfer_memory, debug_to_files_info, + debug_to_insert_breakpoint, debug_to_remove_breakpoint, + debug_to_terminal_init, debug_to_terminal_inferior, + debug_to_terminal_ours_for_output, debug_to_terminal_ours, + debug_to_terminal_info, debug_to_kill, debug_to_load, + debug_to_lookup_symbol, debug_to_create_inferior, + debug_to_post_startup_inferior, + debug_to_acknowledge_created_inferior, + debug_to_clone_and_follow_inferior, + debug_to_post_follow_inferior_by_clone, + debug_to_insert_fork_catchpoint, debug_to_remove_fork_catchpoint, + debug_to_insert_vfork_catchpoint, + debug_to_remove_vfork_catchpoint, debug_to_has_forked, + debug_to_has_vforked, debug_to_can_follow_vfork_prior_to_exec, + debug_to_post_follow_vfork, debug_to_insert_exec_catchpoint, + debug_to_remove_exec_catchpoint, debug_to_has_execd, + debug_to_reported_exec_events_per_exec_call, + debug_to_has_syscall_event, debug_to_has_exited, + debug_to_mourn_inferior, debug_to_can_run, + debug_to_notice_signals, debug_to_thread_alive, debug_to_stop, + debug_to_query, debug_to_rcmd, debug_to_enable_exception_callback, + debug_to_get_current_exception_event, debug_to_pid_to_exec_file, + debug_to_core_file_to_sym_file, debug_to_close): Send trace output + to ``gdb_stdlog'' instead of ``gdb_stderr''. + +Thu Aug 5 16:22:10 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.c (init_remote_ops): Initialize remote_ops.to_rcmd. + (init_remote_async_ops): Initialize remote_async_ops.to_query. + (remote_rcmd): New function. + + * monitor.c (monitor_rcmd): Rename monitor_command. + (init_base_monitor_ops): Initialize monitor_ops.to_rcmd. + (_initialize_remote_monitors): Move "monitor" command from here. + * target.c (initialize_targets): To here. + (monitor_command): New function. Implement "monitor" command. + + * target.c (cleanup_target): de_fault to_rcmd. + (update_current_target): INHERIT to_rcmd. + (debug_to_rcmd): New function. + (setup_target_debug): Initialize current_target.to_rcmd. + + * target.h (struct target_ops): Add field to_rcmd. + (target_rcmd): Define. + +Thu Aug 5 14:24:07 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.c: Replace comment describing remote protocol with + pointer to official document. + +Thu Aug 5 11:59:06 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.c (remote_protocol_binary_download): New variable. + Replace ``remote_binary_download'' and ``remote_binary_checked''. + (set_remote_protocol_binary_download_cmd, + show_remote_protocol_binary_download_cmd): New functions. + (remote_open_1, remote_async_open_1, remote_cisco_open): + Initialize ``remote_protocol_binary_download'' instead of + ``remote_binary_download''. + (check_binary_download): Re-write. + (remote_write_bytes): Ditto. + (_initialize_remote): Add ``set remote X-packet'' and ``show + remote X-packet'' commands. Disable old ``set + remotebinarydownload'' command. + +1999-08-04 Keith Seitz <keiths@cygnus.com> + + * remote-rdi.c (arm_rdi_close): Close the transport device, too. + +Wed Aug 4 10:42:58 1999 Fred Fish <fnf@cygnus.com> + + * xcoffread.c (scan_xcoff_symtab): Change main_aux into + an array of 5 internal_auxent to leave room for bfd to + write n_numaux entries. Change code to use the first one. + +1999-08-02 Stan Shebs <shebs@andros.cygnus.com> + + * c-valprint.c (c_val_print): When printing decimal equivalent + of a char, cast appropriately. + +1999-08-02 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + From Jonathan Larmour <jlarmour@cygnus.co.uk>: + * main.c (print_gdb_help): Use gdbinit variable to determine file + name used for --nx help + 1999-08-01 Jason Molenda (jsm@bugshack.cygnus.com) * config/mips/tm-mips.h (BIG_ENDIAN): Don't define here. @@ -898,6 +1192,16 @@ Thu Jun 10 20:04:02 1999 Andrew Cagney <cagney@b1.cygnus.com> mn10300-tdep.c: New function. * config/mn10300/tm-mn10300.h (SAVED_PC_AFTER_CALL): Update. +1999-06-10 Keith Seitz <keiths@cygnus.com> + + * mcore-rom.c (picobug_dumpregs): Return a value. Any value, it + doesn't matter. + * mcore-tdep.c (mcore_analyze_prologue): Set NO_MORE_FRAMES + if the start of the function is the entry point. + (mcore_analyze_prologue): rotli takes an immediate, not an + offset immediate. + (mcore_push_arguments): Fix compiler warning. + 1999-06-09 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) * rs6000-tdep.c (skip_prologue): Don't mistake a branch for a @@ -1376,6 +1680,12 @@ Tue May 25 16:05:11 1999 Andrew Cagney <cagney@b1.cygnus.com> (value_from_register, value_of_register): Remove #ifdef REGISTER_CONVERTIBLE. Assume REGISTER_CONVERTIBLE etc defined. +1999-05-25 Keith Seitz <keiths@cygnus.com> + + * config/mcore/tm-mcore.h (FRAME_NUM_ARGS): Re-write definition of + FRAME_NUM_ARGS so that it returns NUM_ARGS as a result instead of + setting a variable as a side effect. + Tue May 25 16:18:25 1999 Andrew Cagney <cagney@amy.cygnus.com> * remote-d10v.c (d10v_eva_prepare_to_trace, @@ -1622,6 +1932,16 @@ Thu May 20 12:18:28 1999 Andrew Cagney <cagney@b1.cygnus.com> 1999-05-19 Keith Seitz <keiths@cygnus.com> + * config/mcore/tm-mcore.h (BELIEVE_PCC_PROMOTION): Define. We + really do want to believe what gcc tells us about types... + +1999-05-19 Keith Seitz <keiths@cygnus.com> + + * config/mcore/tm-mcore.h (FRAME_ARGS_ADDRESS): Define to a function. + (FRAME_LOCALS_ADDRESS): Ditto. + * mcore-tdep.c (mcore_frame_args_addcress): New function. + (mcore_frame_locals_address): New function. + * monitor.c (monitor_open): Only assume we have eight breakpoints if the monitor implementation does not tell us how many there really are. Alloc memory for these @@ -1637,11 +1957,23 @@ Thu May 20 12:18:28 1999 Andrew Cagney <cagney@b1.cygnus.com> individual monitor implementations can tell us how many breakpoints the monitor supports. + * mcore-rom.c (init_picobug_cmds): Add number of breakpoints supported + by picobug monitor. + 1999-05-18 Elena Zannoni <ezannoni@kwikemart.cygnus.com> From Philippe De Muyter <phdm@macqel.be>: * event-loop.h: Include sys/wait.h only if HAVE_SYS_WAIT_H. +1999-05-17 Keith Seitz <keiths@cygnus.com> + + * configure.tgt: Add MCore target. + * Makefile.in: Add mcore-tdep.c and mcore-rom.c + * config/mcore/tm-mcore.h: New file. + * config/mcore/mcore.mt: New file. + * mcore-rom.c: New file. + * mcore-tdep.c: New file. + 1999-05-17 Fernando Nasser <fnasser@totem.to.cygnus.com> * top.c (print_command_line): Added the missing stream argument. diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 5cbeae58a70..41fa52f324b 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -224,7 +224,7 @@ CDEPS = $(XM_CDEPS) $(TM_CDEPS) $(NAT_CDEPS) $(SIM) $(BFD) $(READLINE) \ ADD_FILES = $(REGEX) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES) ADD_DEPS = $(REGEX1) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES) -VERSION = 19990802 +VERSION = 19990809 DIST=gdb LINT=/usr/5bin/lint @@ -381,6 +381,7 @@ SFILES = ax-general.c ax-gdb.c bcache.c blockframe.c breakpoint.c \ event-loop.c event-top.c \ expprint.c f-exp.y f-lang.c f-typeprint.c f-valprint.c \ findvar.c gdbarch.c gdbtypes.c infcmd.c inflow.c infrun.c language.c \ + kod.c kod-cisco.c \ jv-exp.y jv-lang.c jv-valprint.c jv-typeprint.c \ m2-exp.y m2-lang.c m2-typeprint.c m2-valprint.c main.c maint.c \ mem-break.c minsyms.c mipsread.c nlmread.c objfiles.c parse.c \ @@ -508,6 +509,7 @@ COMMON_OBS = version.o blockframe.o breakpoint.o findvar.o stack.o thread.o \ event-loop.o event-top.o \ gdbarch.o gdbtypes.o copying.o $(DEPFILES) \ mem-break.o target.o parse.o language.o $(YYOBJ) buildsym.o \ + kod.o kod-cisco.o \ exec.o bcache.o objfiles.o minsyms.o maint.o demangle.o \ dbxread.o coffread.o elfread.o \ dwarfread.o dwarf2read.o mipsread.o stabsread.o corefile.o \ @@ -954,6 +956,7 @@ ALLDEPFILES = 29k-share/udi/udip2soc.c 29k-share/udi/udr.c \ lynx-nat.c m3-nat.c \ m68k-tdep.c \ m88k-nat.c m88k-tdep.c mac-nat.c \ + mcore-tdep.c \ mips-nat.c \ mips-tdep.c mipsm3-nat.c mipsv4-nat.c news-xdep.c \ nindy-share/Onindy.c nindy-share/nindy.c \ @@ -1231,6 +1234,10 @@ jv-valprint.o: jv-valprint.c $(bfd_h) $(defs_h) $(symtab_h) $(gdbtypes_h) \ $(expression_h) $(value_h) $(INCLUDE_DIR)/demangle.h valprint.h \ language.h jv-lang.h c-lang.h gdbcore.h annotate.h +kod.o: kod.c $(defs_h) $(command_h) $(gdbcmd_h) target.h gdb_string.h + +kod-cisco.o: kod-cisco.c $(defs_h) gdb_string.h + language.o: language.c $(bfd_h) $(defs_h) $(expression_h) $(frame_h) \ $(gdbcmd_h) $(gdbtypes_h) language.h parser-defs.h $(symtab_h) \ target.h $(value_h) gdb_string.h @@ -1270,6 +1277,11 @@ main.o: main.c top.h $(defs_h) gdb_string.h $(event_loop_h) maint.o: maint.c $(defs_h) $(gdbcmd_h) $(gdbtypes_h) $(symtab_h) language.h \ $(expression_h) objfiles.h symfile.h +mcore-tdep.o: mcore-tdep.c $(defs_h) $(frame_h) $(gdbcmd_h) $(value_h) $(symtab_h) + +mcore-rom.o: mcore-rom.c $(defs_h) $(gdbcore_h) target.h monitor.h \ + gdb_string.h + mdebugread.o: mdebugread.c buildsym.h complaints.h $(bfd_h) $(defs_h) \ $(expression_h) gdb-stabs.h $(gdbcore_h) $(gdbtypes_h) language.h \ objfiles.h partial-stab.h stabsread.h symfile.h $(symtab_h) \ @@ -5,6 +5,7 @@ * New targets +Motorola MCore mcore-*-* x86 VxWorks i[3456]86-*-vxworks* PowerPC VxWorks powerpc-*-vxworks* TI TMS320C80 tic80-*-* @@ -34,6 +35,12 @@ instead of 64 bits has been fixed. The command ``set remote-mips64-transfers-32bit-regs on'' has been added to provide backward compatibility with older versions of GDB. +* ``set remotebinarydownload'' replaced by ``set remote X-packet'' + +The command ``set remotebinarydownload'' command has been replaced by +``set remote X-packet''. Other commands in ``set remote'' family +include ``set remote P-packet''. + *** Changes in GDB-4.18: * New native configurations diff --git a/gdb/a29k-tdep.c b/gdb/a29k-tdep.c index 92474a11f15..5370106acc1 100644 --- a/gdb/a29k-tdep.c +++ b/gdb/a29k-tdep.c @@ -922,7 +922,7 @@ setup_arbitrary_frame (argc, argv) frame = create_new_frame (argv[0], argv[1]); if (!frame) - fatal ("internal: create_new_frame returned invalid frame id"); + internal_error ("create_new_frame returned invalid frame id"); /* Creating a new frame munges the `frame' value from the current GR1, so we restore it again here. FIXME, untangle all this diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index eb760af3c65..994e48f7c95 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -47,30 +47,45 @@ #define ROUND_DOWN(n,a) ((n) & ~((a) - 1)) #define ROUND_UP(n,a) (((n) + (a) - 1) & ~((a) - 1)) -static char *APCS_register_names[] = -{"a1", "a2", "a3", "a4", /* 0 1 2 3 */ - "v1", "v2", "v3", "v4", /* 4 5 6 7 */ - "v5", "v6", "sl", "fp", /* 8 9 10 11 */ - "ip", "sp", "lr", "pc", /* 12 13 14 15 */ - "f0", "f1", "f2", "f3", /* 16 17 18 19 */ - "f4", "f5", "f6", "f7", /* 20 21 22 23 */ - "fps", "ps"} /* 24 25 */ ; +static char *apcs_register_names[] = +{ "a1", "a2", "a3", "a4", /* 0 1 2 3 */ + "v1", "v2", "v3", "v4", /* 4 5 6 7 */ + "v5", "v6", "sl", "fp", /* 8 9 10 11 */ + "ip", "sp", "lr", "pc", /* 12 13 14 15 */ + "f0", "f1", "f2", "f3", /* 16 17 18 19 */ + "f4", "f5", "f6", "f7", /* 20 21 22 23 */ + "fps","ps" } /* 24 25 */; /* These names are the ones which gcc emits, and I find them less confusing. Toggle between them using the `othernames' command. */ static char *additional_register_names[] = -{"r0", "r1", "r2", "r3", /* 0 1 2 3 */ - "r4", "r5", "r6", "r7", /* 4 5 6 7 */ - "r8", "r9", "r10", "r11", /* 8 9 10 11 */ - "r12", "r13", "r14", "pc", /* 12 13 14 15 */ - "f0", "f1", "f2", "f3", /* 16 17 18 19 */ - "f4", "f5", "f6", "f7", /* 20 21 22 23 */ - "fps", "ps"} /* 24 25 */ ; +{ "r0", "r1", "r2", "r3", /* 0 1 2 3 */ + "r4", "r5", "r6", "r7", /* 4 5 6 7 */ + "r8", "r9", "r10", "r11", /* 8 9 10 11 */ + "r12", "r13", "r14", "pc", /* 12 13 14 15 */ + "f0", "f1", "f2", "f3", /* 16 17 18 19 */ + "f4", "f5", "f6", "f7", /* 20 21 22 23 */ + "fps","ps" } /* 24 25 */; /* By default use the APCS registers names */ -char **arm_register_names = APCS_register_names; +char **arm_register_names = apcs_register_names; +/* This is the variable the is set with "set disassembly-flavor", + and its legitimate values. */ +static char apcs_flavor[] = "apcs"; +static char r_prefix_flavor[] = "r-prefix"; +static char *valid_flavors[] = { + apcs_flavor, + r_prefix_flavor, + NULL +}; +static char *disassembly_flavor = apcs_flavor; + +/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */ +static void set_disassembly_flavor_sfunc PARAMS ((char *, int, \ + struct cmd_list_element *)); +static void set_disassembly_flavor (); /* Should call_function allocate stack space for a struct return? */ /* The system C compiler uses a similar structure return convention to gcc */ @@ -167,12 +182,17 @@ int arm_frameless_function_invocation (fi) struct frame_info *fi; { - int frameless; CORE_ADDR func_start, after_prologue; + int frameless; + func_start = (get_pc_function_start ((fi)->pc) + FUNCTION_START_OFFSET); after_prologue = func_start; SKIP_PROLOGUE (after_prologue); - frameless = (after_prologue == func_start); + /* There are some frameless functions whose first two instructions + follow the standard APCS form, in which case after_prologue + will be func_start + 8. */ + + frameless = (after_prologue < func_start + 12); return frameless; } @@ -226,11 +246,12 @@ arm_skip_prologue (pc) CORE_ADDR func_addr, func_end; struct symtab_and_line sal; - /* See what the symbol table says. */ + /* See what the symbol table says. */ + if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) { sal = find_pc_line (func_addr, 0); - if (sal.line != 0 && sal.end < func_end) + if ((sal.line != 0) && (sal.end < func_end)) return sal.end; } @@ -464,20 +485,65 @@ save_prologue_cache (fi) 4) the offset from the stack pointer to the frame pointer This information is stored in the "extra" fields of the frame_info. - A typical Arm function prologue might look like this: - mov ip, sp - stmfd sp!, {fp, ip, lr, pc} - sub fp, ip, #4 - sub sp, sp, #16 + There are two basic forms for the ARM prologue. The fixed argument + function call will look like: + + mov ip, sp + stmfd sp!, {fp, ip, lr, pc} + sub fp, ip, #4 + [sub sp, sp, #4] + Which would create this stack frame (offsets relative to FP): - IP -> 4 (caller's stack) - FP -> 0 PC (points to address of stmfd instruction + 12 in callee) - -4 LR (return address in caller) - -8 IP (copy of caller's SP) - -12 FP (caller's FP) - SP -> -28 Local variables + IP -> 4 (caller's stack) + FP -> 0 PC (points to address of stmfd instruction + 8 in callee) + -4 LR (return address in caller) + -8 IP (copy of caller's SP) + -12 FP (caller's FP) + SP -> -28 Local variables + The frame size would thus be 32 bytes, and the frame offset would be - 28 bytes. */ + 28 bytes. The stmfd call can also save any of the vN registers it + plans to use, which increases the frame size accordingly. + + Note: The stored PC is 8 off of the STMFD instruction that stored it + because the ARM Store instructions always store PC + 8 when you read + the PC register. + + A variable argument function call will look like: + + mov ip, sp + stmfd sp!, {a1, a2, a3, a4} + stmfd sp!, {fp, ip, lr, pc} + sub fp, ip, #20 + + Which would create this stack frame (offsets relative to FP): + IP -> 20 (caller's stack) + 16 A4 + 12 A3 + 8 A2 + 4 A1 + FP -> 0 PC (points to address of stmfd instruction + 8 in callee) + -4 LR (return address in caller) + -8 IP (copy of caller's SP) + -12 FP (caller's FP) + SP -> -28 Local variables + + The frame size would thus be 48 bytes, and the frame offset would be + 28 bytes. + + There is another potential complication, which is that the optimizer + will try to separate the store of fp in the "stmfd" instruction from + the "sub fp, ip, #NN" instruction. Almost anything can be there, so + we just key on the stmfd, and then scan for the "sub fp, ip, #NN"... + + Also, note, the original version of the ARM toolchain claimed that there + should be an + + instruction at the end of the prologue. I have never seen GCC produce + this, and the ARM docs don't mention it. We still test for it below in + case it happens... + +*/ static void arm_scan_prologue (fi) @@ -519,56 +585,106 @@ arm_scan_prologue (fi) else { /* Get address of the stmfd in the prologue of the callee; the saved - PC is the address of the stmfd + 12. */ - prologue_start = ADDR_BITS_REMOVE (read_memory_integer (fi->frame, 4)) - 12; - prologue_end = prologue_start + 40; /* FIXME: should be big enough */ + PC is the address of the stmfd + 8. */ + prologue_start = ADDR_BITS_REMOVE(read_memory_integer (fi->frame, 4)) + - 8; + prologue_end = prologue_start + 64; /* This is all the insn's + that could be in the prologue, + plus room for 5 insn's inserted + by the scheduler. */ } /* Now search the prologue looking for instructions that set up the - frame pointer, adjust the stack pointer, and save registers. */ + frame pointer, adjust the stack pointer, and save registers. + + Be careful, however, and if it doesn't look like a prologue, + don't try to scan it. If, for instance, a frameless function + begins with stmfd sp!, then we will tell ourselves there is + a frame, which will confuse stack traceback, as well ad"finish" + and other operations that rely on a knowledge of the stack + traceback. + + In the APCS, the prologue should start with "mov ip, sp" so + if we don't see this as the first insn, we will stop. */ sp_offset = fp_offset = 0; - for (current_pc = prologue_start; current_pc < prologue_end; current_pc += 4) - { - unsigned int insn = read_memory_unsigned_integer (current_pc, 4); - if ((insn & 0xffff0000) == 0xe92d0000) /* stmfd sp!, {..., r7, lr} */ - { - int mask = insn & 0xffff; - - /* Calculate offsets of saved registers. */ - for (regno = PC_REGNUM; regno >= 0; regno--) - if (mask & (1 << regno)) - { - sp_offset -= 4; - fi->fsr.regs[regno] = sp_offset; - } - } - else if ((insn & 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */ - { - unsigned imm = insn & 0xff; /* immediate value */ - unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */ - imm = (imm >> rot) | (imm << (32 - rot)); - fp_offset = -imm; - fi->framereg = FP_REGNUM; - } - else if ((insn & 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */ - { - unsigned imm = insn & 0xff; /* immediate value */ - unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */ - imm = (imm >> rot) | (imm << (32 - rot)); - sp_offset -= imm; - } - else if ((insn & 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */ + if (read_memory_unsigned_integer (prologue_start, 4) + == 0xe1a0c00d) /* mov ip, sp */ + { + for (current_pc = prologue_start +4; current_pc < prologue_end; + current_pc += 4) { - sp_offset -= 12; - regno = F0_REGNUM + ((insn >> 12) & 0x07); - fi->fsr.regs[regno] = sp_offset; + unsigned int insn = read_memory_unsigned_integer (current_pc, 4); + + if ((insn & 0xffff0000) == 0xe92d0000) + /* stmfd sp!, {..., fp, ip, lr, pc} + or + stmfd sp!, {a1, a2, a3, a4} */ + { + int mask = insn & 0xffff; + + /* Calculate offsets of saved registers. */ + for (regno = PC_REGNUM; regno >= 0; regno--) + if (mask & (1 << regno)) + { + sp_offset -= 4; + fi->fsr.regs[regno] = sp_offset; + } + } + else if ((insn & 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */ + { + unsigned imm = insn & 0xff; /* immediate value */ + unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */ + imm = (imm >> rot) | (imm << (32-rot)); + fp_offset = -imm; + fi->framereg = FP_REGNUM; + } + else if ((insn & 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */ + { + unsigned imm = insn & 0xff; /* immediate value */ + unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */ + imm = (imm >> rot) | (imm << (32-rot)); + sp_offset -= imm; + } + else if ((insn & 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */ + { + sp_offset -= 12; + regno = F0_REGNUM + ((insn >> 12) & 0x07); + fi->fsr.regs[regno] = sp_offset; + } + else if ((insn & 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */ + { + int n_saved_fp_regs, i; + unsigned int fp_start_reg, fp_bound_reg; + + if ((insn & 0x800) == 0x800) /* N0 is set */ + { + if ((insn & 0x40000) == 0x40000) /* N1 is set */ + n_saved_fp_regs = 3; + else + n_saved_fp_regs = 1; + } + else + { + if ((insn & 0x40000) == 0x40000) /* N1 is set */ + n_saved_fp_regs = 2; + else + n_saved_fp_regs = 4; + } + + fp_start_reg = F0_REGNUM + ((insn >> 12) & 0x7); + fp_bound_reg = fp_start_reg + n_saved_fp_regs; + for (; fp_start_reg < fp_bound_reg; fp_start_reg++) + { + sp_offset -= 12; + fi->fsr.regs[fp_start_reg++] = sp_offset; + } + } + else + continue; /* The optimizer might shove anything into the + prologue, so we just skip what we don't recognize. */ } - else if (insn == 0xe1a0c00d) /* mov ip, sp */ - continue; - else - break; /* not a recognized prologue instruction */ } /* The frame size is just the negative of the offset (from the original SP) @@ -576,7 +692,7 @@ arm_scan_prologue (fi) [new FP] - [new SP]. */ fi->framesize = -sp_offset; fi->frameoffset = fp_offset - sp_offset; - + save_prologue_cache (fi); } @@ -685,11 +801,15 @@ arm_frame_chain (fi) sp. This is tricky because we sometimes don't use an explicit frame pointer, and the previous stack pointer isn't necessarily recorded on the stack. The only reliable way to get this info is to - examine the prologue. */ + examine the prologue. + FROMLEAF is a little confusing, it means this is the next frame up + the chain AFTER a frameless function. If this is true, then the + frame value for this frame is still in the fp register. */ void -arm_init_extra_frame_info (fi) - struct frame_info *fi; +arm_init_extra_frame_info (fromleaf, fi) + int fromleaf; + struct frame_info * fi; { int reg; @@ -715,12 +835,16 @@ arm_init_extra_frame_info (fi) if (!fi->next) /* this is the innermost frame? */ fi->frame = read_register (fi->framereg); - else - /* not the innermost frame */ - /* If we have an FP, the callee saved it. */ if (fi->framereg == FP_REGNUM || fi->framereg == THUMB_FP_REGNUM) - if (fi->next->fsr.regs[fi->framereg] != 0) - fi->frame = read_memory_integer (fi->next->fsr.regs[fi->framereg], - 4); + else /* not the innermost frame */ + /* If we have an FP, the callee saved it. */ + if (fi->framereg == FP_REGNUM || fi->framereg == THUMB_FP_REGNUM) + if (fi->next->fsr.regs[fi->framereg] != 0) + fi->frame = read_memory_integer (fi->next->fsr.regs[fi->framereg], + 4); + else if (fromleaf) /* If we were called by a frameless fn. + then our frame is still in the frame pointer + register on the board... */ + fi->frame = read_fp (); /* Calculate actual addresses of saved registers using offsets determined by arm_scan_prologue. */ @@ -1058,7 +1182,7 @@ arm_float_info () type = (status >> 24) & 127; printf ("%s FPU type %d\n", - (status & (1 << 31)) ? "Hardware" : "Software", + (status & (1<<31)) ? "Hardware" : "Software", type); fputs ("mask: ", stdout); print_fpu_flags (status >> 16); @@ -1066,21 +1190,57 @@ arm_float_info () print_fpu_flags (status); } +/* If the disassembly mode is APCS, we have to also switch the + bfd mach_type. This function is run in the set disassembly_flavor + command, and does that. */ + static void -arm_othernames () +set_disassembly_flavor_sfunc (args, from_tty, c) + char *args; + int from_tty; + struct cmd_list_element *c; { + set_disassembly_flavor (); + + if (disassembly_flavor_hook != NULL) + disassembly_flavor_hook(args, from_tty); +} - if (arm_register_names == APCS_register_names) +static void +set_disassembly_flavor () +{ + if (disassembly_flavor == apcs_flavor) { - arm_register_names = additional_register_names; - arm_toggle_regnames (); + if (arm_toggle_regnames () == 0) + arm_toggle_regnames (); + arm_register_names = apcs_register_names; + } + else if (disassembly_flavor == r_prefix_flavor) + { + if (arm_toggle_regnames () == 1) + arm_toggle_regnames (); + arm_register_names = additional_register_names; + } +} + +/* arm_othernames implements the "othernames" command. This is kind of + hacky, and I prefer the set-show disassembly-flavor which is also used + for the x86 gdb. I will keep this around, however, in case anyone is + actually using it. */ + +static void +arm_othernames () +{ + if (disassembly_flavor == r_prefix_flavor) + { + disassembly_flavor = apcs_flavor; + set_disassembly_flavor (); } else { - arm_register_names = APCS_register_names; - arm_toggle_regnames (); + disassembly_flavor = r_prefix_flavor; + set_disassembly_flavor (); } - } /* FIXME: Fill in with the 'right thing', see asm @@ -1646,23 +1806,37 @@ arm_skip_stub (pc) void _initialize_arm_tdep () { - int regname_is_APCS = (arm_register_names == APCS_register_names); + struct cmd_list_element *new_cmd; tm_print_insn = gdb_print_insn_arm; - + /* Sync the opcode insn printer with our register viewer: */ - if (arm_toggle_regnames () != regname_is_APCS) + if (arm_toggle_regnames () != 1) arm_toggle_regnames (); + /* Add the deprecated "othernames" command */ + add_com ("othernames", class_obscure, arm_othernames, "Switch to the other set of register names."); + /* Add the disassembly-flavor command */ + + new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class, + valid_flavors, + (char *) &disassembly_flavor, + "Set the disassembly flavor, \ +the valid values are \"apcs\" and \"r-prefix\", \ +and the default value is \"apcs\".", + &setlist); + new_cmd->function.sfunc = set_disassembly_flavor_sfunc; + add_show_from_set(new_cmd, &showlist); + /* ??? Maybe this should be a boolean. */ add_show_from_set (add_set_cmd ("apcs32", no_class, - var_zinteger, (char *) &arm_apcs_32, - "Set usage of ARM 32-bit mode.\n", &setlist), - &showlist); + var_zinteger, (char *)&arm_apcs_32, + "Set usage of ARM 32-bit mode.\n", &setlist), + & showlist); } diff --git a/gdb/arm-xdep.c b/gdb/arm-xdep.c index 48c416d32ef..09b3d5ca42f 100644 --- a/gdb/arm-xdep.c +++ b/gdb/arm-xdep.c @@ -538,7 +538,7 @@ xfer_core_file (memaddr, myaddr, len) { /* Address did not classify into one of the known ranges. This shouldn't happen; we catch the endpoints. */ - fatal ("Internal: Bad case logic in xfer_core_file."); + internal_error ("Bad case logic in xfer_core_file."); } /* Now we know which file to use. diff --git a/gdb/c-valprint.c b/gdb/c-valprint.c index f791e4c20de..f8882624051 100644 --- a/gdb/c-valprint.c +++ b/gdb/c-valprint.c @@ -403,10 +403,13 @@ c_val_print (type, valaddr, embedded_offset, address, stream, format, deref_ref, } else { - fprintf_filtered (stream, TYPE_UNSIGNED (type) ? "%u" : "%d", - unpack_long (type, valaddr + embedded_offset)); + val = unpack_long (type, valaddr + embedded_offset); + if (TYPE_UNSIGNED (type)) + fprintf_filtered (stream, "%u", (unsigned int) val); + else + fprintf_filtered (stream, "%d", (int) val); fputs_filtered (" ", stream); - LA_PRINT_CHAR ((unsigned char) unpack_long (type, valaddr + embedded_offset), stream); + LA_PRINT_CHAR ((unsigned char) val, stream); } break; diff --git a/gdb/ch-exp.c b/gdb/ch-exp.c index 62e9bfd1b79..1b22e257b9b 100644 --- a/gdb/ch-exp.c +++ b/gdb/ch-exp.c @@ -217,7 +217,7 @@ peek_token_ (i) int i; { if (i > MAX_LOOK_AHEAD) - fatal ("internal error - too much lookahead"); + internal_error ("ch-exp.c - too much lookahead"); if (terminal_buffer[i] == TOKEN_NOT_READ) { terminal_buffer[i] = ch_lex (); @@ -235,7 +235,7 @@ pushback_token (code, node) { int i; if (terminal_buffer[MAX_LOOK_AHEAD] != TOKEN_NOT_READ) - fatal ("internal error - cannot pushback token"); + internal_error ("ch-exp.c - cannot pushback token"); for (i = MAX_LOOK_AHEAD; i > 0; i--) { terminal_buffer[i] = terminal_buffer[i - 1]; @@ -269,9 +269,7 @@ require (token) { if (PEEK_TOKEN () != token) { - char buf[80]; - sprintf (buf, "internal parser error - expected token %d", (int) token); - fatal (buf); + internal_error ("ch-exp.c - expected token %d", (int) token); } FORWARD_TOKEN (); } diff --git a/gdb/coffread.c b/gdb/coffread.c index 1a923ebff66..29ec6651ff4 100644 --- a/gdb/coffread.c +++ b/gdb/coffread.c @@ -193,7 +193,6 @@ static struct type *coff_read_enum_type PARAMS ((int, int, int)); static struct symbol *process_coff_symbol PARAMS ((struct coff_symbol *, union internal_auxent *, - struct section_offsets *, struct objfile *)); static void patch_opaque_types PARAMS ((struct symtab *)); @@ -218,8 +217,7 @@ static void read_one_sym PARAMS ((struct coff_symbol *, struct internal_syment *, union internal_auxent *)); -static void coff_symtab_read PARAMS ((long, int, struct section_offsets *, - struct objfile *)); +static void coff_symtab_read PARAMS ((long, int, struct objfile *)); static void find_linenos PARAMS ((bfd *, sec_ptr, PTR)); @@ -227,8 +225,7 @@ static void coff_symfile_init PARAMS ((struct objfile *)); static void coff_new_init PARAMS ((struct objfile *)); -static void coff_symfile_read PARAMS ((struct objfile *, - struct section_offsets *, int)); +static void coff_symfile_read PARAMS ((struct objfile *, int)); static void coff_symfile_finish PARAMS ((struct objfile *)); @@ -596,9 +593,8 @@ static bfd *symfile_bfd; /* ARGSUSED */ static void -coff_symfile_read (objfile, section_offsets, mainline) +coff_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { struct coff_symfile_info *info; @@ -673,8 +669,7 @@ coff_symfile_read (objfile, section_offsets, mainline) /* Now that the executable file is positioned at symbol table, process it and define symbols accordingly. */ - coff_symtab_read ((long) symtab_offset, num_symbols, section_offsets, - objfile); + coff_symtab_read ((long) symtab_offset, num_symbols, objfile); /* Sort symbols alphabetically within each block. */ @@ -712,7 +707,6 @@ coff_symfile_read (objfile, section_offsets, mainline) stabstrsize = bfd_section_size (abfd, info->stabstrsect); coffstab_build_psymtabs (objfile, - section_offsets, mainline, info->textaddr, info->textsize, info->stabsects, @@ -750,10 +744,9 @@ coff_symfile_finish (objfile) We read them one at a time using read_one_sym (). */ static void -coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) +coff_symtab_read (symtab_offset, nsyms, objfile) long symtab_offset; int nsyms; - struct section_offsets *section_offsets; struct objfile *objfile; { register struct context_stack *new; @@ -841,7 +834,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) if (ISFCN (cs->c_type) && cs->c_sclass != C_TPDEF) { /* Record all functions -- external and static -- in minsyms. */ - tmpaddr = cs->c_value + ANOFFSET (section_offsets, SECT_OFF_TEXT); + tmpaddr = cs->c_value + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); record_minimal_symbol (cs->c_name, tmpaddr, mst_text, objfile); fcn_line_ptr = main_aux.x_sym.x_fcnary.x_fcn.x_lnnoptr; @@ -906,7 +899,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) followed by a later file with no symbols. */ if (in_source_file) complete_symtab (filestring, - cs->c_value + ANOFFSET (section_offsets, SECT_OFF_TEXT), + cs->c_value + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT), main_aux.x_scn.x_scnlen); in_source_file = 0; } @@ -965,7 +958,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) tmpaddr = cs->c_value; if (cs->c_sclass == C_EXT || cs->c_sclass == C_THUMBEXTFUNC || cs->c_sclass == C_THUMBEXT) - tmpaddr += ANOFFSET (section_offsets, sec); + tmpaddr += ANOFFSET (objfile->section_offsets, sec); switch (sec) { @@ -1012,7 +1005,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) { struct symbol *sym; sym = process_coff_symbol - (cs, &main_aux, section_offsets, objfile); + (cs, &main_aux, objfile); SYMBOL_VALUE (sym) = tmpaddr; SYMBOL_SECTION (sym) = sec; } @@ -1039,8 +1032,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) new = push_context (depth, fcn_start_addr); fcn_cs_saved.c_name = getsymname (&fcn_sym_saved); new->name = - process_coff_symbol (&fcn_cs_saved, &fcn_aux_saved, - section_offsets, objfile); + process_coff_symbol (&fcn_cs_saved, &fcn_aux_saved, objfile); } else if (STREQ (cs->c_name, ".ef")) { @@ -1084,7 +1076,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) fcn_first_line_addr); else enter_linenos (fcn_line_ptr, fcn_first_line, fcn_last_line, - section_offsets); + objfile->section_offsets); finish_block (new->name, &local_symbols, new->old_blocks, new->start_addr, @@ -1098,11 +1090,11 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) of the epilogue. */ cs->c_value + FUNCTION_EPILOGUE_SIZE - + ANOFFSET (section_offsets, SECT_OFF_TEXT), + + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT), #else fcn_cs_saved.c_value + fcn_aux_saved.x_sym.x_misc.x_fsize - + ANOFFSET (section_offsets, SECT_OFF_TEXT), + + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT), #endif objfile ); @@ -1114,7 +1106,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) if (STREQ (cs->c_name, ".bb")) { tmpaddr = cs->c_value; - tmpaddr += ANOFFSET (section_offsets, SECT_OFF_TEXT); + tmpaddr += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); push_context (++depth, tmpaddr); } else if (STREQ (cs->c_name, ".eb")) @@ -1134,7 +1126,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) if (local_symbols && context_stack_depth > 0) { tmpaddr = - cs->c_value + ANOFFSET (section_offsets, SECT_OFF_TEXT); + cs->c_value + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); /* Make a block for the local symbols within. */ finish_block (0, &local_symbols, new->old_blocks, new->start_addr, tmpaddr, objfile); @@ -1145,7 +1137,7 @@ coff_symtab_read (symtab_offset, nsyms, section_offsets, objfile) break; default: - process_coff_symbol (cs, &main_aux, section_offsets, objfile); + process_coff_symbol (cs, &main_aux, objfile); break; } } @@ -1521,10 +1513,9 @@ patch_opaque_types (s) } static struct symbol * -process_coff_symbol (cs, aux, section_offsets, objfile) +process_coff_symbol (cs, aux, objfile) register struct coff_symbol *cs; register union internal_auxent *aux; - struct section_offsets *section_offsets; struct objfile *objfile; { register struct symbol *sym @@ -1547,7 +1538,7 @@ process_coff_symbol (cs, aux, section_offsets, objfile) if (ISFCN (cs->c_type)) { - SYMBOL_VALUE (sym) += ANOFFSET (section_offsets, SECT_OFF_TEXT); + SYMBOL_VALUE (sym) += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); SYMBOL_TYPE (sym) = lookup_function_type (decode_function_type (cs, cs->c_type, aux)); @@ -1577,7 +1568,7 @@ process_coff_symbol (cs, aux, section_offsets, objfile) case C_EXT: SYMBOL_CLASS (sym) = LOC_STATIC; SYMBOL_VALUE_ADDRESS (sym) = (CORE_ADDR) cs->c_value; - SYMBOL_VALUE_ADDRESS (sym) += ANOFFSET (section_offsets, SECT_OFF_TEXT); + SYMBOL_VALUE_ADDRESS (sym) += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); add_symbol_to_list (sym, &global_symbols); break; @@ -1586,7 +1577,7 @@ process_coff_symbol (cs, aux, section_offsets, objfile) case C_STAT: SYMBOL_CLASS (sym) = LOC_STATIC; SYMBOL_VALUE_ADDRESS (sym) = (CORE_ADDR) cs->c_value; - SYMBOL_VALUE_ADDRESS (sym) += ANOFFSET (section_offsets, SECT_OFF_TEXT); + SYMBOL_VALUE_ADDRESS (sym) += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); if (within_function) { /* Static symbol of local scope */ @@ -2211,8 +2202,7 @@ static struct sym_fns coff_sym_fns = coff_symfile_init, /* sym_init: read initial info, setup for sym_read() */ coff_symfile_read, /* sym_read: read a symbol file into symtab */ coff_symfile_finish, /* sym_finish: finished with file, cleanup */ - default_symfile_offsets, - /* sym_offsets: xlate external to internal form */ + default_symfile_offsets, /* sym_offsets: xlate external to internal form */ NULL /* next: pointer to next struct sym_fns */ }; diff --git a/gdb/command.c b/gdb/command.c index fd8b8145288..dc39265d6b6 100644 --- a/gdb/command.c +++ b/gdb/command.c @@ -1418,6 +1418,8 @@ do_setshow_command (arg, from_tty, c) else error ("gdb internal error: bad cmd_type in do_setshow_command"); (*c->function.sfunc) (NULL, from_tty, c); + if (c->type == set_cmd && set_hook) + set_hook (c); } /* Show all the settings in a list of show commands. */ diff --git a/gdb/complaints.c b/gdb/complaints.c index 3c05912911d..5903a4e47a5 100644 --- a/gdb/complaints.c +++ b/gdb/complaints.c @@ -60,24 +60,11 @@ extern int info_verbose; /* Print a complaint about the input symbols, and link the complaint block into a chain for later handling. */ -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES complain (struct complaint *complaint,...) -#else -complain (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, complaint); -#else - struct complaint *complaint; - - va_start (args); - complaint = va_arg (args, struct complaint *); -#endif complaint->counter++; if (complaint->next == NULL) diff --git a/gdb/config.in b/gdb/config.in index 1093eafede6..e691b8a8c4a 100644 --- a/gdb/config.in +++ b/gdb/config.in @@ -135,9 +135,6 @@ /* Define if you have the bzero function. */ #undef HAVE_BZERO -/* Define if you have the poll function. */ -#undef HAVE_POLL - /* Define if you have the dcgettext function. */ #undef HAVE_DCGETTEXT @@ -153,6 +150,9 @@ /* Define if you have the munmap function. */ #undef HAVE_MUNMAP +/* Define if you have the poll function. */ +#undef HAVE_POLL + /* Define if you have the putenv function. */ #undef HAVE_PUTENV @@ -171,6 +171,9 @@ /* Define if you have the sigaction function. */ #undef HAVE_SIGACTION +/* Define if you have the socketpair function. */ +#undef HAVE_SOCKETPAIR + /* Define if you have the stpcpy function. */ #undef HAVE_STPCPY diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h index 8a3553ff622..4fbeafd7e5e 100644 --- a/gdb/config/arm/tm-arm.h +++ b/gdb/config/arm/tm-arm.h @@ -290,8 +290,10 @@ extern use_struct_convention_fn arm_use_struct_convention; int frameoffset; \ int framereg; -extern void arm_init_extra_frame_info PARAMS ((struct frame_info * fi)); -#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) arm_init_extra_frame_info (fi) +extern void arm_init_extra_frame_info PARAMS ((int fromleaf, + struct frame_info *fi)); +#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \ + arm_init_extra_frame_info (fromleaf, fi) /* Return the frame address. On ARM, it is R11; on Thumb it is R7. */ CORE_ADDR arm_target_read_fp PARAMS ((void)); @@ -314,11 +316,25 @@ extern int arm_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *)); /* Define other aspects of the stack frame. */ -/* An expression that tells us whether the function invocation represented - by FI does not have a frame on the stack associated with it. */ -extern int arm_frameless_function_invocation PARAMS ((struct frame_info * frame)); -#define FRAMELESS_FUNCTION_INVOCATION(FI) (arm_frameless_function_invocation (FI)) - +/* A macro that tells us whether the function invocation represented + by FI does not have a frame on the stack associated with it. If it + does not, FRAMELESS is set to 1, else 0. + + Sometimes we have functions that do a little setup (like saving the vN + registers with the stmdb instruction, but DO NOT set up a frame. + The symbol table will report this as a prologue. However, it is + important not to try to parse these partial frames as frames, or we + will get really confused. + + So I will demand 3 instructions between the start & end of the prologue + before I call it a real prologue, i.e. at least + mov ip, sp, + stmdb sp!, {} + sub sp, ip, #4. */ + +#define FRAMELESS_FUNCTION_INVOCATION(FI) \ +(arm_frameless_function_invocation (FI)) + /* Saved Pc. */ #define FRAME_SAVED_PC(FRAME) arm_frame_saved_pc (FRAME) diff --git a/gdb/config/mcore/mcore.mt b/gdb/config/mcore/mcore.mt new file mode 100644 index 00000000000..ed9a9231099 --- /dev/null +++ b/gdb/config/mcore/mcore.mt @@ -0,0 +1,5 @@ +# Target: Motorola MCore processor +TDEPFILES= mcore-tdep.o mcore-rom.o monitor.o dsrec.o +TM_FILE= tm-mcore.h +SIM_OBS = remote-sim.o +SIM = ../sim/mcore/libsim.a diff --git a/gdb/config/mcore/tm-mcore.h b/gdb/config/mcore/tm-mcore.h new file mode 100644 index 00000000000..aab7b7475d1 --- /dev/null +++ b/gdb/config/mcore/tm-mcore.h @@ -0,0 +1,160 @@ +/* Parameters for execution on a Motorola MCore. + Copyright (C) 1995 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* The mcore is big endian */ +#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN + +/* All registers are 32 bits */ +#define REGISTER_SIZE 4 +#define MAX_REGISTER_RAW_SIZE 4 + +#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int + +#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE) +#define REGISTER_VIRTUAL_SIZE(REG) 4 +#define REGISTER_RAW_SIZE(REG) 4 + +#define MAX_REGISTER_VIRTUAL_SIZE 4 + +#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE) + +extern char *mcore_register_names[]; +#define REGISTER_NAME(I) mcore_register_names[I] + +/* Registers. The Motorola MCore contains: + + 16 32-bit general purpose registers (r0-r15) + 16 32-bit alternate file registers (ar0-ar15) + 32 32-bit control registers (cr0-cr31) + + 1 pc + ------ + 65 registers */ +#define NUM_REGS 65 +#define PC_REGNUM 64 +#define SP_REGNUM 0 +#define FP_REGNUM (SP_REGNUM) +#define PR_REGNUM 15 +#define FIRST_ARGREG 2 +#define LAST_ARGREG 7 +#define RETVAL_REGNUM 2 + +/* Offset from address of function to start of its code. + Zero on most machines. */ +#define FUNCTION_START_OFFSET 0 + +#define DECR_PC_AFTER_BREAK 0 + +/* BREAKPOINT_FROM_PC uses the program counter value to determine + the breakpoint that should be used. */ +extern breakpoint_from_pc_fn mcore_breakpoint_from_pc; +#define BREAKPOINT_FROM_PC(PCPTR, LENPTR) mcore_breakpoint_from_pc (PCPTR, LENPTR) + +#define INNER_THAN(LHS,RHS) ((LHS) < (RHS)) + +#define SAVED_PC_AFTER_CALL(FRAME) read_register (PR_REGNUM) + +struct frame_info; +struct type; +struct value; + +extern void mcore_init_extra_frame_info (struct frame_info *fi); +#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FI) mcore_init_extra_frame_info ((FI)) +#define INIT_FRAME_PC /* Not necessary */ +#define FRAME_INIT_SAVED_REGS(FI) /* handled by init_extra_frame_info */ + +extern CORE_ADDR mcore_frame_chain (struct frame_info *fi); +#define FRAME_CHAIN(FI) mcore_frame_chain ((FI)) +#define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid ((FP), (FI)) + +extern CORE_ADDR mcore_frame_saved_pc (struct frame_info *); +#define FRAME_SAVED_PC(FI) (mcore_frame_saved_pc ((FI))) + +/* Extracting/storing return values. */ +extern void mcore_store_return_value (struct type *type, char *valbuf); +#define STORE_RETURN_VALUE(TYPE, VALBUF) mcore_store_return_value ((TYPE), (VALBUF)) + +extern void mcore_extract_return_value (struct type *type, char *regbut, char *valbuf); +#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ + mcore_extract_return_value ((TYPE), (REGBUF), (VALBUF)); + +#define STORE_STRUCT_RETURN(ADDR, SP) /* handled by mcore_push_arguments */ + +extern CORE_ADDR mcore_extract_struct_value_address (char *regbuf); +#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \ + mcore_extract_struct_value_address (REGBUF) + +extern CORE_ADDR mcore_skip_prologue (CORE_ADDR pc); +#define SKIP_PROLOGUE(PC) (PC) = mcore_skip_prologue ((PC)) + +#define FRAME_ARGS_SKIP 0 +extern CORE_ADDR mcore_frame_args_address (struct frame_info *fi); +#define FRAME_ARGS_ADDRESS(FI) mcore_frame_args_address ((FI)) +extern CORE_ADDR mcore_frame_locals_address (struct frame_info *fi); +#define FRAME_LOCALS_ADDRESS(FI) mcore_frame_locals_address ((FI)) +#define FRAME_NUM_ARGS(FI) (-1) + + +extern void mcore_pop_frame (struct frame_info *fi); +#define POP_FRAME mcore_pop_frame (get_current_frame ()) + +#define USE_GENERIC_DUMMY_FRAMES 1 +#define CALL_DUMMY {0} +#define CALL_DUMMY_START_OFFSET (0) +#define CALL_DUMMY_BREAKPOINT_OFFSET (0) +#define CALL_DUMMY_LOCATION AT_ENTRY_POINT +#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP) +#define CALL_DUMMY_ADDRESS() entry_point_address () +#define SIZEOF_CALL_DUMMY_WORDS 0 + +extern CORE_ADDR mcore_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR)); +#define PUSH_RETURN_ADDRESS(PC, SP) mcore_push_return_address (PC, SP) + +#define PUSH_DUMMY_FRAME generic_push_dummy_frame () + +extern CORE_ADDR mcore_push_arguments PARAMS ((int, struct value **, CORE_ADDR, + unsigned char, CORE_ADDR)); +#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \ + (SP) = mcore_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) + +#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP) + +/* MCore will never pass a sturcture by reference. It will always be split + between registers and stack. */ +#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) 0 + +extern use_struct_convention_fn mcore_use_struct_convention; +#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mcore_use_struct_convention (GCC_P, TYPE) + +/* override the default get_saved_register function with + one that takes account of generic CALL_DUMMY frames */ +#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ + generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) + +/* Cons up virtual frame pointer for trace */ +extern void mcore_virtual_frame_pointer PARAMS ((CORE_ADDR, long *, long *)); +#define TARGET_VIRTUAL_FRAME_POINTER(PC, REGP, OFFP) \ + mcore_virtual_frame_pointer ((PC), (REGP), (OFFP)) + +/* MCore can be bi-endian. */ +#define TARGET_BYTE_ORDER_SELECTABLE_P 1 + +/* For PE, gcc will tell us what th real type of + arguments are when it promotes arguments. */ +#define BELIEVE_PCC_PROMOTION 1 diff --git a/gdb/configure b/gdb/configure index 16f9ab8bdc8..b2d683cc0b5 100755 --- a/gdb/configure +++ b/gdb/configure @@ -16,6 +16,8 @@ ac_help="$ac_help ac_help="$ac_help --with-included-gettext use the GNU gettext library included here" ac_help="$ac_help + --enable-multi-ice Build the multi-ice-gdb-server" +ac_help="$ac_help --enable-tui Enable full-screen terminal user interface" ac_help="$ac_help --enable-netrom Enable NetROM support" @@ -76,7 +78,6 @@ program_suffix=NONE program_transform_name=s,x,x, silent= site= -sitefile= srcdir= target=NONE verbose= @@ -191,7 +192,6 @@ Configuration: --help print this message --no-create do not create output files --quiet, --silent do not print \`checking...' messages - --site-file=FILE use FILE as the site file --version print the version of autoconf that created configure Directory and file names: --prefix=PREFIX install architecture-independent files in PREFIX @@ -362,11 +362,6 @@ EOF -site=* | --site=* | --sit=*) site="$ac_optarg" ;; - -site-file | --site-file | --site-fil | --site-fi | --site-f) - ac_prev=sitefile ;; - -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*) - sitefile="$ac_optarg" ;; - -srcdir | --srcdir | --srcdi | --srcd | --src | --sr) ac_prev=srcdir ;; -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*) @@ -532,16 +527,12 @@ fi srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` # Prefer explicitly selected file to automatically selected ones. -if test -z "$sitefile"; then - if test -z "$CONFIG_SITE"; then - if test "x$prefix" != xNONE; then - CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" - else - CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" - fi +if test -z "$CONFIG_SITE"; then + if test "x$prefix" != xNONE; then + CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" + else + CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" fi -else - CONFIG_SITE="$sitefile" fi for ac_site_file in $CONFIG_SITE; do if test -r "$ac_site_file"; then @@ -585,7 +576,7 @@ fi # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:589: checking for $ac_word" >&5 +echo "configure:580: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -615,7 +606,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:619: checking for $ac_word" >&5 +echo "configure:610: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -666,7 +657,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:670: checking for $ac_word" >&5 +echo "configure:661: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -698,7 +689,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:702: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:693: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -709,12 +700,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 713 "configure" +#line 704 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:718: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:709: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -740,12 +731,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:744: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:735: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:749: checking whether we are using GNU C" >&5 +echo "configure:740: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -754,7 +745,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:758: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:749: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -773,7 +764,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:777: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:768: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -805,7 +796,7 @@ else fi echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:809: checking how to run the C preprocessor" >&5 +echo "configure:800: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -820,13 +811,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 824 "configure" +#line 815 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:830: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:821: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -837,13 +828,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 841 "configure" +#line 832 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:847: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:838: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -854,13 +845,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext <<EOF -#line 858 "configure" +#line 849 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:864: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:855: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -885,9 +876,9 @@ fi echo "$ac_t""$CPP" 1>&6 echo $ac_n "checking for AIX""... $ac_c" 1>&6 -echo "configure:889: checking for AIX" >&5 +echo "configure:880: checking for AIX" >&5 cat > conftest.$ac_ext <<EOF -#line 891 "configure" +#line 882 "configure" #include "confdefs.h" #ifdef _AIX yes @@ -909,7 +900,7 @@ rm -f conftest* echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6 -echo "configure:913: checking for POSIXized ISC" >&5 +echo "configure:904: checking for POSIXized ISC" >&5 if test -d /etc/conf/kconfig.d && grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1 then @@ -933,7 +924,7 @@ fi echo $ac_n "checking for ${CC-cc} option to accept ANSI C""... $ac_c" 1>&6 -echo "configure:937: checking for ${CC-cc} option to accept ANSI C" >&5 +echo "configure:928: checking for ${CC-cc} option to accept ANSI C" >&5 if eval "test \"`echo '$''{'am_cv_prog_cc_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -949,7 +940,7 @@ for ac_arg in "" -qlanglvl=ansi -std1 "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__ do CC="$ac_save_CC $ac_arg" cat > conftest.$ac_ext <<EOF -#line 953 "configure" +#line 944 "configure" #include "confdefs.h" #include <stdarg.h> #include <stdio.h> @@ -986,7 +977,7 @@ return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; ; return 0; } EOF -if { (eval echo configure:990: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:981: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* am_cv_prog_cc_stdc="$ac_arg"; break else @@ -1057,7 +1048,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:1061: checking host system type" >&5 +echo "configure:1052: checking host system type" >&5 host_alias=$host case "$host_alias" in @@ -1078,7 +1069,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:1082: checking target system type" >&5 +echo "configure:1073: checking target system type" >&5 target_alias=$target case "$target_alias" in @@ -1096,7 +1087,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:1100: checking build system type" >&5 +echo "configure:1091: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -1121,7 +1112,7 @@ test "$host_alias" != "$target_alias" && ALL_LINGUAS= echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 -echo "configure:1125: checking whether ${MAKE-make} sets \${MAKE}" >&5 +echo "configure:1116: checking whether ${MAKE-make} sets \${MAKE}" >&5 set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -1150,7 +1141,7 @@ fi # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1154: checking for $ac_word" >&5 +echo "configure:1145: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1178,12 +1169,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:1182: checking for ANSI C header files" >&5 +echo "configure:1173: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1187 "configure" +#line 1178 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -1191,7 +1182,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1195: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1186: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -1208,7 +1199,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 1212 "configure" +#line 1203 "configure" #include "confdefs.h" #include <string.h> EOF @@ -1226,7 +1217,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 1230 "configure" +#line 1221 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -1247,7 +1238,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 1251 "configure" +#line 1242 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -1258,7 +1249,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:1262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:1253: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -1282,12 +1273,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:1286: checking for working const" >&5 +echo "configure:1277: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1291 "configure" +#line 1282 "configure" #include "confdefs.h" int main() { @@ -1336,7 +1327,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:1340: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:1331: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -1357,21 +1348,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:1361: checking for inline" >&5 +echo "configure:1352: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 1368 "configure" +#line 1359 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:1375: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:1366: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -1397,12 +1388,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:1401: checking for off_t" >&5 +echo "configure:1392: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1406 "configure" +#line 1397 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -1430,12 +1421,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:1434: checking for size_t" >&5 +echo "configure:1425: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1439 "configure" +#line 1430 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -1465,19 +1456,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:1469: checking for working alloca.h" >&5 +echo "configure:1460: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1474 "configure" +#line 1465 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:1481: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1472: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -1498,12 +1489,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:1502: checking for alloca" >&5 +echo "configure:1493: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1507 "configure" +#line 1498 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -1531,7 +1522,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:1535: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1526: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -1563,12 +1554,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:1567: checking whether alloca needs Cray hooks" >&5 +echo "configure:1558: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1572 "configure" +#line 1563 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -1593,12 +1584,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:1597: checking for $ac_func" >&5 +echo "configure:1588: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1602 "configure" +#line 1593 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -1621,7 +1612,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:1625: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1616: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -1648,7 +1639,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:1652: checking stack direction for C alloca" >&5 +echo "configure:1643: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1656,7 +1647,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 1660 "configure" +#line 1651 "configure" #include "confdefs.h" find_stack_direction () { @@ -1675,7 +1666,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:1679: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:1670: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -1700,17 +1691,17 @@ for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1704: checking for $ac_hdr" >&5 +echo "configure:1695: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1709 "configure" +#line 1700 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1714: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1705: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -1739,12 +1730,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:1743: checking for $ac_func" >&5 +echo "configure:1734: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1748 "configure" +#line 1739 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -1767,7 +1758,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:1771: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1762: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -1792,7 +1783,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:1796: checking for working mmap" >&5 +echo "configure:1787: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1800,7 +1791,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 1804 "configure" +#line 1795 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -1940,7 +1931,7 @@ main() } EOF -if { (eval echo configure:1944: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:1935: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -1968,17 +1959,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1972: checking for $ac_hdr" >&5 +echo "configure:1963: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1977 "configure" +#line 1968 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1982: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1973: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -2008,12 +1999,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2012: checking for $ac_func" >&5 +echo "configure:2003: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2017 "configure" +#line 2008 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -2036,7 +2027,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:2040: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2031: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -2065,12 +2056,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2069: checking for $ac_func" >&5 +echo "configure:2060: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2074 "configure" +#line 2065 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -2093,7 +2084,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:2097: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2088: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -2127,19 +2118,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:2131: checking for LC_MESSAGES" >&5 +echo "configure:2122: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2136 "configure" +#line 2127 "configure" #include "confdefs.h" #include <locale.h> int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:2143: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2134: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -2160,7 +2151,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:2164: checking whether NLS is requested" >&5 +echo "configure:2155: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -2180,7 +2171,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:2184: checking whether included gettext is requested" >&5 +echo "configure:2175: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -2199,17 +2190,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:2203: checking for libintl.h" >&5 +echo "configure:2194: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2208 "configure" +#line 2199 "configure" #include "confdefs.h" #include <libintl.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2213: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2204: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -2226,19 +2217,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:2230: checking for gettext in libc" >&5 +echo "configure:2221: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2235 "configure" +#line 2226 "configure" #include "confdefs.h" #include <libintl.h> int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:2242: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2233: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -2254,7 +2245,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:2258: checking for bindtextdomain in -lintl" >&5 +echo "configure:2249: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -2262,7 +2253,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <<EOF -#line 2266 "configure" +#line 2257 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -2273,7 +2264,7 @@ int main() { bindtextdomain() ; return 0; } EOF -if { (eval echo configure:2277: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2268: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -2289,19 +2280,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:2293: checking for gettext in libintl" >&5 +echo "configure:2284: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2298 "configure" +#line 2289 "configure" #include "confdefs.h" int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:2305: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2296: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -2329,7 +2320,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2333: checking for $ac_word" >&5 +echo "configure:2324: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2363,12 +2354,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2367: checking for $ac_func" >&5 +echo "configure:2358: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2372 "configure" +#line 2363 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -2391,7 +2382,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:2395: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2386: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -2418,7 +2409,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2422: checking for $ac_word" >&5 +echo "configure:2413: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2454,7 +2445,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2458: checking for $ac_word" >&5 +echo "configure:2449: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2486,7 +2477,7 @@ else fi cat > conftest.$ac_ext <<EOF -#line 2490 "configure" +#line 2481 "configure" #include "confdefs.h" int main() { @@ -2494,7 +2485,7 @@ extern int _nl_msg_cat_cntr; return _nl_msg_cat_cntr ; return 0; } EOF -if { (eval echo configure:2498: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2489: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -2526,7 +2517,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2530: checking for $ac_word" >&5 +echo "configure:2521: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2560,7 +2551,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2564: checking for $ac_word" >&5 +echo "configure:2555: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2596,7 +2587,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2600: checking for $ac_word" >&5 +echo "configure:2591: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2686,7 +2677,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:2690: checking for catalogs to be installed" >&5 +echo "configure:2681: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -2714,17 +2705,17 @@ echo "configure:2690: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:2718: checking for linux/version.h" >&5 +echo "configure:2709: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2723 "configure" +#line 2714 "configure" #include "confdefs.h" #include <linux/version.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2728: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2719: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -2793,6 +2784,22 @@ CONFIG_SRCS= configdirs="doc testsuite" +# Check whether --enable-multi-ice or --disable-multi-ice was given. +if test "${enable_multi_ice+set}" = set; then + enableval="$enable_multi_ice" + case "${enableval}" in + yes ) enable_multi_ice="yes" ;; + no) enable_multi_ice="no" ;; + *) { echo "configure: error: Bad value for --enable-multi-ice: ${enableval}" 1>&2; exit 1; } ;; + esac + +fi + + +if test "${enable_multi_ice}" = "yes"; then + configdirs="${configdirs} multi-ice" +fi + . ${srcdir}/configure.host @@ -2804,7 +2811,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2808: checking for $ac_word" >&5 +echo "configure:2815: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AWK'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2845,7 +2852,7 @@ done # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:2849: checking for a BSD compatible install" >&5 +echo "configure:2856: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -2906,7 +2913,7 @@ fi # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. set dummy ${ac_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2910: checking for $ac_word" >&5 +echo "configure:2917: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2938,7 +2945,7 @@ fi # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2942: checking for $ac_word" >&5 +echo "configure:2949: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2970,7 +2977,7 @@ if test -n "$ac_tool_prefix"; then # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2974: checking for $ac_word" >&5 +echo "configure:2981: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3007,7 +3014,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3011: checking for $ac_word" >&5 +echo "configure:3018: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3059,12 +3066,12 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x," echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6 -echo "configure:3063: checking return type of signal handlers" >&5 +echo "configure:3070: checking return type of signal handlers" >&5 if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3068 "configure" +#line 3075 "configure" #include "confdefs.h" #include <sys/types.h> #include <signal.h> @@ -3081,7 +3088,7 @@ int main() { int i; ; return 0; } EOF -if { (eval echo configure:3085: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3092: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_type_signal=void else @@ -3101,12 +3108,12 @@ EOF echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:3105: checking for ANSI C header files" >&5 +echo "configure:3112: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3110 "configure" +#line 3117 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -3114,7 +3121,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3118: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3125: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3131,7 +3138,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3135 "configure" +#line 3142 "configure" #include "confdefs.h" #include <string.h> EOF @@ -3149,7 +3156,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3153 "configure" +#line 3160 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -3170,7 +3177,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 3174 "configure" +#line 3181 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -3181,7 +3188,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:3185: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3192: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -3213,17 +3220,17 @@ for ac_hdr in ctype.h curses.h endian.h link.h \ do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3217: checking for $ac_hdr" >&5 +echo "configure:3224: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3222 "configure" +#line 3229 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3227: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3234: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3250,12 +3257,12 @@ fi done echo $ac_n "checking whether stat file-mode macros are broken""... $ac_c" 1>&6 -echo "configure:3254: checking whether stat file-mode macros are broken" >&5 +echo "configure:3261: checking whether stat file-mode macros are broken" >&5 if eval "test \"`echo '$''{'ac_cv_header_stat_broken'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3259 "configure" +#line 3266 "configure" #include "confdefs.h" #include <sys/types.h> #include <sys/stat.h> @@ -3307,12 +3314,12 @@ fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:3311: checking for working const" >&5 +echo "configure:3318: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3316 "configure" +#line 3323 "configure" #include "confdefs.h" int main() { @@ -3361,7 +3368,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:3365: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3372: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -3382,15 +3389,16 @@ EOF fi -for ac_func in setpgid sbrk sigaction isascii bzero bcopy btowc poll +for ac_func in setpgid sbrk sigaction isascii bzero bcopy btowc poll \ + socketpair do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3389: checking for $ac_func" >&5 +echo "configure:3397: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3394 "configure" +#line 3402 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3413,7 +3421,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3417: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3425: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3440,19 +3448,19 @@ done # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:3444: checking for working alloca.h" >&5 +echo "configure:3452: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3449 "configure" +#line 3457 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:3456: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3464: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -3473,12 +3481,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:3477: checking for alloca" >&5 +echo "configure:3485: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3482 "configure" +#line 3490 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -3506,7 +3514,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:3510: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3518: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -3538,12 +3546,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:3542: checking whether alloca needs Cray hooks" >&5 +echo "configure:3550: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3547 "configure" +#line 3555 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -3568,12 +3576,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3572: checking for $ac_func" >&5 +echo "configure:3580: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3577 "configure" +#line 3585 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3596,7 +3604,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3600: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3608: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3623,7 +3631,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:3627: checking stack direction for C alloca" >&5 +echo "configure:3635: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3631,7 +3639,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 3635 "configure" +#line 3643 "configure" #include "confdefs.h" find_stack_direction () { @@ -3650,7 +3658,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:3654: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3662: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -3673,12 +3681,12 @@ fi echo $ac_n "checking whether malloc must be declared""... $ac_c" 1>&6 -echo "configure:3677: checking whether malloc must be declared" >&5 +echo "configure:3685: checking whether malloc must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_malloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3682 "configure" +#line 3690 "configure" #include "confdefs.h" #include <stdio.h> @@ -3699,7 +3707,7 @@ int main() { char *(*pfn) = (char *(*)) malloc ; return 0; } EOF -if { (eval echo configure:3703: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3711: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_malloc=no else @@ -3720,12 +3728,12 @@ EOF fi echo $ac_n "checking whether realloc must be declared""... $ac_c" 1>&6 -echo "configure:3724: checking whether realloc must be declared" >&5 +echo "configure:3732: checking whether realloc must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_realloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3729 "configure" +#line 3737 "configure" #include "confdefs.h" #include <stdio.h> @@ -3746,7 +3754,7 @@ int main() { char *(*pfn) = (char *(*)) realloc ; return 0; } EOF -if { (eval echo configure:3750: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3758: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_realloc=no else @@ -3767,12 +3775,12 @@ EOF fi echo $ac_n "checking whether free must be declared""... $ac_c" 1>&6 -echo "configure:3771: checking whether free must be declared" >&5 +echo "configure:3779: checking whether free must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_free'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3776 "configure" +#line 3784 "configure" #include "confdefs.h" #include <stdio.h> @@ -3793,7 +3801,7 @@ int main() { char *(*pfn) = (char *(*)) free ; return 0; } EOF -if { (eval echo configure:3797: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3805: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_free=no else @@ -3814,12 +3822,12 @@ EOF fi echo $ac_n "checking whether strerror must be declared""... $ac_c" 1>&6 -echo "configure:3818: checking whether strerror must be declared" >&5 +echo "configure:3826: checking whether strerror must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_strerror'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3823 "configure" +#line 3831 "configure" #include "confdefs.h" #include <stdio.h> @@ -3840,7 +3848,7 @@ int main() { char *(*pfn) = (char *(*)) strerror ; return 0; } EOF -if { (eval echo configure:3844: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3852: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_strerror=no else @@ -3861,12 +3869,12 @@ EOF fi echo $ac_n "checking whether strdup must be declared""... $ac_c" 1>&6 -echo "configure:3865: checking whether strdup must be declared" >&5 +echo "configure:3873: checking whether strdup must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_strdup'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3870 "configure" +#line 3878 "configure" #include "confdefs.h" #include <stdio.h> @@ -3887,7 +3895,7 @@ int main() { char *(*pfn) = (char *(*)) strdup ; return 0; } EOF -if { (eval echo configure:3891: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3899: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_strdup=no else @@ -3908,12 +3916,12 @@ EOF fi echo $ac_n "checking whether strstr must be declared""... $ac_c" 1>&6 -echo "configure:3912: checking whether strstr must be declared" >&5 +echo "configure:3920: checking whether strstr must be declared" >&5 if eval "test \"`echo '$''{'bfd_cv_decl_needed_strstr'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3917 "configure" +#line 3925 "configure" #include "confdefs.h" #include <stdio.h> @@ -3934,7 +3942,7 @@ int main() { char *(*pfn) = (char *(*)) strstr ; return 0; } EOF -if { (eval echo configure:3938: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3946: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_decl_needed_strstr=no else @@ -3961,9 +3969,9 @@ fi # could be expunged. --jsm 1999-03-22 echo $ac_n "checking for HPUX save_state structure""... $ac_c" 1>&6 -echo "configure:3965: checking for HPUX save_state structure" >&5 +echo "configure:3973: checking for HPUX save_state structure" >&5 cat > conftest.$ac_ext <<EOF -#line 3967 "configure" +#line 3975 "configure" #include "confdefs.h" #include <machine/save_state.h> EOF @@ -3978,7 +3986,7 @@ fi rm -f conftest* cat > conftest.$ac_ext <<EOF -#line 3982 "configure" +#line 3990 "configure" #include "confdefs.h" #include <machine/save_state.h> EOF @@ -4030,7 +4038,7 @@ EOF gdb_cv_hostos_is_solaris=yes ;; esac echo $ac_n "checking for directory proc entries""... $ac_c" 1>&6 -echo "configure:4034: checking for directory proc entries" >&5 +echo "configure:4042: checking for directory proc entries" >&5 # The [gdb_host != sun4sol2] hack is because Solaris does provide the # multiple procfs files as of Solaris 2.6, but GDB can't use it right now. if test "$ac_cv_header_sys_procfs_h" = yes -a \ @@ -4052,19 +4060,19 @@ fi if test "$ac_cv_header_sys_procfs_h" = yes; then echo $ac_n "checking for pstatus_t in sys/procfs.h""... $ac_c" 1>&6 -echo "configure:4056: checking for pstatus_t in sys/procfs.h" >&5 +echo "configure:4064: checking for pstatus_t in sys/procfs.h" >&5 if eval "test \"`echo '$''{'bfd_cv_have_sys_procfs_type_pstatus_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4061 "configure" +#line 4069 "configure" #include "confdefs.h" #include <sys/procfs.h> int main() { pstatus_t avar ; return 0; } EOF -if { (eval echo configure:4068: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4076: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_have_sys_procfs_type_pstatus_t=yes else @@ -4086,19 +4094,19 @@ EOF echo "$ac_t""$bfd_cv_have_sys_procfs_type_pstatus_t" 1>&6 echo $ac_n "checking for prrun_t in sys/procfs.h""... $ac_c" 1>&6 -echo "configure:4090: checking for prrun_t in sys/procfs.h" >&5 +echo "configure:4098: checking for prrun_t in sys/procfs.h" >&5 if eval "test \"`echo '$''{'bfd_cv_have_sys_procfs_type_prrun_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4095 "configure" +#line 4103 "configure" #include "confdefs.h" #include <sys/procfs.h> int main() { prrun_t avar ; return 0; } EOF -if { (eval echo configure:4102: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4110: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_have_sys_procfs_type_prrun_t=yes else @@ -4120,19 +4128,19 @@ EOF echo "$ac_t""$bfd_cv_have_sys_procfs_type_prrun_t" 1>&6 echo $ac_n "checking for gregset_t in sys/procfs.h""... $ac_c" 1>&6 -echo "configure:4124: checking for gregset_t in sys/procfs.h" >&5 +echo "configure:4132: checking for gregset_t in sys/procfs.h" >&5 if eval "test \"`echo '$''{'bfd_cv_have_sys_procfs_type_gregset_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4129 "configure" +#line 4137 "configure" #include "confdefs.h" #include <sys/procfs.h> int main() { gregset_t avar ; return 0; } EOF -if { (eval echo configure:4136: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4144: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_have_sys_procfs_type_gregset_t=yes else @@ -4154,19 +4162,19 @@ EOF echo "$ac_t""$bfd_cv_have_sys_procfs_type_gregset_t" 1>&6 echo $ac_n "checking for fpregset_t in sys/procfs.h""... $ac_c" 1>&6 -echo "configure:4158: checking for fpregset_t in sys/procfs.h" >&5 +echo "configure:4166: checking for fpregset_t in sys/procfs.h" >&5 if eval "test \"`echo '$''{'bfd_cv_have_sys_procfs_type_fpregset_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4163 "configure" +#line 4171 "configure" #include "confdefs.h" #include <sys/procfs.h> int main() { fpregset_t avar ; return 0; } EOF -if { (eval echo configure:4170: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4178: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* bfd_cv_have_sys_procfs_type_fpregset_t=yes else @@ -4190,12 +4198,12 @@ EOF echo $ac_n "checking for PIOCSET ioctl entry in sys/procfs.h""... $ac_c" 1>&6 -echo "configure:4194: checking for PIOCSET ioctl entry in sys/procfs.h" >&5 +echo "configure:4202: checking for PIOCSET ioctl entry in sys/procfs.h" >&5 if eval "test \"`echo '$''{'gdb_cv_have_procfs_piocset'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4199 "configure" +#line 4207 "configure" #include "confdefs.h" #include <unistd.h> #include <sys/types.h> @@ -4208,7 +4216,7 @@ int main() { ; return 0; } EOF -if { (eval echo configure:4212: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4220: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* gdb_cv_have_procfs_piocset=yes else @@ -4230,7 +4238,7 @@ EOF fi echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:4234: checking for main in -lm" >&5 +echo "configure:4242: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4238,14 +4246,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 4242 "configure" +#line 4250 "configure" #include "confdefs.h" int main() { main() ; return 0; } EOF -if { (eval echo configure:4249: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4257: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4274,7 +4282,7 @@ fi echo $ac_n "checking for wctype in -lc""... $ac_c" 1>&6 -echo "configure:4278: checking for wctype in -lc" >&5 +echo "configure:4286: checking for wctype in -lc" >&5 ac_lib_var=`echo c'_'wctype | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4282,7 +4290,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lc $LIBS" cat > conftest.$ac_ext <<EOF -#line 4286 "configure" +#line 4294 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4293,7 +4301,7 @@ int main() { wctype() ; return 0; } EOF -if { (eval echo configure:4297: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4305: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4312,7 +4320,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for wctype in -lw""... $ac_c" 1>&6 -echo "configure:4316: checking for wctype in -lw" >&5 +echo "configure:4324: checking for wctype in -lw" >&5 ac_lib_var=`echo w'_'wctype | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4320,7 +4328,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lw $LIBS" cat > conftest.$ac_ext <<EOF -#line 4324 "configure" +#line 4332 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4331,7 +4339,7 @@ int main() { wctype() ; return 0; } EOF -if { (eval echo configure:4335: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4343: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4363,12 +4371,12 @@ fi echo $ac_n "checking for long long support in compiler""... $ac_c" 1>&6 -echo "configure:4367: checking for long long support in compiler" >&5 +echo "configure:4375: checking for long long support in compiler" >&5 if eval "test \"`echo '$''{'gdb_cv_c_long_long'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4372 "configure" +#line 4380 "configure" #include "confdefs.h" int main() { @@ -4378,7 +4386,7 @@ int main() { ; return 0; } EOF -if { (eval echo configure:4382: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4390: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* gdb_cv_c_long_long=yes else @@ -4400,7 +4408,7 @@ fi echo $ac_n "checking for long long support in printf""... $ac_c" 1>&6 -echo "configure:4404: checking for long long support in printf" >&5 +echo "configure:4412: checking for long long support in printf" >&5 if eval "test \"`echo '$''{'gdb_cv_printf_has_long_long'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4408,7 +4416,7 @@ else gdb_cv_printf_has_long_long=no else cat > conftest.$ac_ext <<EOF -#line 4412 "configure" +#line 4420 "configure" #include "confdefs.h" int main () { @@ -4422,7 +4430,7 @@ int main () { return (strcmp ("0x0123456789abcdef", buf)); } EOF -if { (eval echo configure:4426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4434: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then gdb_cv_printf_has_long_long=yes else @@ -4446,19 +4454,19 @@ echo "$ac_t""$gdb_cv_printf_has_long_long" 1>&6 echo $ac_n "checking for long double support in compiler""... $ac_c" 1>&6 -echo "configure:4450: checking for long double support in compiler" >&5 +echo "configure:4458: checking for long double support in compiler" >&5 if eval "test \"`echo '$''{'ac_cv_c_long_double'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4455 "configure" +#line 4463 "configure" #include "confdefs.h" int main() { long double foo; ; return 0; } EOF -if { (eval echo configure:4462: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4470: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_long_double=yes else @@ -4480,7 +4488,7 @@ fi echo $ac_n "checking for long double support in printf""... $ac_c" 1>&6 -echo "configure:4484: checking for long double support in printf" >&5 +echo "configure:4492: checking for long double support in printf" >&5 if eval "test \"`echo '$''{'gdb_cv_printf_has_long_double'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4488,7 +4496,7 @@ else gdb_cv_printf_has_long_double=no else cat > conftest.$ac_ext <<EOF -#line 4492 "configure" +#line 4500 "configure" #include "confdefs.h" int main () { @@ -4498,7 +4506,7 @@ int main () { return (strncmp ("3.14159", buf, 7)); } EOF -if { (eval echo configure:4502: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4510: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then gdb_cv_printf_has_long_double=yes else @@ -4522,7 +4530,7 @@ echo "$ac_t""$gdb_cv_printf_has_long_double" 1>&6 echo $ac_n "checking for long double support in scanf""... $ac_c" 1>&6 -echo "configure:4526: checking for long double support in scanf" >&5 +echo "configure:4534: checking for long double support in scanf" >&5 if eval "test \"`echo '$''{'gdb_cv_scanf_has_long_double'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4530,7 +4538,7 @@ else gdb_cv_scanf_has_long_double=no else cat > conftest.$ac_ext <<EOF -#line 4534 "configure" +#line 4542 "configure" #include "confdefs.h" int main () { @@ -4540,7 +4548,7 @@ int main () { return !(f > 3.14159 && f < 3.14160); } EOF -if { (eval echo configure:4544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4552: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then gdb_cv_scanf_has_long_double=yes else @@ -4566,17 +4574,17 @@ for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4570: checking for $ac_hdr" >&5 +echo "configure:4578: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4575 "configure" +#line 4583 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4580: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4588: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4605,12 +4613,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4609: checking for $ac_func" >&5 +echo "configure:4617: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4614 "configure" +#line 4622 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4633,7 +4641,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4637: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4645: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4658,7 +4666,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:4662: checking for working mmap" >&5 +echo "configure:4670: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4666,7 +4674,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 4670 "configure" +#line 4678 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -4806,7 +4814,7 @@ main() } EOF -if { (eval echo configure:4810: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4818: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -4835,7 +4843,7 @@ if test ${build} = ${host} -a ${host} = ${target} ; then case ${host_os} in hpux*) echo $ac_n "checking for HPUX/OSF thread support""... $ac_c" 1>&6 -echo "configure:4839: checking for HPUX/OSF thread support" >&5 +echo "configure:4847: checking for HPUX/OSF thread support" >&5 if test -f /usr/include/dce/cma_config.h ; then if test "$GCC" = "yes" ; then echo "$ac_t""yes" 1>&6 @@ -4854,7 +4862,7 @@ EOF ;; solaris*) echo $ac_n "checking for Solaris thread debugging library""... $ac_c" 1>&6 -echo "configure:4858: checking for Solaris thread debugging library" >&5 +echo "configure:4866: checking for Solaris thread debugging library" >&5 if test -f /usr/lib/libthread_db.so.1 ; then echo "$ac_t""yes" 1>&6 cat >> confdefs.h <<\EOF @@ -4864,7 +4872,7 @@ EOF CONFIG_OBS="${CONFIG_OBS} sol-thread.o" CONFIG_SRCS="${CONFIG_SRCS} sol-thread.c" echo $ac_n "checking for dlopen in -ldl""... $ac_c" 1>&6 -echo "configure:4868: checking for dlopen in -ldl" >&5 +echo "configure:4876: checking for dlopen in -ldl" >&5 ac_lib_var=`echo dl'_'dlopen | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4872,7 +4880,7 @@ else ac_save_LIBS="$LIBS" LIBS="-ldl $LIBS" cat > conftest.$ac_ext <<EOF -#line 4876 "configure" +#line 4884 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4883,7 +4891,7 @@ int main() { dlopen() ; return 0; } EOF -if { (eval echo configure:4887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4895: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4915,17 +4923,17 @@ fi # all symbols visible in the dynamic symbol table. hold_ldflags=$LDFLAGS echo $ac_n "checking for the ld -export-dynamic flag""... $ac_c" 1>&6 -echo "configure:4919: checking for the ld -export-dynamic flag" >&5 +echo "configure:4927: checking for the ld -export-dynamic flag" >&5 LDFLAGS="${LDFLAGS} -Wl,-export-dynamic" cat > conftest.$ac_ext <<EOF -#line 4922 "configure" +#line 4930 "configure" #include "confdefs.h" int main() { int i; ; return 0; } EOF -if { (eval echo configure:4929: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4937: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* found=yes else @@ -4944,13 +4952,13 @@ rm -f conftest* # Sun randomly tweaked the prototypes in <proc_service.h> # at one point. echo $ac_n "checking if <proc_service.h> is old""... $ac_c" 1>&6 -echo "configure:4948: checking if <proc_service.h> is old" >&5 +echo "configure:4956: checking if <proc_service.h> is old" >&5 if eval "test \"`echo '$''{'gdb_cv_proc_service_is_old'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4954 "configure" +#line 4962 "configure" #include "confdefs.h" #include <proc_service.h> @@ -4961,7 +4969,7 @@ int main() { ; return 0; } EOF -if { (eval echo configure:4965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:4973: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* gdb_cv_proc_service_is_old=no else @@ -5096,12 +5104,12 @@ fi # In the Cygwin environment, we need some additional flags. echo $ac_n "checking for cygwin""... $ac_c" 1>&6 -echo "configure:5223: checking for cygwin" >&5 +echo "configure:5231: checking for cygwin" >&5 if eval "test \"`echo '$''{'gdb_cv_os_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5228 "configure" +#line 5236 "configure" #include "confdefs.h" #if defined (__CYGWIN__) || defined (__CYGWIN32__) @@ -5135,7 +5143,7 @@ if test x$gdb_cv_os_cygwin = xyes; then else TERM_LIB= echo $ac_n "checking for tgetent in -lncurses""... $ac_c" 1>&6 -echo "configure:5262: checking for tgetent in -lncurses" >&5 +echo "configure:5270: checking for tgetent in -lncurses" >&5 ac_lib_var=`echo ncurses'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5143,7 +5151,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lncurses $LIBS" cat > conftest.$ac_ext <<EOF -#line 5270 "configure" +#line 5278 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5154,7 +5162,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5281: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5289: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5173,7 +5181,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for tgetent in -lHcurses""... $ac_c" 1>&6 -echo "configure:5300: checking for tgetent in -lHcurses" >&5 +echo "configure:5308: checking for tgetent in -lHcurses" >&5 ac_lib_var=`echo Hcurses'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5181,7 +5189,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lHcurses $LIBS" cat > conftest.$ac_ext <<EOF -#line 5308 "configure" +#line 5316 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5192,7 +5200,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5319: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5327: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5211,7 +5219,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for tgetent in -ltermlib""... $ac_c" 1>&6 -echo "configure:5338: checking for tgetent in -ltermlib" >&5 +echo "configure:5346: checking for tgetent in -ltermlib" >&5 ac_lib_var=`echo termlib'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5219,7 +5227,7 @@ else ac_save_LIBS="$LIBS" LIBS="-ltermlib $LIBS" cat > conftest.$ac_ext <<EOF -#line 5346 "configure" +#line 5354 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5230,7 +5238,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5357: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5365: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5249,7 +5257,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for tgetent in -ltermcap""... $ac_c" 1>&6 -echo "configure:5376: checking for tgetent in -ltermcap" >&5 +echo "configure:5384: checking for tgetent in -ltermcap" >&5 ac_lib_var=`echo termcap'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5257,7 +5265,7 @@ else ac_save_LIBS="$LIBS" LIBS="-ltermcap $LIBS" cat > conftest.$ac_ext <<EOF -#line 5384 "configure" +#line 5392 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5268,7 +5276,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5395: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5403: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5287,7 +5295,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for tgetent in -lcurses""... $ac_c" 1>&6 -echo "configure:5414: checking for tgetent in -lcurses" >&5 +echo "configure:5422: checking for tgetent in -lcurses" >&5 ac_lib_var=`echo curses'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5295,7 +5303,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lcurses $LIBS" cat > conftest.$ac_ext <<EOF -#line 5422 "configure" +#line 5430 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5306,7 +5314,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5433: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5441: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5325,7 +5333,7 @@ if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then else echo "$ac_t""no" 1>&6 echo $ac_n "checking for tgetent in -lterminfo""... $ac_c" 1>&6 -echo "configure:5452: checking for tgetent in -lterminfo" >&5 +echo "configure:5460: checking for tgetent in -lterminfo" >&5 ac_lib_var=`echo terminfo'_'tgetent | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5333,7 +5341,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lterminfo $LIBS" cat > conftest.$ac_ext <<EOF -#line 5460 "configure" +#line 5468 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5344,7 +5352,7 @@ int main() { tgetent() ; return 0; } EOF -if { (eval echo configure:5471: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5479: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5396,7 +5404,7 @@ fi # Uses ac_ vars as temps to allow command line to override cache and checks. # --without-x overrides everything else, but does not touch the cache. echo $ac_n "checking for X""... $ac_c" 1>&6 -echo "configure:6607: checking for X" >&5 +echo "configure:6615: checking for X" >&5 # Check whether --with-x or --without-x was given. if test "${with_x+set}" = set; then @@ -5458,12 +5466,12 @@ if test "$ac_x_includes" = NO; then # First, try using that file with no special directory specified. cat > conftest.$ac_ext <<EOF -#line 6669 "configure" +#line 6677 "configure" #include "confdefs.h" #include <$x_direct_test_include> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:6674: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:6682: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5532,14 +5540,14 @@ if test "$ac_x_libraries" = NO; then ac_save_LIBS="$LIBS" LIBS="-l$x_direct_test_library $LIBS" cat > conftest.$ac_ext <<EOF -#line 6743 "configure" +#line 6751 "configure" #include "confdefs.h" int main() { ${x_direct_test_function}() ; return 0; } EOF -if { (eval echo configure:6750: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6758: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* LIBS="$ac_save_LIBS" # We can link X programs with no special library path. @@ -5781,6 +5789,13 @@ s/NAT_FILE[ ]*=[ ]*\([^ ]*\)/\1/p fi +SUBDIRS="doc testsuite nlm" +if test "${enable_multi_ice}" = "yes"; then + SUBDIRS="${SUBDIRS} multi-ice" +fi + + + # If hostfile (XM_FILE) and/or targetfile (TM_FILE) and/or nativefile # (NAT_FILE) is not set in config/*/*.m[ht] files, we don't make the # corresponding links. But we have to remove the xm.h files and tm.h @@ -5812,12 +5827,12 @@ fi echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 -echo "configure:7094: checking for Cygwin environment" >&5 +echo "configure:7109: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 7099 "configure" +#line 7114 "configure" #include "confdefs.h" int main() { @@ -5828,7 +5843,7 @@ int main() { return __CYGWIN__; ; return 0; } EOF -if { (eval echo configure:7110: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:7125: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else @@ -5845,19 +5860,19 @@ echo "$ac_t""$ac_cv_cygwin" 1>&6 CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 -echo "configure:7127: checking for mingw32 environment" >&5 +echo "configure:7142: checking for mingw32 environment" >&5 if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 7132 "configure" +#line 7147 "configure" #include "confdefs.h" int main() { return __MINGW32__; ; return 0; } EOF -if { (eval echo configure:7139: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:7154: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_mingw32=yes else @@ -5876,7 +5891,7 @@ test "$ac_cv_mingw32" = yes && MINGW32=yes echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:7158: checking for executable suffix" >&5 +echo "configure:7173: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5886,7 +5901,7 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:7168: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:7183: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in *.c | *.o | *.obj | *.ilk | *.pdb) ;; @@ -6176,6 +6191,7 @@ s%@host_makefile_frag@%%g /@target_makefile_frag@/r $target_makefile_frag s%@target_makefile_frag@%%g s%@frags@%$frags%g +s%@SUBDIRS@%$SUBDIRS%g s%@LN_S@%$LN_S%g s%@EXEEXT@%$EXEEXT%g s%@subdirs@%$subdirs%g diff --git a/gdb/configure.in b/gdb/configure.in index 82cd0d064da..ba70e75522e 100644 --- a/gdb/configure.in +++ b/gdb/configure.in @@ -44,6 +44,19 @@ CONFIG_SRCS= configdirs="doc testsuite" +AC_ARG_ENABLE(multi-ice, +[ --enable-multi-ice Build the multi-ice-gdb-server], +[case "${enableval}" in + yes ) enable_multi_ice="yes" ;; + no) enable_multi_ice="no" ;; + *) AC_MSG_ERROR(Bad value for --enable-multi-ice: ${enableval}) ;; + esac +]) + +if test "${enable_multi_ice}" = "yes"; then + configdirs="${configdirs} multi-ice" +fi + dnl changequote(,)dnl @@ -75,7 +88,8 @@ AC_HEADER_STAT AC_C_CONST -AC_CHECK_FUNCS(setpgid sbrk sigaction isascii bzero bcopy btowc poll) +AC_CHECK_FUNCS(setpgid sbrk sigaction isascii bzero bcopy btowc poll \ + socketpair) AC_FUNC_ALLOCA BFD_NEED_DECLARATION(malloc) @@ -604,6 +618,13 @@ s/NAT_FILE[ ]*=[ ]*\([^ ]*\)/\1/p fi changequote([,]) +SUBDIRS="doc testsuite nlm" +if test "${enable_multi_ice}" = "yes"; then + SUBDIRS="${SUBDIRS} multi-ice" +fi + +AC_SUBST(SUBDIRS) + # If hostfile (XM_FILE) and/or targetfile (TM_FILE) and/or nativefile # (NAT_FILE) is not set in config/*/*.m[ht] files, we don't make the # corresponding links. But we have to remove the xm.h files and tm.h diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 60a02e3cb69..af1255cfba1 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -160,6 +160,7 @@ m88*-motorola-sysv4*) gdb_target=delta88v4 ;; m88*-motorola-*) gdb_target=delta88 ;; m88*-*-*) gdb_target=m88k ;; +mcore*-*-*) gdb_target=mcore ;; mips64*-big-*) gdb_target=bigmips64 ;; mips*-big-*) gdb_target=bigmips ;; mips*-dec-mach3*) gdb_target=mach3 ;; diff --git a/gdb/dbxread.c b/gdb/dbxread.c index 258daed30de..73eb3f4f4c8 100644 --- a/gdb/dbxread.c +++ b/gdb/dbxread.c @@ -286,12 +286,10 @@ static void dbx_psymtab_to_symtab_1 PARAMS ((struct partial_symtab *)); static void -read_dbx_dynamic_symtab PARAMS ((struct section_offsets *, - struct objfile * objfile)); +read_dbx_dynamic_symtab PARAMS ((struct objfile * objfile)); static void -read_dbx_symtab PARAMS ((struct section_offsets *, struct objfile *, - CORE_ADDR, int)); +read_dbx_symtab PARAMS ((struct objfile *, CORE_ADDR, int)); static void free_bincl_list PARAMS ((struct objfile *)); @@ -318,7 +316,7 @@ static void dbx_new_init PARAMS ((struct objfile *)); static void -dbx_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +dbx_symfile_read PARAMS ((struct objfile *, int)); static void dbx_symfile_finish PARAMS ((struct objfile *)); @@ -579,9 +577,8 @@ record_minimal_symbol (name, address, type, objfile) table (as opposed to a shared lib or dynamically loaded file). */ static void -dbx_symfile_read (objfile, section_offsets, mainline) +dbx_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; /* FIXME comments above */ { bfd *sym_bfd; @@ -631,13 +628,13 @@ dbx_symfile_read (objfile, section_offsets, mainline) /* Now that the symbol table data of the executable file are all in core, process them and define symbols accordingly. */ - read_dbx_symtab (section_offsets, objfile, + read_dbx_symtab (objfile, DBX_TEXT_ADDR (objfile), DBX_TEXT_SIZE (objfile)); /* Add the dynamic symbols. */ - read_dbx_dynamic_symtab (section_offsets, objfile); + read_dbx_dynamic_symtab (objfile); /* Install any minimal symbols that have been collected as the current minimal symbols for this objfile. */ @@ -1103,8 +1100,7 @@ free_bincl_list (objfile) add them to the minimal symbol table. */ static void -read_dbx_dynamic_symtab (section_offsets, objfile) - struct section_offsets *section_offsets; +read_dbx_dynamic_symtab (objfile) struct objfile *objfile; { bfd *abfd = objfile->obfd; @@ -1163,17 +1159,17 @@ read_dbx_dynamic_symtab (section_offsets, objfile) if (bfd_get_section_flags (abfd, sec) & SEC_CODE) { - sym_value += ANOFFSET (section_offsets, SECT_OFF_TEXT); + sym_value += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); type = N_TEXT; } else if (bfd_get_section_flags (abfd, sec) & SEC_DATA) { - sym_value += ANOFFSET (section_offsets, SECT_OFF_DATA); + sym_value += ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); type = N_DATA; } else if (bfd_get_section_flags (abfd, sec) & SEC_ALLOC) { - sym_value += ANOFFSET (section_offsets, SECT_OFF_BSS); + sym_value += ANOFFSET (objfile->section_offsets, SECT_OFF_BSS); type = N_BSS; } else @@ -1214,7 +1210,7 @@ read_dbx_dynamic_symtab (section_offsets, objfile) { arelent *rel = *relptr; CORE_ADDR address = - rel->address + ANOFFSET (section_offsets, SECT_OFF_DATA); + rel->address + ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); switch (bfd_get_arch (abfd)) { @@ -1251,8 +1247,7 @@ read_dbx_dynamic_symtab (section_offsets, objfile) of the file (a set of zeros if the mainline program). */ static void -read_dbx_symtab (section_offsets, objfile, text_addr, text_size) - struct section_offsets *section_offsets; +read_dbx_symtab (objfile, text_addr, text_size) struct objfile *objfile; CORE_ADDR text_addr; int text_size; @@ -1307,7 +1302,7 @@ read_dbx_symtab (section_offsets, objfile, text_addr, text_size) last_source_file = NULL; - lowest_text_address = (CORE_ADDR) - 1; + lowest_text_address = (CORE_ADDR) -1; symfile_bfd = objfile->obfd; /* For next_text_symbol */ abfd = objfile->obfd; @@ -1389,8 +1384,8 @@ read_dbx_symtab (section_offsets, objfile, text_addr, text_size) { /* Don't set pst->texthigh lower than it already is. */ CORE_ADDR text_end = - (lowest_text_address == (CORE_ADDR) - 1 - ? (text_addr + section_offsets->offsets[SECT_OFF_TEXT]) + (lowest_text_address == (CORE_ADDR) -1 + ? (text_addr + objfile->section_offsets->offsets[SECT_OFF_TEXT]) : lowest_text_address) + text_size; @@ -2525,11 +2520,10 @@ process_one_symbol (type, desc, valu, name, section_offsets, objfile) adjusted for coff details. */ void -coffstab_build_psymtabs (objfile, section_offsets, mainline, +coffstab_build_psymtabs (objfile, mainline, textaddr, textsize, stabsects, stabstroffset, stabstrsize) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; CORE_ADDR textaddr; unsigned int textsize; @@ -2603,7 +2597,7 @@ coffstab_build_psymtabs (objfile, section_offsets, mainline, symbuf_read = 0; } - dbx_symfile_read (objfile, section_offsets, 0); + dbx_symfile_read (objfile, 0); } /* Scan and build partial symbols for an ELF symbol file. @@ -2627,11 +2621,10 @@ coffstab_build_psymtabs (objfile, section_offsets, mainline, adjusted for elf details. */ void -elfstab_build_psymtabs (objfile, section_offsets, mainline, +elfstab_build_psymtabs (objfile, mainline, staboffset, stabsize, stabstroffset, stabstrsize) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; file_ptr staboffset; unsigned int stabsize; @@ -2684,7 +2677,7 @@ elfstab_build_psymtabs (objfile, section_offsets, mainline, /* In an elf file, we've already installed the minimal symbols that came from the elf (non-stab) symbol table, so always act like an incremental load here. */ - dbx_symfile_read (objfile, section_offsets, 0); + dbx_symfile_read (objfile, 0); } /* Scan and build partial symbols for a file with special sections for stabs @@ -2705,10 +2698,9 @@ elfstab_build_psymtabs (objfile, section_offsets, mainline, This routine is mostly copied from dbx_symfile_init and dbx_symfile_read. */ void -stabsect_build_psymtabs (objfile, section_offsets, mainline, stab_name, +stabsect_build_psymtabs (objfile, mainline, stab_name, stabstr_name, text_name) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; char *stab_name; char *stabstr_name; @@ -2773,7 +2765,7 @@ stabsect_build_psymtabs (objfile, section_offsets, mainline, stab_name, /* Now, do an incremental load */ processing_acc_compilation = 1; - dbx_symfile_read (objfile, section_offsets, 0); + dbx_symfile_read (objfile, 0); } static struct sym_fns aout_sym_fns = @@ -2783,8 +2775,7 @@ static struct sym_fns aout_sym_fns = dbx_symfile_init, /* sym_init: read initial info, setup for sym_read() */ dbx_symfile_read, /* sym_read: read a symbol file into symtab */ dbx_symfile_finish, /* sym_finish: finished with file, cleanup */ - default_symfile_offsets, - /* sym_offsets: parse user's offsets to internal form */ + default_symfile_offsets, /* sym_offsets: parse user's offsets to internal form */ NULL /* next: pointer to next struct sym_fns */ }; diff --git a/gdb/defs.h b/gdb/defs.h index 0bfb61266d1..c596ed99e5a 100644 --- a/gdb/defs.h +++ b/gdb/defs.h @@ -48,11 +48,7 @@ #include "ansidecl.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif +#include <stdarg.h> /* for va_list */ #include "libiberty.h" @@ -226,7 +222,7 @@ struct cleanup #endif #ifndef ATTR_FORMAT -# if defined(__GNUC__) && __GNUC__ >= 2 && __GNUC_MINOR__ >= 4 && defined (__ANSI_PROTOTYPES) +# if defined(__GNUC__) && __GNUC__ >= 2 && __GNUC_MINOR__ >= 4 # define ATTR_FORMAT(type, x, y) __attribute__ ((format(type, x, y))) # else # define ATTR_FORMAT(type, x, y) /* nothing */ @@ -823,7 +819,7 @@ extern NORETURN void error PARAMS((const char *, ...)) ATTR_NORETURN; extern void error_begin PARAMS ((void)); -extern NORETURN void fatal PARAMS((char *, ...)) ATTR_NORETURN; +extern NORETURN void internal_error (char *, ...) ATTR_NORETURN; extern NORETURN void nomem PARAMS ((long)) ATTR_NORETURN; @@ -1159,6 +1155,7 @@ extern void (*readline_begin_hook) PARAMS ((char *, ...)); extern char * (*readline_hook) PARAMS ((char *)); extern void (*readline_end_hook) PARAMS ((void)); extern void (*register_changed_hook) PARAMS ((int regno)); +extern void (*disassembly_flavor_hook) PARAMS((char *args, int from_tty)); extern void (*memory_changed_hook) PARAMS ((CORE_ADDR addr, int len)); extern void (*context_hook) PARAMS ((int)); extern int (*target_wait_hook) PARAMS ((int pid, @@ -1167,6 +1164,8 @@ extern int (*target_wait_hook) PARAMS ((int pid, extern void (*call_command_hook) PARAMS ((struct cmd_list_element *c, char *cmd, int from_tty)); +extern void (*set_hook) PARAMS ((struct cmd_list_element *c)); + extern NORETURN void (*error_hook) PARAMS ((void)) ATTR_NORETURN; extern void (*error_begin_hook) PARAMS ((void)); @@ -1229,4 +1228,15 @@ extern int use_windows; #endif #endif +/* Define well known filenos if the system does not define them. */ +#ifndef STDIN_FILENO +#define STDIN_FILENO 0 +#endif +#ifndef STDOUT_FILENO +#define STDOUT_FILENO 1 +#endif +#ifndef STDERR_FILENO +#define STDERR_FILENO 2 +#endif + #endif /* #ifndef DEFS_H */ diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index a6507bd7869..2d0b2ee108d 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,3 +1,16 @@ +1999-08-06 Tom Tromey <tromey@cygnus.com> + + * gdb.texinfo (KOD): New node. + +Fri Aug 6 17:05:48 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.texi (Rcmd): Fix minor formatting typos. + +Thu Aug 5 17:57:41 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.texi (protocol qRcmd): Allow ``OK'' and ``O...'' response + packets. + 1999-07-14 Jim Blandy <jimb@zwingli.cygnus.com> * gdbint.texinfo (PREPARE_TO_PROCEED, ADDR_BITS_REMOVE): Doc diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index fec3571be85..92e4a21b392 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -8325,6 +8325,7 @@ targets}). * Target Commands:: Commands for managing targets * Byte Order:: Choosing target byte order * Remote:: Remote debugging +* KOD:: Kernel Object Display @end menu @@ -8703,7 +8704,7 @@ Note that these commands merely adjust interpretation of symbolic data on the host, and that they have absolutely no effect on the target system. -@node Remote, , Byte Order, Targets +@node Remote, KOD, Byte Order, Targets @section Remote debugging @cindex remote debugging @@ -8742,6 +8743,44 @@ configuration of @value{GDBN}; use @code{help target} to list them. @include remote.texi +@node KOD, , Remote, Targets +@section Kernel Object Display +@cindex kernel object display +@cindex kernel object +@cindex KOD + +Some targets support kernel object display. Using this facility, +@value{GDBN} communicates specially with the underlying operating system +and can display information about operating system-level objects such as +mutexes and other synchronization objects. Exactly which objects can be +displayed is determined on a per-OS basis. + +Use the @code{set os} command to set the operating system. This tells +@value{GDBN} which kernel object display module to initialize: + +@example +(gdb) set os cisco +@end example + +If @code{set os} succeeds, @value{GDBN} will display some information +about the operating system, and will create a new @code{info} command +which can be used to query the target. The @code{info} command is named +after the operating system: + +@example +(gdb) info cisco +List of Cisco Kernel Objects +Object Description +any Any and all objects +@end example + +Further subcommands can be used to query about particular objects known +by the kernel. + +There is currently no way to determine whether a given operating system +is supported other than to try it. + + @node Controlling GDB @chapter Controlling @value{GDBN} diff --git a/gdb/doc/gdbint.texinfo b/gdb/doc/gdbint.texinfo index a94fcc40389..1dfd133d6c0 100644 --- a/gdb/doc/gdbint.texinfo +++ b/gdb/doc/gdbint.texinfo @@ -361,7 +361,7 @@ command), and it can also read more symbols via the ``add-file'' and Symbol files are initially opened by code in @file{symfile.c} using the BFD library. BFD identifies the type of the file by examining its -header. @code{symfile_init} then uses this identification to locate a +header. @code{find_sym_fns} then uses this identification to locate a set of symbol-reading functions. Symbol reading modules identify themselves to GDB by calling diff --git a/gdb/doc/remote.texi b/gdb/doc/remote.texi index 7b3c05760e6..d8636dab954 100644 --- a/gdb/doc/remote.texi +++ b/gdb/doc/remote.texi @@ -770,9 +770,13 @@ See @code{remote.c:remote_unpack_thread_info_response()}. execution. @emph{Implementors should note that providing access to a stubs's interpreter may have security implications}. @item -@tab reply @var{OUTPUT} +@tab reply @var{OUTPUT} or @code{OK} @tab -The @var{OUTPUT} (hex encoded). Must be non-empty. +The @var{OUTPUT} is the hex encoded output from the command. @code{OK} +is returned when the @var{OUTPUT} would have been empty. The target may +also respond with a number of intermediate @code{O}@var{OUTPUT} console +output packets. + @item @tab reply @samp{} @tab diff --git a/gdb/dsrec.c b/gdb/dsrec.c index 9fae3416d00..4cfe83533e7 100644 --- a/gdb/dsrec.c +++ b/gdb/dsrec.c @@ -257,8 +257,8 @@ make_srec (srec, targ_addr, abfd, sect, sectoff, maxrecsize, flags) else if (tmp & SREC_4_BYTE_ADDR) addr_size = 4; else - fatal ("make_srec: Bad address (0x%x), or bad flags (0x%x).", - targ_addr, flags); + internal_error ("make_srec: Bad address (0x%x), or bad flags (0x%x).", + targ_addr, flags); /* Now that we know the address size, we can figure out how much data this record can hold. */ diff --git a/gdb/dstread.c b/gdb/dstread.c index 1561586bf21..8ed415bc6c5 100644 --- a/gdb/dstread.c +++ b/gdb/dstread.c @@ -68,7 +68,7 @@ static void dst_new_init PARAMS ((struct objfile *)); static void -dst_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +dst_symfile_read PARAMS ((struct objfile *, int)); static void dst_symfile_finish PARAMS ((struct objfile *)); @@ -263,9 +263,8 @@ static bfd *symfile_bfd; /* ARGSUSED */ static void -dst_symfile_read (objfile, section_offsets, mainline) +dst_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { bfd *abfd = objfile->obfd; diff --git a/gdb/dwarf2read.c b/gdb/dwarf2read.c index b27ac49161c..6a617b3c6bc 100644 --- a/gdb/dwarf2read.c +++ b/gdb/dwarf2read.c @@ -1003,7 +1003,7 @@ dwarf2_build_psymtabs_hard (objfile, section_offsets, mainline) /* Allocate a new partial symbol table structure */ pst = start_psymtab_common (objfile, section_offsets, - comp_unit_die.name ? comp_unit_die.name : "", + comp_unit_die.name ? comp_unit_die.name : "", comp_unit_die.lowpc, objfile->global_psymbols.next, objfile->static_psymbols.next); diff --git a/gdb/elfread.c b/gdb/elfread.c index f0ad2bed8b2..69e8e77a3f0 100644 --- a/gdb/elfread.c +++ b/gdb/elfread.c @@ -71,7 +71,7 @@ static void elf_new_init PARAMS ((struct objfile *)); static void -elf_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +elf_symfile_read PARAMS ((struct objfile *, int)); static void elf_symfile_finish PARAMS ((struct objfile *)); @@ -584,9 +584,8 @@ elf_symtab_read (abfd, addr, objfile, dynamic) capability even for files compiled without -g. */ static void -elf_symfile_read (objfile, section_offsets, mainline) +elf_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { bfd *abfd = objfile->obfd; @@ -610,7 +609,7 @@ elf_symfile_read (objfile, section_offsets, mainline) which can later be used by elfstab_offset_sections. */ /* FIXME, should take a section_offsets param, not just an offset. */ - offset = ANOFFSET (section_offsets, 0); + offset = ANOFFSET (objfile->section_offsets, 0); elf_symtab_read (abfd, offset, objfile, 0); /* Add the dynamic symbols. */ @@ -653,7 +652,7 @@ elf_symfile_read (objfile, section_offsets, mainline) swap = get_elf_backend_data (abfd)->elf_backend_ecoff_debug_swap; if (swap) elfmdebug_build_psymtabs (objfile, swap, ei.mdebugsect, - section_offsets); + objfile->section_offsets); } if (ei.stabsect) { @@ -666,7 +665,6 @@ elf_symfile_read (objfile, section_offsets, mainline) /* FIXME should probably warn about a stab section without a stabstr. */ if (str_sect) elfstab_build_psymtabs (objfile, - section_offsets, mainline, ei.stabsect->filepos, bfd_section_size (abfd, ei.stabsect), @@ -676,13 +674,13 @@ elf_symfile_read (objfile, section_offsets, mainline) if (dwarf2_has_info (abfd)) { /* DWARF 2 sections */ - dwarf2_build_psymtabs (objfile, section_offsets, mainline); + dwarf2_build_psymtabs (objfile, objfile->section_offsets, mainline); } else if (ei.dboffset && ei.lnoffset) { /* DWARF sections */ dwarf_build_psymtabs (objfile, - section_offsets, mainline, + objfile->section_offsets, mainline, ei.dboffset, ei.dbsize, ei.lnoffset, ei.lnsize); } @@ -818,10 +816,7 @@ elfstab_offset_sections (objfile, pst) /* Found it! Allocate a new psymtab struct, and fill it in. */ maybe->found++; pst->section_offsets = (struct section_offsets *) - obstack_alloc (&objfile->psymbol_obstack, - sizeof (struct section_offsets) + - sizeof (pst->section_offsets->offsets) * (SECT_OFF_MAX - 1)); - + obstack_alloc (&objfile->psymbol_obstack, SIZEOF_SECTION_OFFSETS); for (i = 0; i < SECT_OFF_MAX; i++) ANOFFSET (pst->section_offsets, i) = maybe->sections[i]; return; @@ -841,8 +836,7 @@ static struct sym_fns elf_sym_fns = elf_symfile_init, /* sym_init: read initial info, setup for sym_read() */ elf_symfile_read, /* sym_read: read a symbol file into symtab */ elf_symfile_finish, /* sym_finish: finished with file, cleanup */ - default_symfile_offsets, - /* sym_offsets: Translate ext. to int. relocation */ + default_symfile_offsets, /* sym_offsets: Translate ext. to int. relocation */ NULL /* next: pointer to next struct sym_fns */ }; diff --git a/gdb/f-lang.c b/gdb/f-lang.c index 6e67fbce9d9..1a7bfa33c2c 100644 --- a/gdb/f-lang.c +++ b/gdb/f-lang.c @@ -920,7 +920,7 @@ get_bf_for_fcn (the_function) item at the head of the queue is the one you want) */ if (saved_bf_list == NULL) - fatal ("cannot get .bf node off empty list"); + internal_error ("cannot get .bf node off empty list"); if (current_head_bf_list != NULL) if (current_head_bf_list->symnum_fcn == the_function) diff --git a/gdb/findvar.c b/gdb/findvar.c index 489761fa282..df8475f8407 100644 --- a/gdb/findvar.c +++ b/gdb/findvar.c @@ -606,9 +606,11 @@ value_of_register (regnum) memcpy (VALUE_CONTENTS_RAW (reg_val), raw_buffer, REGISTER_RAW_SIZE (regnum)); else - fatal ("Register \"%s\" (%d) has conflicting raw (%d) and virtual (%d) size", - REGISTER_NAME (regnum), regnum, - REGISTER_RAW_SIZE (regnum), REGISTER_VIRTUAL_SIZE (regnum)); + internal_error ("Register \"%s\" (%d) has conflicting raw (%d) and virtual (%d) size", + REGISTER_NAME (regnum), + regnum, + REGISTER_RAW_SIZE (regnum), + REGISTER_VIRTUAL_SIZE (regnum)); VALUE_LVAL (reg_val) = lval; VALUE_ADDRESS (reg_val) = addr; VALUE_REGNO (reg_val) = regnum; @@ -1025,7 +1027,7 @@ generic_target_read_pc (pid) return pc_val; } #endif - fatal ("generic_target_read_pc"); + internal_error ("generic_target_read_pc"); return 0; } @@ -1073,7 +1075,7 @@ generic_target_write_pc (pc, pid) #endif #endif #else - fatal ("generic_target_write_pc"); + internal_error ("generic_target_write_pc"); #endif } @@ -1113,7 +1115,7 @@ generic_target_read_sp () if (SP_REGNUM >= 0) return read_register (SP_REGNUM); #endif - fatal ("generic_target_read_sp"); + internal_error ("generic_target_read_sp"); } CORE_ADDR @@ -1137,7 +1139,7 @@ generic_target_write_sp (val) return; } #endif - fatal ("generic_target_write_sp"); + internal_error ("generic_target_write_sp"); } void @@ -1158,7 +1160,7 @@ generic_target_read_fp () if (FP_REGNUM >= 0) return read_register (FP_REGNUM); #endif - fatal ("generic_target_read_fp"); + internal_error ("generic_target_read_fp"); } CORE_ADDR @@ -1182,7 +1184,7 @@ generic_target_write_fp (val) return; } #endif - fatal ("generic_target_write_fp"); + internal_error ("generic_target_write_fp"); } void @@ -1609,7 +1611,7 @@ value_from_register (type, regnum, frame) VALUE_ADDRESS (v) = first_addr; } else - fatal ("value_from_register: Value not stored anywhere!"); + internal_error ("value_from_register: Value not stored anywhere!"); VALUE_OPTIMIZED_OUT (v) = optim; diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index 65d76f8d86e..b102c69f670 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -1,22 +1,24 @@ -/* *INDENT-OFF* */ /* typedef (f)();'' confuses indent */ /* Dynamic architecture support for GDB, the GNU debugger. Copyright 1998-1999, Free Software Foundation, Inc. -This file is part of GDB. + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* *INDENT-OFF* */ /* typedef (f)();'' confuses indent */ #include "defs.h" @@ -336,235 +338,235 @@ verify_gdbarch (gdbarch) return; /* fundamental */ if (gdbarch->byte_order == 0) - fatal ("verify_gdbarch: byte-order unset"); + internal_error ("verify_gdbarch: byte-order unset"); if (gdbarch->bfd_arch_info == NULL) - fatal ("verify_gdbarch: bfd_arch_info unset"); + internal_error ("verify_gdbarch: bfd_arch_info unset"); /* Check those that need to be defined for the given multi-arch level. */ if ((GDB_MULTI_ARCH >= 1) && (gdbarch->ptr_bit == 0)) - fatal ("gdbarch: verify_gdbarch: ptr_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: ptr_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->short_bit == 0)) - fatal ("gdbarch: verify_gdbarch: short_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: short_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->int_bit == 0)) - fatal ("gdbarch: verify_gdbarch: int_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: int_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->long_bit == 0)) - fatal ("gdbarch: verify_gdbarch: long_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: long_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->long_long_bit == 0)) - fatal ("gdbarch: verify_gdbarch: long_long_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: long_long_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->float_bit == 0)) - fatal ("gdbarch: verify_gdbarch: float_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: float_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->double_bit == 0)) - fatal ("gdbarch: verify_gdbarch: double_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: double_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->long_double_bit == 0)) - fatal ("gdbarch: verify_gdbarch: long_double_bit invalid"); + internal_error ("gdbarch: verify_gdbarch: long_double_bit invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->read_pc == 0)) - fatal ("gdbarch: verify_gdbarch: read_pc invalid"); + internal_error ("gdbarch: verify_gdbarch: read_pc invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->write_pc == 0)) - fatal ("gdbarch: verify_gdbarch: write_pc invalid"); + internal_error ("gdbarch: verify_gdbarch: write_pc invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->read_fp == 0)) - fatal ("gdbarch: verify_gdbarch: read_fp invalid"); + internal_error ("gdbarch: verify_gdbarch: read_fp invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->write_fp == 0)) - fatal ("gdbarch: verify_gdbarch: write_fp invalid"); + internal_error ("gdbarch: verify_gdbarch: write_fp invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->read_sp == 0)) - fatal ("gdbarch: verify_gdbarch: read_sp invalid"); + internal_error ("gdbarch: verify_gdbarch: read_sp invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->write_sp == 0)) - fatal ("gdbarch: verify_gdbarch: write_sp invalid"); + internal_error ("gdbarch: verify_gdbarch: write_sp invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->num_regs == -1)) - fatal ("gdbarch: verify_gdbarch: num_regs invalid"); + internal_error ("gdbarch: verify_gdbarch: num_regs invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->sp_regnum == -1)) - fatal ("gdbarch: verify_gdbarch: sp_regnum invalid"); + internal_error ("gdbarch: verify_gdbarch: sp_regnum invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->fp_regnum == -1)) - fatal ("gdbarch: verify_gdbarch: fp_regnum invalid"); + internal_error ("gdbarch: verify_gdbarch: fp_regnum invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->pc_regnum == -1)) - fatal ("gdbarch: verify_gdbarch: pc_regnum invalid"); + internal_error ("gdbarch: verify_gdbarch: pc_regnum invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_name == 0)) - fatal ("gdbarch: verify_gdbarch: register_name invalid"); + internal_error ("gdbarch: verify_gdbarch: register_name invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_size == -1)) - fatal ("gdbarch: verify_gdbarch: register_size invalid"); + internal_error ("gdbarch: verify_gdbarch: register_size invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_bytes == -1)) - fatal ("gdbarch: verify_gdbarch: register_bytes invalid"); + internal_error ("gdbarch: verify_gdbarch: register_bytes invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_byte == 0)) - fatal ("gdbarch: verify_gdbarch: register_byte invalid"); + internal_error ("gdbarch: verify_gdbarch: register_byte invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_raw_size == 0)) - fatal ("gdbarch: verify_gdbarch: register_raw_size invalid"); + internal_error ("gdbarch: verify_gdbarch: register_raw_size invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->max_register_raw_size == -1)) - fatal ("gdbarch: verify_gdbarch: max_register_raw_size invalid"); + internal_error ("gdbarch: verify_gdbarch: max_register_raw_size invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_virtual_size == 0)) - fatal ("gdbarch: verify_gdbarch: register_virtual_size invalid"); + internal_error ("gdbarch: verify_gdbarch: register_virtual_size invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->max_register_virtual_size == -1)) - fatal ("gdbarch: verify_gdbarch: max_register_virtual_size invalid"); + internal_error ("gdbarch: verify_gdbarch: max_register_virtual_size invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_virtual_type == 0)) - fatal ("gdbarch: verify_gdbarch: register_virtual_type invalid"); + internal_error ("gdbarch: verify_gdbarch: register_virtual_type invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->use_generic_dummy_frames == -1)) - fatal ("gdbarch: verify_gdbarch: use_generic_dummy_frames invalid"); + internal_error ("gdbarch: verify_gdbarch: use_generic_dummy_frames invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_location == 0)) - fatal ("gdbarch: verify_gdbarch: call_dummy_location invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_location invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_location == AT_ENTRY_POINT && gdbarch->call_dummy_address == 0)) - fatal ("gdbarch: verify_gdbarch: call_dummy_address invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_start_offset == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_start_offset invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_start_offset invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_breakpoint_offset == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_breakpoint_offset invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_breakpoint_offset invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->call_dummy_breakpoint_offset_p == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_breakpoint_offset_p invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_breakpoint_offset_p invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_length == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_length invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_length invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->pc_in_call_dummy == 0)) - fatal ("gdbarch: verify_gdbarch: pc_in_call_dummy invalid"); + internal_error ("gdbarch: verify_gdbarch: pc_in_call_dummy invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->call_dummy_p == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_p invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_p invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->call_dummy_stack_adjust_p == -1)) - fatal ("gdbarch: verify_gdbarch: call_dummy_stack_adjust_p invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_stack_adjust_p invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->call_dummy_stack_adjust_p && gdbarch->call_dummy_stack_adjust == 0)) - fatal ("gdbarch: verify_gdbarch: call_dummy_stack_adjust invalid"); + internal_error ("gdbarch: verify_gdbarch: call_dummy_stack_adjust invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->fix_call_dummy == 0)) - fatal ("gdbarch: verify_gdbarch: fix_call_dummy invalid"); + internal_error ("gdbarch: verify_gdbarch: fix_call_dummy invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->get_saved_register == 0)) - fatal ("gdbarch: verify_gdbarch: get_saved_register invalid"); + internal_error ("gdbarch: verify_gdbarch: get_saved_register invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->register_convertible == 0)) - fatal ("gdbarch: verify_gdbarch: register_convertible invalid"); + internal_error ("gdbarch: verify_gdbarch: register_convertible invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_convert_to_virtual == 0)) - fatal ("gdbarch: verify_gdbarch: register_convert_to_virtual invalid"); + internal_error ("gdbarch: verify_gdbarch: register_convert_to_virtual invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->register_convert_to_raw == 0)) - fatal ("gdbarch: verify_gdbarch: register_convert_to_raw invalid"); + internal_error ("gdbarch: verify_gdbarch: register_convert_to_raw invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->extract_return_value == 0)) - fatal ("gdbarch: verify_gdbarch: extract_return_value invalid"); + internal_error ("gdbarch: verify_gdbarch: extract_return_value invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->push_arguments == 0)) - fatal ("gdbarch: verify_gdbarch: push_arguments invalid"); + internal_error ("gdbarch: verify_gdbarch: push_arguments invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->push_dummy_frame == 0)) - fatal ("gdbarch: verify_gdbarch: push_dummy_frame invalid"); + internal_error ("gdbarch: verify_gdbarch: push_dummy_frame invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->push_return_address == 0)) - fatal ("gdbarch: verify_gdbarch: push_return_address invalid"); + internal_error ("gdbarch: verify_gdbarch: push_return_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->pop_frame == 0)) - fatal ("gdbarch: verify_gdbarch: pop_frame invalid"); + internal_error ("gdbarch: verify_gdbarch: pop_frame invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_make_daddr == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_make_daddr invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_make_daddr invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_make_iaddr == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_make_iaddr invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_make_iaddr invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_daddr_p == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_daddr_p invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_daddr_p invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_iaddr_p == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_iaddr_p invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_iaddr_p invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_convert_daddr_to_raw == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_convert_daddr_to_raw invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_convert_daddr_to_raw invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->d10v_convert_iaddr_to_raw == 0)) - fatal ("gdbarch: verify_gdbarch: d10v_convert_iaddr_to_raw invalid"); + internal_error ("gdbarch: verify_gdbarch: d10v_convert_iaddr_to_raw invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->store_struct_return == 0)) - fatal ("gdbarch: verify_gdbarch: store_struct_return invalid"); + internal_error ("gdbarch: verify_gdbarch: store_struct_return invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->store_return_value == 0)) - fatal ("gdbarch: verify_gdbarch: store_return_value invalid"); + internal_error ("gdbarch: verify_gdbarch: store_return_value invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->extract_struct_value_address == 0)) - fatal ("gdbarch: verify_gdbarch: extract_struct_value_address invalid"); + internal_error ("gdbarch: verify_gdbarch: extract_struct_value_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->use_struct_convention == 0)) - fatal ("gdbarch: verify_gdbarch: use_struct_convention invalid"); + internal_error ("gdbarch: verify_gdbarch: use_struct_convention invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_init_saved_regs == 0)) - fatal ("gdbarch: verify_gdbarch: frame_init_saved_regs invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_init_saved_regs invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->init_extra_frame_info == 0)) - fatal ("gdbarch: verify_gdbarch: init_extra_frame_info invalid"); + internal_error ("gdbarch: verify_gdbarch: init_extra_frame_info invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->skip_prologue == 0)) - fatal ("gdbarch: verify_gdbarch: skip_prologue invalid"); + internal_error ("gdbarch: verify_gdbarch: skip_prologue invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->inner_than == 0)) - fatal ("gdbarch: verify_gdbarch: inner_than invalid"); + internal_error ("gdbarch: verify_gdbarch: inner_than invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->breakpoint_from_pc == 0)) - fatal ("gdbarch: verify_gdbarch: breakpoint_from_pc invalid"); + internal_error ("gdbarch: verify_gdbarch: breakpoint_from_pc invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->decr_pc_after_break == -1)) - fatal ("gdbarch: verify_gdbarch: decr_pc_after_break invalid"); + internal_error ("gdbarch: verify_gdbarch: decr_pc_after_break invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->function_start_offset == -1)) - fatal ("gdbarch: verify_gdbarch: function_start_offset invalid"); + internal_error ("gdbarch: verify_gdbarch: function_start_offset invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->remote_translate_xfer_address == 0)) - fatal ("gdbarch: verify_gdbarch: remote_translate_xfer_address invalid"); + internal_error ("gdbarch: verify_gdbarch: remote_translate_xfer_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_args_skip == -1)) - fatal ("gdbarch: verify_gdbarch: frame_args_skip invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_args_skip invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frameless_function_invocation == 0)) - fatal ("gdbarch: verify_gdbarch: frameless_function_invocation invalid"); + internal_error ("gdbarch: verify_gdbarch: frameless_function_invocation invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_chain == 0)) - fatal ("gdbarch: verify_gdbarch: frame_chain invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_chain invalid"); if ((GDB_MULTI_ARCH >= 1) && (gdbarch->frame_chain_valid == 0)) - fatal ("gdbarch: verify_gdbarch: frame_chain_valid invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_chain_valid invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_saved_pc == 0)) - fatal ("gdbarch: verify_gdbarch: frame_saved_pc invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_saved_pc invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_args_address == 0)) - fatal ("gdbarch: verify_gdbarch: frame_args_address invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_args_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_locals_address == 0)) - fatal ("gdbarch: verify_gdbarch: frame_locals_address invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_locals_address invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->saved_pc_after_call == 0)) - fatal ("gdbarch: verify_gdbarch: saved_pc_after_call invalid"); + internal_error ("gdbarch: verify_gdbarch: saved_pc_after_call invalid"); if ((GDB_MULTI_ARCH >= 2) && (gdbarch->frame_num_args == 0)) - fatal ("gdbarch: verify_gdbarch: frame_num_args invalid"); + internal_error ("gdbarch: verify_gdbarch: frame_num_args invalid"); } @@ -908,7 +910,7 @@ gdbarch_ptr_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->ptr_bit == 0) - fatal ("gdbarch: gdbarch_ptr_bit invalid"); + internal_error ("gdbarch: gdbarch_ptr_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_ptr_bit called\n"); @@ -928,7 +930,7 @@ gdbarch_short_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->short_bit == 0) - fatal ("gdbarch: gdbarch_short_bit invalid"); + internal_error ("gdbarch: gdbarch_short_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_short_bit called\n"); @@ -948,7 +950,7 @@ gdbarch_int_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->int_bit == 0) - fatal ("gdbarch: gdbarch_int_bit invalid"); + internal_error ("gdbarch: gdbarch_int_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_int_bit called\n"); @@ -968,7 +970,7 @@ gdbarch_long_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->long_bit == 0) - fatal ("gdbarch: gdbarch_long_bit invalid"); + internal_error ("gdbarch: gdbarch_long_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_long_bit called\n"); @@ -988,7 +990,7 @@ gdbarch_long_long_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->long_long_bit == 0) - fatal ("gdbarch: gdbarch_long_long_bit invalid"); + internal_error ("gdbarch: gdbarch_long_long_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_long_long_bit called\n"); @@ -1008,7 +1010,7 @@ gdbarch_float_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->float_bit == 0) - fatal ("gdbarch: gdbarch_float_bit invalid"); + internal_error ("gdbarch: gdbarch_float_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_float_bit called\n"); @@ -1028,7 +1030,7 @@ gdbarch_double_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->double_bit == 0) - fatal ("gdbarch: gdbarch_double_bit invalid"); + internal_error ("gdbarch: gdbarch_double_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_double_bit called\n"); @@ -1048,7 +1050,7 @@ gdbarch_long_double_bit (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->long_double_bit == 0) - fatal ("gdbarch: gdbarch_long_double_bit invalid"); + internal_error ("gdbarch: gdbarch_long_double_bit invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_long_double_bit called\n"); @@ -1067,7 +1069,7 @@ CORE_ADDR gdbarch_read_pc (struct gdbarch *gdbarch, int pid) { if (gdbarch->read_pc == 0) - fatal ("gdbarch: gdbarch_read_pc invalid"); + internal_error ("gdbarch: gdbarch_read_pc invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_read_pc called\n"); @@ -1086,7 +1088,7 @@ void gdbarch_write_pc (struct gdbarch *gdbarch, CORE_ADDR val, int pid) { if (gdbarch->write_pc == 0) - fatal ("gdbarch: gdbarch_write_pc invalid"); + internal_error ("gdbarch: gdbarch_write_pc invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_write_pc called\n"); @@ -1105,7 +1107,7 @@ CORE_ADDR gdbarch_read_fp (struct gdbarch *gdbarch) { if (gdbarch->read_fp == 0) - fatal ("gdbarch: gdbarch_read_fp invalid"); + internal_error ("gdbarch: gdbarch_read_fp invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_read_fp called\n"); @@ -1124,7 +1126,7 @@ void gdbarch_write_fp (struct gdbarch *gdbarch, CORE_ADDR val) { if (gdbarch->write_fp == 0) - fatal ("gdbarch: gdbarch_write_fp invalid"); + internal_error ("gdbarch: gdbarch_write_fp invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_write_fp called\n"); @@ -1143,7 +1145,7 @@ CORE_ADDR gdbarch_read_sp (struct gdbarch *gdbarch) { if (gdbarch->read_sp == 0) - fatal ("gdbarch: gdbarch_read_sp invalid"); + internal_error ("gdbarch: gdbarch_read_sp invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_read_sp called\n"); @@ -1162,7 +1164,7 @@ void gdbarch_write_sp (struct gdbarch *gdbarch, CORE_ADDR val) { if (gdbarch->write_sp == 0) - fatal ("gdbarch: gdbarch_write_sp invalid"); + internal_error ("gdbarch: gdbarch_write_sp invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_write_sp called\n"); @@ -1182,7 +1184,7 @@ gdbarch_num_regs (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->num_regs == -1) - fatal ("gdbarch: gdbarch_num_regs invalid"); + internal_error ("gdbarch: gdbarch_num_regs invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_num_regs called\n"); @@ -1202,7 +1204,7 @@ gdbarch_sp_regnum (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->sp_regnum == -1) - fatal ("gdbarch: gdbarch_sp_regnum invalid"); + internal_error ("gdbarch: gdbarch_sp_regnum invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_sp_regnum called\n"); @@ -1222,7 +1224,7 @@ gdbarch_fp_regnum (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->fp_regnum == -1) - fatal ("gdbarch: gdbarch_fp_regnum invalid"); + internal_error ("gdbarch: gdbarch_fp_regnum invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_fp_regnum called\n"); @@ -1242,7 +1244,7 @@ gdbarch_pc_regnum (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->pc_regnum == -1) - fatal ("gdbarch: gdbarch_pc_regnum invalid"); + internal_error ("gdbarch: gdbarch_pc_regnum invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_pc_regnum called\n"); @@ -1260,8 +1262,8 @@ set_gdbarch_pc_regnum (gdbarch, pc_regnum) char * gdbarch_register_name (struct gdbarch *gdbarch, int regnr) { - if (gdbarch->register_name == 0) - fatal ("gdbarch: gdbarch_register_name invalid"); + if (gdbarch->register_name == 0 || 1) + internal_error ("gdbarch: gdbarch_register_name invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_name called\n"); @@ -1281,7 +1283,7 @@ gdbarch_register_size (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->register_size == -1) - fatal ("gdbarch: gdbarch_register_size invalid"); + internal_error ("gdbarch: gdbarch_register_size invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_size called\n"); @@ -1301,7 +1303,7 @@ gdbarch_register_bytes (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->register_bytes == -1) - fatal ("gdbarch: gdbarch_register_bytes invalid"); + internal_error ("gdbarch: gdbarch_register_bytes invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_bytes called\n"); @@ -1320,7 +1322,7 @@ int gdbarch_register_byte (struct gdbarch *gdbarch, int reg_nr) { if (gdbarch->register_byte == 0) - fatal ("gdbarch: gdbarch_register_byte invalid"); + internal_error ("gdbarch: gdbarch_register_byte invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_byte called\n"); @@ -1339,7 +1341,7 @@ int gdbarch_register_raw_size (struct gdbarch *gdbarch, int reg_nr) { if (gdbarch->register_raw_size == 0) - fatal ("gdbarch: gdbarch_register_raw_size invalid"); + internal_error ("gdbarch: gdbarch_register_raw_size invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_raw_size called\n"); @@ -1359,7 +1361,7 @@ gdbarch_max_register_raw_size (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->max_register_raw_size == -1) - fatal ("gdbarch: gdbarch_max_register_raw_size invalid"); + internal_error ("gdbarch: gdbarch_max_register_raw_size invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_max_register_raw_size called\n"); @@ -1378,7 +1380,7 @@ int gdbarch_register_virtual_size (struct gdbarch *gdbarch, int reg_nr) { if (gdbarch->register_virtual_size == 0) - fatal ("gdbarch: gdbarch_register_virtual_size invalid"); + internal_error ("gdbarch: gdbarch_register_virtual_size invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_virtual_size called\n"); @@ -1398,7 +1400,7 @@ gdbarch_max_register_virtual_size (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->max_register_virtual_size == -1) - fatal ("gdbarch: gdbarch_max_register_virtual_size invalid"); + internal_error ("gdbarch: gdbarch_max_register_virtual_size invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_max_register_virtual_size called\n"); @@ -1417,7 +1419,7 @@ struct type * gdbarch_register_virtual_type (struct gdbarch *gdbarch, int reg_nr) { if (gdbarch->register_virtual_type == 0) - fatal ("gdbarch: gdbarch_register_virtual_type invalid"); + internal_error ("gdbarch: gdbarch_register_virtual_type invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_virtual_type called\n"); @@ -1437,7 +1439,7 @@ gdbarch_use_generic_dummy_frames (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->use_generic_dummy_frames == -1) - fatal ("gdbarch: gdbarch_use_generic_dummy_frames invalid"); + internal_error ("gdbarch: gdbarch_use_generic_dummy_frames invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_use_generic_dummy_frames called\n"); @@ -1457,7 +1459,7 @@ gdbarch_call_dummy_location (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_location == 0) - fatal ("gdbarch: gdbarch_call_dummy_location invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_location invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_location called\n"); @@ -1476,7 +1478,7 @@ CORE_ADDR gdbarch_call_dummy_address (struct gdbarch *gdbarch) { if (gdbarch->call_dummy_address == 0) - fatal ("gdbarch: gdbarch_call_dummy_address invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_address called\n"); @@ -1496,7 +1498,7 @@ gdbarch_call_dummy_start_offset (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_start_offset == -1) - fatal ("gdbarch: gdbarch_call_dummy_start_offset invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_start_offset invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_start_offset called\n"); @@ -1516,7 +1518,7 @@ gdbarch_call_dummy_breakpoint_offset (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_breakpoint_offset == -1) - fatal ("gdbarch: gdbarch_call_dummy_breakpoint_offset invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_breakpoint_offset invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_breakpoint_offset called\n"); @@ -1536,7 +1538,7 @@ gdbarch_call_dummy_breakpoint_offset_p (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_breakpoint_offset_p == -1) - fatal ("gdbarch: gdbarch_call_dummy_breakpoint_offset_p invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_breakpoint_offset_p invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_breakpoint_offset_p called\n"); @@ -1556,7 +1558,7 @@ gdbarch_call_dummy_length (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_length == -1) - fatal ("gdbarch: gdbarch_call_dummy_length invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_length invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_length called\n"); @@ -1575,7 +1577,7 @@ int gdbarch_pc_in_call_dummy (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR frame_address) { if (gdbarch->pc_in_call_dummy == 0) - fatal ("gdbarch: gdbarch_pc_in_call_dummy invalid"); + internal_error ("gdbarch: gdbarch_pc_in_call_dummy invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_pc_in_call_dummy called\n"); @@ -1595,7 +1597,7 @@ gdbarch_call_dummy_p (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_p == -1) - fatal ("gdbarch: gdbarch_call_dummy_p invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_p invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_p called\n"); @@ -1651,7 +1653,7 @@ gdbarch_call_dummy_stack_adjust_p (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_stack_adjust_p == -1) - fatal ("gdbarch: gdbarch_call_dummy_stack_adjust_p invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_stack_adjust_p invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_stack_adjust_p called\n"); @@ -1671,7 +1673,7 @@ gdbarch_call_dummy_stack_adjust (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->call_dummy_stack_adjust_p && gdbarch->call_dummy_stack_adjust == 0) - fatal ("gdbarch: gdbarch_call_dummy_stack_adjust invalid"); + internal_error ("gdbarch: gdbarch_call_dummy_stack_adjust invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_call_dummy_stack_adjust called\n"); @@ -1690,7 +1692,7 @@ void gdbarch_fix_call_dummy (struct gdbarch *gdbarch, char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs, struct value **args, struct type *type, int gcc_p) { if (gdbarch->fix_call_dummy == 0) - fatal ("gdbarch: gdbarch_fix_call_dummy invalid"); + internal_error ("gdbarch: gdbarch_fix_call_dummy invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_fix_call_dummy called\n"); @@ -1745,7 +1747,7 @@ void gdbarch_get_saved_register (struct gdbarch *gdbarch, char *raw_buffer, int *optimized, CORE_ADDR *addrp, struct frame_info *frame, int regnum, enum lval_type *lval) { if (gdbarch->get_saved_register == 0) - fatal ("gdbarch: gdbarch_get_saved_register invalid"); + internal_error ("gdbarch: gdbarch_get_saved_register invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_get_saved_register called\n"); @@ -1764,7 +1766,7 @@ int gdbarch_register_convertible (struct gdbarch *gdbarch, int nr) { if (gdbarch->register_convertible == 0) - fatal ("gdbarch: gdbarch_register_convertible invalid"); + internal_error ("gdbarch: gdbarch_register_convertible invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_convertible called\n"); @@ -1783,7 +1785,7 @@ void gdbarch_register_convert_to_virtual (struct gdbarch *gdbarch, int regnum, struct type *type, char *from, char *to) { if (gdbarch->register_convert_to_virtual == 0) - fatal ("gdbarch: gdbarch_register_convert_to_virtual invalid"); + internal_error ("gdbarch: gdbarch_register_convert_to_virtual invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_convert_to_virtual called\n"); @@ -1802,7 +1804,7 @@ void gdbarch_register_convert_to_raw (struct gdbarch *gdbarch, struct type *type, int regnum, char *from, char *to) { if (gdbarch->register_convert_to_raw == 0) - fatal ("gdbarch: gdbarch_register_convert_to_raw invalid"); + internal_error ("gdbarch: gdbarch_register_convert_to_raw invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_register_convert_to_raw called\n"); @@ -1821,7 +1823,7 @@ void gdbarch_extract_return_value (struct gdbarch *gdbarch, struct type *type, char *regbuf, char *valbuf) { if (gdbarch->extract_return_value == 0) - fatal ("gdbarch: gdbarch_extract_return_value invalid"); + internal_error ("gdbarch: gdbarch_extract_return_value invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_extract_return_value called\n"); @@ -1840,7 +1842,7 @@ CORE_ADDR gdbarch_push_arguments (struct gdbarch *gdbarch, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { if (gdbarch->push_arguments == 0) - fatal ("gdbarch: gdbarch_push_arguments invalid"); + internal_error ("gdbarch: gdbarch_push_arguments invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_push_arguments called\n"); @@ -1859,7 +1861,7 @@ void gdbarch_push_dummy_frame (struct gdbarch *gdbarch) { if (gdbarch->push_dummy_frame == 0) - fatal ("gdbarch: gdbarch_push_dummy_frame invalid"); + internal_error ("gdbarch: gdbarch_push_dummy_frame invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_push_dummy_frame called\n"); @@ -1878,7 +1880,7 @@ CORE_ADDR gdbarch_push_return_address (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR sp) { if (gdbarch->push_return_address == 0) - fatal ("gdbarch: gdbarch_push_return_address invalid"); + internal_error ("gdbarch: gdbarch_push_return_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_push_return_address called\n"); @@ -1897,7 +1899,7 @@ void gdbarch_pop_frame (struct gdbarch *gdbarch) { if (gdbarch->pop_frame == 0) - fatal ("gdbarch: gdbarch_pop_frame invalid"); + internal_error ("gdbarch: gdbarch_pop_frame invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_pop_frame called\n"); @@ -1916,7 +1918,7 @@ CORE_ADDR gdbarch_d10v_make_daddr (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_make_daddr == 0) - fatal ("gdbarch: gdbarch_d10v_make_daddr invalid"); + internal_error ("gdbarch: gdbarch_d10v_make_daddr invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_make_daddr called\n"); @@ -1935,7 +1937,7 @@ CORE_ADDR gdbarch_d10v_make_iaddr (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_make_iaddr == 0) - fatal ("gdbarch: gdbarch_d10v_make_iaddr invalid"); + internal_error ("gdbarch: gdbarch_d10v_make_iaddr invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_make_iaddr called\n"); @@ -1954,7 +1956,7 @@ int gdbarch_d10v_daddr_p (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_daddr_p == 0) - fatal ("gdbarch: gdbarch_d10v_daddr_p invalid"); + internal_error ("gdbarch: gdbarch_d10v_daddr_p invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_daddr_p called\n"); @@ -1973,7 +1975,7 @@ int gdbarch_d10v_iaddr_p (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_iaddr_p == 0) - fatal ("gdbarch: gdbarch_d10v_iaddr_p invalid"); + internal_error ("gdbarch: gdbarch_d10v_iaddr_p invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_iaddr_p called\n"); @@ -1992,7 +1994,7 @@ CORE_ADDR gdbarch_d10v_convert_daddr_to_raw (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_convert_daddr_to_raw == 0) - fatal ("gdbarch: gdbarch_d10v_convert_daddr_to_raw invalid"); + internal_error ("gdbarch: gdbarch_d10v_convert_daddr_to_raw invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_convert_daddr_to_raw called\n"); @@ -2011,7 +2013,7 @@ CORE_ADDR gdbarch_d10v_convert_iaddr_to_raw (struct gdbarch *gdbarch, CORE_ADDR x) { if (gdbarch->d10v_convert_iaddr_to_raw == 0) - fatal ("gdbarch: gdbarch_d10v_convert_iaddr_to_raw invalid"); + internal_error ("gdbarch: gdbarch_d10v_convert_iaddr_to_raw invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_d10v_convert_iaddr_to_raw called\n"); @@ -2030,7 +2032,7 @@ void gdbarch_store_struct_return (struct gdbarch *gdbarch, CORE_ADDR addr, CORE_ADDR sp) { if (gdbarch->store_struct_return == 0) - fatal ("gdbarch: gdbarch_store_struct_return invalid"); + internal_error ("gdbarch: gdbarch_store_struct_return invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_store_struct_return called\n"); @@ -2049,7 +2051,7 @@ void gdbarch_store_return_value (struct gdbarch *gdbarch, struct type *type, char *valbuf) { if (gdbarch->store_return_value == 0) - fatal ("gdbarch: gdbarch_store_return_value invalid"); + internal_error ("gdbarch: gdbarch_store_return_value invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_store_return_value called\n"); @@ -2068,7 +2070,7 @@ CORE_ADDR gdbarch_extract_struct_value_address (struct gdbarch *gdbarch, char *regbuf) { if (gdbarch->extract_struct_value_address == 0) - fatal ("gdbarch: gdbarch_extract_struct_value_address invalid"); + internal_error ("gdbarch: gdbarch_extract_struct_value_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_extract_struct_value_address called\n"); @@ -2087,7 +2089,7 @@ int gdbarch_use_struct_convention (struct gdbarch *gdbarch, int gcc_p, struct type *value_type) { if (gdbarch->use_struct_convention == 0) - fatal ("gdbarch: gdbarch_use_struct_convention invalid"); + internal_error ("gdbarch: gdbarch_use_struct_convention invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_use_struct_convention called\n"); @@ -2106,7 +2108,7 @@ void gdbarch_frame_init_saved_regs (struct gdbarch *gdbarch, struct frame_info *frame) { if (gdbarch->frame_init_saved_regs == 0) - fatal ("gdbarch: gdbarch_frame_init_saved_regs invalid"); + internal_error ("gdbarch: gdbarch_frame_init_saved_regs invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_init_saved_regs called\n"); @@ -2125,7 +2127,7 @@ void gdbarch_init_extra_frame_info (struct gdbarch *gdbarch, int fromleaf, struct frame_info *frame) { if (gdbarch->init_extra_frame_info == 0) - fatal ("gdbarch: gdbarch_init_extra_frame_info invalid"); + internal_error ("gdbarch: gdbarch_init_extra_frame_info invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_init_extra_frame_info called\n"); @@ -2144,7 +2146,7 @@ CORE_ADDR gdbarch_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip) { if (gdbarch->skip_prologue == 0) - fatal ("gdbarch: gdbarch_skip_prologue invalid"); + internal_error ("gdbarch: gdbarch_skip_prologue invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_skip_prologue called\n"); @@ -2163,7 +2165,7 @@ int gdbarch_inner_than (struct gdbarch *gdbarch, CORE_ADDR lhs, CORE_ADDR rhs) { if (gdbarch->inner_than == 0) - fatal ("gdbarch: gdbarch_inner_than invalid"); + internal_error ("gdbarch: gdbarch_inner_than invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_inner_than called\n"); @@ -2182,7 +2184,7 @@ unsigned char * gdbarch_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr) { if (gdbarch->breakpoint_from_pc == 0) - fatal ("gdbarch: gdbarch_breakpoint_from_pc invalid"); + internal_error ("gdbarch: gdbarch_breakpoint_from_pc invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_breakpoint_from_pc called\n"); @@ -2202,7 +2204,7 @@ gdbarch_decr_pc_after_break (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->decr_pc_after_break == -1) - fatal ("gdbarch: gdbarch_decr_pc_after_break invalid"); + internal_error ("gdbarch: gdbarch_decr_pc_after_break invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_decr_pc_after_break called\n"); @@ -2222,7 +2224,7 @@ gdbarch_function_start_offset (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->function_start_offset == -1) - fatal ("gdbarch: gdbarch_function_start_offset invalid"); + internal_error ("gdbarch: gdbarch_function_start_offset invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_function_start_offset called\n"); @@ -2241,7 +2243,7 @@ void gdbarch_remote_translate_xfer_address (struct gdbarch *gdbarch, CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR *rem_addr, int *rem_len) { if (gdbarch->remote_translate_xfer_address == 0) - fatal ("gdbarch: gdbarch_remote_translate_xfer_address invalid"); + internal_error ("gdbarch: gdbarch_remote_translate_xfer_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_remote_translate_xfer_address called\n"); @@ -2261,7 +2263,7 @@ gdbarch_frame_args_skip (gdbarch) struct gdbarch *gdbarch; { if (gdbarch->frame_args_skip == -1) - fatal ("gdbarch: gdbarch_frame_args_skip invalid"); + internal_error ("gdbarch: gdbarch_frame_args_skip invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_args_skip called\n"); @@ -2280,7 +2282,7 @@ int gdbarch_frameless_function_invocation (struct gdbarch *gdbarch, struct frame_info *fi) { if (gdbarch->frameless_function_invocation == 0) - fatal ("gdbarch: gdbarch_frameless_function_invocation invalid"); + internal_error ("gdbarch: gdbarch_frameless_function_invocation invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frameless_function_invocation called\n"); @@ -2299,7 +2301,7 @@ CORE_ADDR gdbarch_frame_chain (struct gdbarch *gdbarch, struct frame_info *frame) { if (gdbarch->frame_chain == 0) - fatal ("gdbarch: gdbarch_frame_chain invalid"); + internal_error ("gdbarch: gdbarch_frame_chain invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_chain called\n"); @@ -2318,7 +2320,7 @@ int gdbarch_frame_chain_valid (struct gdbarch *gdbarch, CORE_ADDR chain, struct frame_info *thisframe) { if (gdbarch->frame_chain_valid == 0) - fatal ("gdbarch: gdbarch_frame_chain_valid invalid"); + internal_error ("gdbarch: gdbarch_frame_chain_valid invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_chain_valid called\n"); @@ -2337,7 +2339,7 @@ CORE_ADDR gdbarch_frame_saved_pc (struct gdbarch *gdbarch, struct frame_info *fi) { if (gdbarch->frame_saved_pc == 0) - fatal ("gdbarch: gdbarch_frame_saved_pc invalid"); + internal_error ("gdbarch: gdbarch_frame_saved_pc invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_saved_pc called\n"); @@ -2356,7 +2358,7 @@ CORE_ADDR gdbarch_frame_args_address (struct gdbarch *gdbarch, struct frame_info *fi) { if (gdbarch->frame_args_address == 0) - fatal ("gdbarch: gdbarch_frame_args_address invalid"); + internal_error ("gdbarch: gdbarch_frame_args_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_args_address called\n"); @@ -2375,7 +2377,7 @@ CORE_ADDR gdbarch_frame_locals_address (struct gdbarch *gdbarch, struct frame_info *fi) { if (gdbarch->frame_locals_address == 0) - fatal ("gdbarch: gdbarch_frame_locals_address invalid"); + internal_error ("gdbarch: gdbarch_frame_locals_address invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_locals_address called\n"); @@ -2394,7 +2396,7 @@ CORE_ADDR gdbarch_saved_pc_after_call (struct gdbarch *gdbarch, struct frame_info *frame) { if (gdbarch->saved_pc_after_call == 0) - fatal ("gdbarch: gdbarch_saved_pc_after_call invalid"); + internal_error ("gdbarch: gdbarch_saved_pc_after_call invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_saved_pc_after_call called\n"); @@ -2413,7 +2415,7 @@ int gdbarch_frame_num_args (struct gdbarch *gdbarch, struct frame_info *frame) { if (gdbarch->frame_num_args == 0) - fatal ("gdbarch: gdbarch_frame_num_args invalid"); + internal_error ("gdbarch: gdbarch_frame_num_args invalid"); if (gdbarch_debug >= 2) /* FIXME: gdb_std??? */ fprintf_unfiltered (gdb_stdlog, "gdbarch_frame_num_args called\n"); @@ -2500,7 +2502,7 @@ gdbarch_data (data) struct gdbarch_data *data; { if (data->index >= current_gdbarch->nr_data) - fatal ("gdbarch_data: request for non-existant data."); + internal_error ("gdbarch_data: request for non-existant data."); return current_gdbarch->data[data->index]; } @@ -2625,7 +2627,7 @@ register_gdbarch_init (bfd_architecture, init) bfd_arch_info = bfd_lookup_arch (bfd_architecture, 0); if (bfd_arch_info == NULL) { - fatal ("gdbarch: Attempt to register unknown architecture (%d)", bfd_architecture); + internal_error ("gdbarch: Attempt to register unknown architecture (%d)", bfd_architecture); } /* Check that we haven't seen this architecture before */ for (curr = &gdbarch_init_registrary; @@ -2633,7 +2635,7 @@ register_gdbarch_init (bfd_architecture, init) curr = &(*curr)->next) { if (bfd_architecture == (*curr)->bfd_architecture) - fatal ("gdbarch: Duplicate registraration of architecture (%s)", + internal_error ("gdbarch: Duplicate registraration of architecture (%s)", bfd_arch_info->printable_name); } /* log it */ @@ -3157,7 +3159,7 @@ set_architecture_from_arch_mach (arch, mach) if (wanted != NULL) set_arch (wanted, set_arch_manual); else - fatal ("gdbarch: hardwired architecture/machine not reconized"); + internal_error ("gdbarch: hardwired architecture/machine not reconized"); } /* Set the architecture from a BFD */ diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h index 7daabca3df2..3d570978bbe 100644 --- a/gdb/gdbarch.h +++ b/gdb/gdbarch.h @@ -1013,10 +1013,10 @@ extern disassemble_info tm_print_insn_info; #define GDB_TARGET_IS_D10V (TARGET_ARCHITECTURE->arch == bfd_arch_d10v) #ifndef D10V_MAKE_DADDR -#define D10V_MAKE_DADDR(X) (fatal ("gdbarch: D10V_MAKE_DADDR"), 0) +#define D10V_MAKE_DADDR(X) (internal_error ("gdbarch: D10V_MAKE_DADDR"), 0) #endif #ifndef D10V_MAKE_IADDR -#define D10V_MAKE_IADDR(X) (fatal ("gdbarch: D10V_MAKE_IADDR"), 0) +#define D10V_MAKE_IADDR(X) (internal_error ("gdbarch: D10V_MAKE_IADDR"), 0) #endif @@ -1042,7 +1042,7 @@ extern int generic_register_convertible_not PARAMS ((int reg_nr)); /* Fallback definition for EXTRACT_STRUCT_VALUE_ADDRESS */ #ifndef EXTRACT_STRUCT_VALUE_ADDRESS #define EXTRACT_STRUCT_VALUE_ADDRESS_P (0) -#define EXTRACT_STRUCT_VALUE_ADDRESS(X) (fatal ("gdbarch: EXTRACT_STRUCT_VALUE_ADDRESS"), 0) +#define EXTRACT_STRUCT_VALUE_ADDRESS(X) (internal_error ("gdbarch: EXTRACT_STRUCT_VALUE_ADDRESS"), 0) #else #ifndef EXTRACT_STRUCT_VALUE_ADDRESS_P #define EXTRACT_STRUCT_VALUE_ADDRESS_P (1) diff --git a/gdb/hppah-nat.c b/gdb/hppah-nat.c index 4aec8eef92f..585ba71920b 100644 --- a/gdb/hppah-nat.c +++ b/gdb/hppah-nat.c @@ -157,7 +157,7 @@ fetch_register (regno) + (REGISTER_BYTE (regno) - REGISTER_BYTE (1))); else - fatal ("hppa-nat.c (fetch_register): unexpected register size"); + internal_error ("hppa-nat.c (fetch_register): unexpected register size"); for (i = 0; i < len; i += sizeof (int)) { diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index 238879060bc..babae1c6a07 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -62,8 +62,6 @@ static char *disassembly_flavor = att_flavor; static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *)); static void set_disassembly_flavor (); -void (*disassembly_flavor_hook) PARAMS ((char *args, int from_tty)); - /* Stdio style buffering was used to minimize calls to ptrace, but this buffering did not take into account that the code section being accessed may not be an even number of buffers long (even if the buffer is only diff --git a/gdb/infcmd.c b/gdb/infcmd.c index 297b2a0b9bc..3a41f6a6073 100644 --- a/gdb/infcmd.c +++ b/gdb/infcmd.c @@ -1,5 +1,5 @@ /* Memory-access and commands for "inferior" process, for GDB. - Copyright 1986, 87, 88, 89, 91, 92, 95, 96, 1998 + Copyright 1986, 87, 88, 89, 91, 92, 95, 96, 1998, 1999 Free Software Foundation, Inc. This file is part of GDB. @@ -35,6 +35,7 @@ #include "symfile.h" #include "objfiles.h" #include "event-loop.h" +#include "parser-defs.h" /* Functions exported for general use: */ @@ -64,6 +65,8 @@ static void float_info PARAMS ((char *, int)); static void detach_command PARAMS ((char *, int)); +static void interrupt_target_command (char *args, int from_tty); + #if !defined (DO_REGISTERS_INFO) static void do_registers_info PARAMS ((int, int)); #endif @@ -707,10 +710,6 @@ breakpoint_auto_delete_contents (arg) Otherwise, run_stack-dummy returns 1 (the frame will eventually be popped when we do hit that breakpoint). */ -/* DEBUG HOOK: 4 => return instead of letting the stack dummy run. */ - -static int stack_dummy_testing = 0; - int run_stack_dummy (addr, buffer) CORE_ADDR addr; @@ -720,11 +719,7 @@ run_stack_dummy (addr, buffer) /* Now proceed, having reached the desired place. */ clear_proceed_status (); - if (stack_dummy_testing & 4) - { - POP_FRAME; - return (0); - } + if (CALL_DUMMY_BREAKPOINT_OFFSET_P) { struct breakpoint *bpt; @@ -899,7 +894,7 @@ finish_command_continuation (arg) value_type = TYPE_TARGET_TYPE (SYMBOL_TYPE (function)); if (!value_type) - fatal ("internal: finish_command: function has no target type"); + internal_error ("finish_command: function has no target type"); if (TYPE_CODE (value_type) == TYPE_CODE_VOID) { @@ -1052,7 +1047,7 @@ finish_command (arg, from_tty) value_type = TYPE_TARGET_TYPE (SYMBOL_TYPE (function)); if (!value_type) - fatal ("internal: finish_command: function has no target type"); + internal_error ("finish_command: function has no target type"); /* FIXME: Shouldn't we do the cleanups before returning? */ if (TYPE_CODE (value_type) == TYPE_CODE_VOID) diff --git a/gdb/infptrace.c b/gdb/infptrace.c index eec7c6ae833..32bd52cc545 100644 --- a/gdb/infptrace.c +++ b/gdb/infptrace.c @@ -330,7 +330,7 @@ _initialize_kernel_u_addr () if (nlist ("/vmunix", names) == 0) kernel_u_addr = names[0].n_value; else - fatal ("Unable to get kernel u area address."); + internal_error ("Unable to get kernel u area address."); #endif /* KERNEL_U_ADDR_BSD. */ } diff --git a/gdb/infrun.c b/gdb/infrun.c index efb1caf9152..5d7fd76b72f 100644 --- a/gdb/infrun.c +++ b/gdb/infrun.c @@ -38,33 +38,66 @@ /* Prototypes for local functions */ -static void signals_info PARAMS ((char *, int)); +static void signals_info (char *, int); -static void handle_command PARAMS ((char *, int)); +static void handle_command (char *, int); -static void sig_print_info PARAMS ((enum target_signal)); +static void sig_print_info (enum target_signal); -static void sig_print_header PARAMS ((void)); +static void sig_print_header (void); -static void resume_cleanups PARAMS ((int)); +static void resume_cleanups (int); -static int hook_stop_stub PARAMS ((PTR)); +static int hook_stop_stub (void *); -static void delete_breakpoint_current_contents PARAMS ((PTR)); +static void delete_breakpoint_current_contents (void *); -static void set_follow_fork_mode_command PARAMS ((char *arg, int from_tty, struct cmd_list_element * c)); +static void set_follow_fork_mode_command (char *arg, int from_tty, + struct cmd_list_element * c); -static void complete_execution PARAMS ((void)); +static void complete_execution (void); + +static struct inferior_status *xmalloc_inferior_status (void); + +static void free_inferior_status (struct inferior_status *); + +static int restore_selected_frame (void *); + +static void build_infrun (void); + +static void follow_inferior_fork (int parent_pid, int child_pid, + int has_forked, int has_vforked); + +static void follow_fork (int parent_pid, int child_pid); + +static void follow_vfork (int parent_pid, int child_pid); + +static void set_schedlock_func (char *args, int from_tty, + struct cmd_list_element * c); + +static int is_internal_shlib_eventpoint (struct breakpoint * ep); + +static int stopped_for_internal_shlib_event (bpstat bs); + +struct execution_control_state; + +static int currently_stepping (struct execution_control_state *ecs); + +static void xdb_handle_command (char *args, int from_tty); + +void _initialize_infrun (void); int inferior_ignoring_startup_exec_events = 0; int inferior_ignoring_leading_exec_events = 0; /* In asynchronous mode, but simulating synchronous execution. */ + int sync_execution = 0; /* wait_for_inferior and normal_stop use this to notify the user when the inferior stopped in a different thread than it had been - running in. */ + running in. */ + static int switched_from_inferior_pid; /* This will be true for configurations that may actually report an @@ -98,7 +131,8 @@ static int may_follow_exec = MAY_FOLLOW_EXEC; Versions of gdb which don't use the "step == this thread steps and others continue" model but instead use the "step == this - thread steps and others wait" shouldn't do this. */ + thread steps and others wait" shouldn't do this. */ + static int thread_step_needed = 0; /* This is true if thread_step_needed should actually be used. At @@ -110,34 +144,6 @@ static int thread_step_needed = 0; static int use_thread_step_needed = USE_THREAD_STEP_NEEDED; -static void follow_inferior_fork PARAMS ((int parent_pid, - int child_pid, - int has_forked, - int has_vforked)); - -static void follow_fork PARAMS ((int parent_pid, int child_pid)); - -static void follow_vfork PARAMS ((int parent_pid, int child_pid)); - -static void set_schedlock_func PARAMS ((char *args, int from_tty, - struct cmd_list_element * c)); - -static int is_internal_shlib_eventpoint PARAMS ((struct breakpoint * ep)); - -static int stopped_for_internal_shlib_event PARAMS ((bpstat bs)); - -static int stopped_for_shlib_catchpoint PARAMS ((bpstat bs, - struct breakpoint ** cp_p)); - -#if __STDC__ -struct execution_control_state; -#endif -static int currently_stepping PARAMS ((struct execution_control_state * ecs)); - -static void xdb_handle_command PARAMS ((char *args, int from_tty)); - -void _initialize_infrun PARAMS ((void)); - /* GET_LONGJMP_TARGET returns the PC at which longjmp() will resume the program. It needs to examine the jmp_buf argument and extract the PC from it. The return value is non-zero on success, zero otherwise. */ @@ -393,19 +399,15 @@ static char *follow_fork_mode_string = NULL; static void -follow_inferior_fork (parent_pid, child_pid, has_forked, has_vforked) - int parent_pid; - int child_pid; - int has_forked; - int has_vforked; +follow_inferior_fork (int parent_pid, int child_pid, int has_forked, + int has_vforked) { int followed_parent = 0; int followed_child = 0; - int ima_clone = 0; /* Which process did the user want us to follow? */ char *follow_mode = - savestring (follow_fork_mode_string, strlen (follow_fork_mode_string)); + savestring (follow_fork_mode_string, strlen (follow_fork_mode_string)); /* Or, did the user not know, and want us to ask? */ if (STREQ (follow_fork_mode_string, "ask")) @@ -568,21 +570,17 @@ follow_inferior_fork (parent_pid, child_pid, has_forked, has_vforked) } static void -follow_fork (parent_pid, child_pid) - int parent_pid; - int child_pid; +follow_fork (int parent_pid, int child_pid) { follow_inferior_fork (parent_pid, child_pid, 1, 0); } /* Forward declaration. */ -static void follow_exec PARAMS ((int, char *)); +static void follow_exec (int, char *); static void -follow_vfork (parent_pid, child_pid) - int parent_pid; - int child_pid; +follow_vfork (int parent_pid, int child_pid) { follow_inferior_fork (parent_pid, child_pid, 0, 1); @@ -597,9 +595,7 @@ follow_vfork (parent_pid, child_pid) } static void -follow_exec (pid, execd_pathname) - int pid; - char *execd_pathname; +follow_exec (int pid, char *execd_pathname) { int saved_pid = pid; struct target_ops *tgt; @@ -707,8 +703,7 @@ static int singlestep_breakpoints_inserted_p = 0; /* Things to clean up if we QUIT out of resume (). */ /* ARGSUSED */ static void -resume_cleanups (arg) - int arg; +resume_cleanups (int arg) { normal_stop (); } @@ -721,10 +716,7 @@ static char *scheduler_enums[] = {schedlock_off, schedlock_on, schedlock_step}; static void -set_schedlock_func (args, from_tty, c) - char *args; - int from_tty; - struct cmd_list_element *c; +set_schedlock_func (char *args, int from_tty, struct cmd_list_element *c) { if (c->type == set_cmd) if (!target_can_lock_scheduler) @@ -745,9 +737,7 @@ set_schedlock_func (args, from_tty, c) STEP nonzero if we should step (zero to continue instead). SIG is the signal to give the inferior (zero for none). */ void -resume (step, sig) - int step; - enum target_signal sig; +resume (int step, enum target_signal sig) { int should_resume = 1; struct cleanup *old_cleanups = make_cleanup ((make_cleanup_func) @@ -867,7 +857,7 @@ resume (step, sig) First do this, then set the ones you want, then call `proceed'. */ void -clear_proceed_status () +clear_proceed_status (void) { trap_expected = 0; step_range_start = 0; @@ -896,10 +886,7 @@ clear_proceed_status () You should call clear_proceed_status before calling proceed. */ void -proceed (addr, siggnal, step) - CORE_ADDR addr; - enum target_signal siggnal; - int step; +proceed (CORE_ADDR addr, enum target_signal siggnal, int step) { int oneproc = 0; @@ -1031,8 +1018,9 @@ static char *prev_func_name; /* Start remote-debugging of a machine over a serial link. */ + void -start_remote () +start_remote (void) { init_thread_list (); init_wait_for_inferior (); @@ -1061,7 +1049,7 @@ start_remote () /* Initialize static vars when a new inferior begins. */ void -init_wait_for_inferior () +init_wait_for_inferior (void) { /* These are meaningless until the first time through wait_for_inferior. */ prev_pc = 0; @@ -1090,8 +1078,7 @@ init_wait_for_inferior () } static void -delete_breakpoint_current_contents (arg) - PTR arg; +delete_breakpoint_current_contents (void *arg) { struct breakpoint **breakpointp = (struct breakpoint **) arg; if (*breakpointp != NULL) @@ -1145,9 +1132,9 @@ struct execution_control_state int wait_some_more; }; -void init_execution_control_state PARAMS ((struct execution_control_state * ecs)); +void init_execution_control_state (struct execution_control_state * ecs); -void handle_inferior_event PARAMS ((struct execution_control_state * ecs)); +void handle_inferior_event (struct execution_control_state * ecs); /* Wait for control to return from inferior to debugger. If inferior gets a signal, we may decide to start it up again @@ -1156,7 +1143,7 @@ void handle_inferior_event PARAMS ((struct execution_control_state * ecs)); should be left stopped and GDB should read more commands. */ void -wait_for_inferior () +wait_for_inferior (void) { struct cleanup *old_cleanups; struct execution_control_state ecss; @@ -1219,7 +1206,7 @@ struct execution_control_state async_ecss; struct execution_control_state *async_ecs; void -fetch_inferior_event () +fetch_inferior_event (void) { static struct cleanup *old_cleanups; @@ -1279,8 +1266,7 @@ fetch_inferior_event () wait_for_inferior-type loop. */ void -init_execution_control_state (ecs) - struct execution_control_state *ecs; +init_execution_control_state (struct execution_control_state *ecs) { ecs->random_signal = 0; ecs->remove_breakpoints_on_following_step = 0; @@ -1302,7 +1288,7 @@ init_execution_control_state (ecs) sanity check. We should never be setting a new step_resume_breakpoint when we have an old one active. */ static void -check_for_old_step_resume_breakpoint () +check_for_old_step_resume_breakpoint (void) { if (step_resume_breakpoint) warning ("GDB bug: infrun.c (wait_for_inferior): dropping old step_resume breakpoint"); @@ -1313,8 +1299,7 @@ check_for_old_step_resume_breakpoint () appropriate action. */ void -handle_inferior_event (ecs) - struct execution_control_state *ecs; +handle_inferior_event (struct execution_control_state *ecs) { CORE_ADDR tmp; int stepped_after_stopped_by_watchpoint; @@ -1599,8 +1584,9 @@ handle_inferior_event (ecs) inferior_ignoring_leading_exec_events = target_reported_exec_events_per_exec_call () - 1; - pending_follow.execd_pathname = savestring (ecs->ws.value.execd_pathname, - strlen (ecs->ws.value.execd_pathname)); + pending_follow.execd_pathname = + savestring (ecs->ws.value.execd_pathname, + strlen (ecs->ws.value.execd_pathname)); /* Did inferior_pid exec, or did a (possibly not-yet-followed) child of a vfork exec? @@ -3046,8 +3032,7 @@ stop_stepping: /* Are we in the middle of stepping? */ static int -currently_stepping (ecs) - struct execution_control_state *ecs; +currently_stepping (struct execution_control_state *ecs) { return ((through_sigtramp_breakpoint == NULL && !ecs->handling_longjmp @@ -3064,8 +3049,7 @@ currently_stepping (ecs) something gdb sets for its own use, and isn't ever shown to a user.) */ static int -is_internal_shlib_eventpoint (ep) - struct breakpoint *ep; +is_internal_shlib_eventpoint (struct breakpoint *ep) { return (ep->type == bp_shlib_event) @@ -3075,9 +3059,9 @@ is_internal_shlib_eventpoint (ep) /* This function returns TRUE if bs indicates that the inferior stopped due to a shared library (aka dynamically-linked library) event. */ + static int -stopped_for_internal_shlib_event (bs) - bpstat bs; +stopped_for_internal_shlib_event (bpstat bs) { /* Note that multiple eventpoints may've caused the stop. Any that are associated with shlib events will be accepted. */ @@ -3091,45 +3075,15 @@ stopped_for_internal_shlib_event (bs) /* If we get here, then no candidate was found. */ return 0; } - -/* This function returns TRUE if bs indicates that the inferior - stopped due to a shared library (aka dynamically-linked library) - event caught by a catchpoint. - - If TRUE, cp_p is set to point to the catchpoint. - - Else, the value of cp_p is undefined. */ -static int -stopped_for_shlib_catchpoint (bs, cp_p) - bpstat bs; - struct breakpoint **cp_p; -{ - /* Note that multiple eventpoints may've caused the stop. Any - that are associated with shlib events will be accepted. */ - *cp_p = NULL; - - for (; bs != NULL; bs = bs->next) - { - if ((bs->breakpoint_at != NULL) - && ep_is_shlib_catchpoint (bs->breakpoint_at)) - { - *cp_p = bs->breakpoint_at; - return 1; - } - } - - /* If we get here, then no candidate was found. */ - return 0; -} - /* Reset proper settings after an asynchronous command has finished. If the execution command was in synchronous mode, register stdin with the event loop, and reset the prompt. */ + static void -complete_execution () +complete_execution (void) { - extern cleanup_sigint_signal_handler PARAMS ((void)); + extern int cleanup_sigint_signal_handler (void); target_executing = 0; if (sync_execution) @@ -3151,7 +3105,7 @@ complete_execution () attempting to insert breakpoints. */ void -normal_stop () +normal_stop (void) { /* As with the notification of thread events, we want to delay notifying the user that we've switched thread context until @@ -3313,47 +3267,43 @@ done: } static int -hook_stop_stub (cmd) - PTR cmd; +hook_stop_stub (void *cmd) { execute_user_command ((struct cmd_list_element *) cmd, 0); return (0); } int -signal_stop_state (signo) - int signo; +signal_stop_state (int signo) { return signal_stop[signo]; } int -signal_print_state (signo) - int signo; +signal_print_state (int signo) { return signal_print[signo]; } int -signal_pass_state (signo) - int signo; +signal_pass_state (int signo) { return signal_program[signo]; } static void -sig_print_header () +sig_print_header (void) { printf_filtered ("\ Signal Stop\tPrint\tPass to program\tDescription\n"); } static void -sig_print_info (oursig) - enum target_signal oursig; +sig_print_info (enum target_signal oursig) { char *name = target_signal_to_name (oursig); int name_padding = 13 - strlen (name); + if (name_padding <= 0) name_padding = 0; @@ -3369,9 +3319,7 @@ sig_print_info (oursig) /* Specify how various signals in the inferior should be handled. */ static void -handle_command (args, from_tty) - char *args; - int from_tty; +handle_command (char *args, int from_tty) { char **argv; int digits, wordlen; @@ -3553,9 +3501,7 @@ Are you sure you want to change it? ", } static void -xdb_handle_command (args, from_tty) - char *args; - int from_tty; +xdb_handle_command (char *args, int from_tty) { char **argv; struct cleanup *old_chain; @@ -3627,9 +3573,7 @@ xdb_handle_command (args, from_tty) targets, all signals should be in the signal tables). */ static void -signals_info (signum_exp, from_tty) - char *signum_exp; - int from_tty; +signals_info (char *signum_exp, int from_tty) { enum target_signal oursig; sig_print_header (); @@ -3695,10 +3639,8 @@ struct inferior_status int proceed_to_finish; }; - -static struct inferior_status *xmalloc_inferior_status PARAMS ((void)); static struct inferior_status * -xmalloc_inferior_status () +xmalloc_inferior_status (void) { struct inferior_status *inf_status; inf_status = xmalloc (sizeof (struct inferior_status)); @@ -3707,10 +3649,8 @@ xmalloc_inferior_status () return inf_status; } -static void free_inferior_status PARAMS ((struct inferior_status *)); static void -free_inferior_status (inf_status) - struct inferior_status *inf_status; +free_inferior_status (struct inferior_status *inf_status) { free (inf_status->registers); free (inf_status->stop_registers); @@ -3718,10 +3658,8 @@ free_inferior_status (inf_status) } void -write_inferior_status_register (inf_status, regno, val) - struct inferior_status *inf_status; - int regno; - LONGEST val; +write_inferior_status_register (struct inferior_status *inf_status, int regno, + LONGEST val) { int size = REGISTER_RAW_SIZE (regno); void *buf = alloca (size); @@ -3729,15 +3667,12 @@ write_inferior_status_register (inf_status, regno, val) memcpy (&inf_status->registers[REGISTER_BYTE (regno)], buf, size); } - - /* Save all of the information associated with the inferior<==>gdb connection. INF_STATUS is a pointer to a "struct inferior_status" (defined in inferior.h). */ struct inferior_status * -save_inferior_status (restore_stack_info) - int restore_stack_info; +save_inferior_status (int restore_stack_info) { struct inferior_status *inf_status = xmalloc_inferior_status (); @@ -3778,11 +3713,8 @@ struct restore_selected_frame_args int level; }; -static int restore_selected_frame PARAMS ((PTR)); - static int -restore_selected_frame (args) - PTR args; +restore_selected_frame (void *args) { struct restore_selected_frame_args *fr = (struct restore_selected_frame_args *) args; @@ -3813,8 +3745,7 @@ restore_selected_frame (args) } void -restore_inferior_status (inf_status) - struct inferior_status *inf_status; +restore_inferior_status (struct inferior_status *inf_status) { stop_signal = inf_status->stop_signal; stop_pc = inf_status->stop_pc; @@ -3871,8 +3802,7 @@ restore_inferior_status (inf_status) } void -discard_inferior_status (inf_status) - struct inferior_status *inf_status; +discard_inferior_status (struct inferior_status *inf_status) { /* See save_inferior_status for info on stop_bpstat. */ bpstat_clear (&inf_status->stop_bpstat); @@ -3880,10 +3810,8 @@ discard_inferior_status (inf_status) } static void -set_follow_fork_mode_command (arg, from_tty, c) - char *arg; - int from_tty; - struct cmd_list_element *c; +set_follow_fork_mode_command (char *arg, int from_tty, + struct cmd_list_element *c) { if (!STREQ (arg, "parent") && !STREQ (arg, "child") && @@ -3896,18 +3824,14 @@ set_follow_fork_mode_command (arg, from_tty, c) follow_fork_mode_string = savestring (arg, strlen (arg)); } - - -static void build_infrun PARAMS ((void)); static void -build_infrun () +build_infrun (void) { stop_registers = xmalloc (REGISTER_BYTES); } - void -_initialize_infrun () +_initialize_infrun (void) { register int i; register int numsigs; diff --git a/gdb/irix5-nat.c b/gdb/irix5-nat.c index 35445f7bf1d..dc9abe06c5c 100644 --- a/gdb/irix5-nat.c +++ b/gdb/irix5-nat.c @@ -845,7 +845,7 @@ symbol_add_stub (arg) lowest_sect = bfd_get_section_by_name (so->abfd, ".text"); if (lowest_sect == NULL) bfd_map_over_sections (so->abfd, find_lowest_section, - (PTR) & lowest_sect); + (PTR) &lowest_sect); if (lowest_sect) text_addr = bfd_section_vma (so->abfd, lowest_sect) + LM_OFFSET (so); } diff --git a/gdb/kod-cisco.c b/gdb/kod-cisco.c new file mode 100644 index 00000000000..b33b9e58d8d --- /dev/null +++ b/gdb/kod-cisco.c @@ -0,0 +1,321 @@ +/* Kernel Object Display facility for Cisco + Copyright 1999 Free Software Foundation, Inc. + + Written by Tom Tromey <tromey@cygnus.com>. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "defs.h" +#include "gdb_string.h" + +#ifdef HAVE_STDLIB_H +#include <stdlib.h> +#endif + +/* Define this to turn off communication with target. */ +/* #define FAKE_PACKET */ + +/* Size of buffer used for remote communication. */ +#define PBUFSIZ 400 + +/* Pointers to gdb callbacks. */ +static void (*gdb_kod_display) (char *); +static void (*gdb_kod_query) (char *, char *, int *); + + + +/* Initialize and return library name and version. + The gdb side of KOD, kod.c, passes us two functions: one for + displaying output (presumably to the user) and the other for + querying the target. */ +char * +cisco_kod_open (char *arg, + void (*display_func) (char *), + void (*query_func) (char *, char *, int *)) +{ + char buffer[PBUFSIZ]; + int bufsiz = PBUFSIZ; + int i, count; + + gdb_kod_display = display_func; + gdb_kod_query = query_func; + + /* Get the OS info, and check the version field. This is the stub + version, which we use to see whether we will understand what + comes back. This is lame, but the `qKoL' request doesn't + actually provide enough configurability. + + Right now the only defined version number is `0.0.0'. + This stub supports qKoI and the `a' (any) object requests qKaL + and qKaI. Each `a' object is returned as a 4-byte integer ID. + An info request on an object returns a pair of 4-byte integers; + the first is the object pointer and the second is the thread ID. */ + +#ifndef FAKE_PACKET + (*gdb_kod_query) ("oI;", buffer, &bufsiz); +#else + strcpy (buffer, "Cisco IOS/Classic/13.4 0.0.0"); +#endif + + count = 2; + for (i = 0; count && buffer[i] != '\0'; ++i) + { + if (buffer[i] == ' ') + --count; + } + + if (buffer[i] == '\0') + error ("Remote returned malformed packet\n"); + if (strcmp (&buffer[i], "0.0.0")) + error ("Remote returned unknown stub version: %s\n", &buffer[i]); + + /* Return name, version, and description. I hope we have enough + space. */ + return (strdup ("gdbkodcisco v0.0.0 - Cisco Kernel Object Display")); +} + +/* Close the connection. */ +void +cisco_kod_close () +{ +} + +/* Print a "bad packet" message. */ +static void +bad_packet () +{ + (*gdb_kod_display) ("Remote target returned malformed packet.\n"); +} + +/* Print information about currently known kernel objects. + We currently ignore the argument. There is only one mode of + querying the Cisco kernel: we ask for a dump of everything, and + it returns it. */ +void +cisco_kod_request (char *arg, int from_tty) +{ + char buffer[PBUFSIZ], command[PBUFSIZ]; + int done = 0, i; + int fail = 0; + + char **sync_ids; + int sync_len = 0; + int sync_next = 0; + char *prev_id = NULL; + + if (! arg || strcmp (arg, "any")) + { + /* "Top-level" command. This is really silly, but it also seems + to be how KOD is defined. */ + /* Even sillier is the fact that this first line must start + with the word "List". See kod.tcl. */ + (*gdb_kod_display) ("List of Cisco Kernel Objects\n"); + (*gdb_kod_display) ("Object\tDescription\n"); + (*gdb_kod_display) ("any\tAny and all objects\n"); + return; + } + + while (! done) + { + int off = 0; /* Where we are in the string. */ + long count; /* Number of objects in this packet. */ + int bufsiz = PBUFSIZ; + char *s_end; + + strcpy (command, "aL"); + if (prev_id) + { + strcat (command, ","); + strcat (command, prev_id); + } + strcat (command, ";"); + +#ifndef FAKE_PACKET + /* We talk to the target by calling through the query function + passed to us when we were initialized. */ + (*gdb_kod_query) (command, buffer, &bufsiz); +#else + /* Fake up a multi-part packet. */ + if (! strncmp (&command[3], "a500005a", 8)) + strcpy (buffer, "KAL,01,1,f500005f;f500005f;"); + else + strcpy (buffer, "KAL,02,0,a500005a;a500005a;de02869f;"); +#endif + + /* Empty response is an error. */ + if (strlen (buffer) == 0) + { + (*gdb_kod_display) ("Remote target did not recognize kernel object query command.\n"); + fail = 1; + break; + } + + /* If we don't get a `K' response then the buffer holds the + target's error message. */ + if (buffer[0] != 'K') + { + (*gdb_kod_display) (buffer); + fail = 1; + break; + } + + /* Make sure we get the response we expect. */ + if (strncmp (buffer, "KAL,", 4)) + { + bad_packet (); + fail = 1; + break; + } + off += 4; + + /* Parse out the count. We expect to convert exactly two + characters followed by a comma. */ + count = strtol (&buffer[off], &s_end, 16); + if (s_end - &buffer[off] != 2 || buffer[off + 2] != ',') + { + bad_packet (); + fail = 1; + break; + } + off += 3; + + /* Parse out the `done' flag. */ + if ((buffer[off] != '0' && buffer[off] != '1') + || buffer[off + 1] != ',') + { + bad_packet (); + fail = 1; + break; + } + done = buffer[off] == '1'; + off += 2; + + /* Id of the last item; we might this to construct the next + request. */ + prev_id = &buffer[off]; + if (strlen (prev_id) < 8 || buffer[off + 8] != ';') + { + bad_packet (); + fail = 1; + break; + } + buffer[off + 8] = '\0'; + off += 9; + + if (sync_len == 0) + sync_ids = (char **) xmalloc (count * sizeof (char *)); + else + sync_ids = (char **) xrealloc (sync_ids, + (sync_len + count) * sizeof (char *)); + sync_len += count; + + for (i = 0; i < count; ++i) + { + if (strlen (&buffer[off]) < 8 || buffer[off + 8] != ';') + { + bad_packet (); + fail = 1; + break; + } + buffer[off + 8] = '\0'; + sync_ids[sync_next++] = xstrdup (&buffer[off]); + off += 9; + } + + if (buffer[off] != '\0') + { + bad_packet (); + fail = 1; + break; + } + } + + /* We've collected all the sync object IDs. Now query to get the + specific information, and arrange to print this info. */ + if (! fail) + { + (*gdb_kod_display) ("Object ID\tObject Pointer\tThread ID\n"); + + for (i = 0; i < sync_next; ++i) + { + int off = 0; + int bufsiz = PBUFSIZ; + + /* For now assume a query can be accomplished in a single + transaction. This is implied in the protocol document. + See comments above, and the KOD protocol document, to + understand the parsing of the return value. */ + strcpy (command, "aI,"); + strcat (command, sync_ids[i]); + strcat (command, ";"); + +#ifndef FAKE_PACKET + (*gdb_kod_query) (command, buffer, &bufsiz); +#else + strcpy (buffer, "KAI,"); + strcat (buffer, sync_ids[i]); + strcat (buffer, ",ffef00a0,cd00123d;"); +#endif + + if (strlen (buffer) == 0) + { + (*gdb_kod_display) ("Remote target did not recognize KOD command.\n"); + break; + } + + if (strncmp (buffer, "KAI,", 4)) + { + bad_packet (); + break; + } + off += 4; + + if (strncmp (&buffer[off], sync_ids[i], 8) + || buffer[off + 8] != ',') + { + bad_packet (); + break; + } + off += 9; + + /* Extract thread id and sync object pointer. */ + if (strlen (&buffer[off]) != 2 * 8 + 2 + || buffer[off + 8] != ',' + || buffer[off + 17] != ';') + { + bad_packet (); + break; + } + + buffer[off + 8] = '\0'; + buffer[off + 17] = '\0'; + + /* Display the result. */ + (*gdb_kod_display) (sync_ids[i]); + (*gdb_kod_display) ("\t"); + (*gdb_kod_display) (&buffer[off]); + (*gdb_kod_display) ("\t"); + (*gdb_kod_display) (&buffer[off + 9]); + (*gdb_kod_display) ("\n"); + } + } + + /* Free memory. */ + for (i = 0; i < sync_next; ++i) + free (sync_ids[i]); + free (sync_ids); +} diff --git a/gdb/kod.c b/gdb/kod.c new file mode 100644 index 00000000000..a0969109cf8 --- /dev/null +++ b/gdb/kod.c @@ -0,0 +1,239 @@ +/* Kernel Object Display generic routines and callbacks + Copyright 1998, 1999 Free Software Foundation, Inc. + + Written by Fernando Nasser <fnasser@cygnus.com> for Cygnus Solutions. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#include "defs.h" +#include "command.h" +#include "gdbcmd.h" +#include "target.h" +#include "gdb_string.h" + +/* Prototypes for exported functions. */ +void _initialize_kod (void); + +/* Prototypes for local functions. */ +static void show_kod (char *, int); +static void info_kod_command (char *, int); +static void load_kod_library (char *); + +/* Prototypes for callbacks. These are passed into the KOD modules. */ +static void gdb_kod_display (char *); +static void gdb_kod_query (char *, char *, int *); + +/* These functions are imported from the KOD module. + + gdb_kod_open - initiates the KOD connection to the remote. The + first argument is the display function the module should use to + communicate with the user. The second argument is the query + function the display should use to communicate with the target. + This should call error() if there is an error. Otherwise it should + return a malloc()d string of the form: + + NAME VERSION - DESCRIPTION + + Neither NAME nor VERSION should contain a hyphen. + + + gdb_kod_request - This is used when the user enters an "info + <module>" request. The remaining arguments are passed as the first + argument. The second argument is the standard `from_tty' + argument. + + + gdb_kod_close - This is called when the KOD connection to the + remote should be terminated. */ + +static char *(*gdb_kod_open) (void *, void *); +static void (*gdb_kod_request) (char *, int); +static void (*gdb_kod_close) (); + + +/* Name of inferior's operating system. */ +char *operating_system; + +/* We save a copy of the OS so that we can properly reset when + switching OS's. */ +static char *old_operating_system; + +/* Functions imported from the library for all supported OSes. + FIXME: we really should do something better, such as dynamically + loading the KOD modules. */ +extern char *ecos_kod_open (void *, void *); +extern void ecos_kod_request (char *, int); +extern void ecos_kod_close (); +extern char *cisco_kod_open (void *, void *); +extern void cisco_kod_request (char *, int); +extern void cisco_kod_close (); + + +/* Print a line of data generated by the module. */ + +static void +gdb_kod_display (char *arg) +{ + printf_filtered ("%s", arg); +} + +/* Queries the target on behalf of the module. */ + +static void +gdb_kod_query (char *arg, char *result, int *maxsiz) +{ + int bufsiz = 0; + + /* Check if current target has remote_query capabilities. + If not, it does not have kod either. */ + if (! current_target.to_query) + { + strcpy (result, + "ERR: Kernel Object Display not supported by current target\n"); + return; + } + + /* Just get the maximum buffer size. */ + target_query ((int) 'K', 0, 0, &bufsiz); + + /* Check if *we* were called just for getting the buffer size. */ + if (*maxsiz == 0) + { + *maxsiz = bufsiz; + strcpy (result, "OK"); + return; + } + + /* Check if caller can handle a buffer this large, if not, adjust. */ + if (bufsiz > *maxsiz) + bufsiz = *maxsiz; + + /* See if buffer can hold the query (usually it can, as the query is + short). */ + if (strlen (arg) >= bufsiz) + error ("kod: query argument too long"); + + /* Send actual request. */ + if (target_query ((int) 'K', arg, result, &bufsiz)) + strcpy (result, "ERR: remote query failed"); +} + +/* Print name of kod command after selecting the appropriate kod + formatting library module. As a side effect we create a new "info" + subcommand which is what the user actually uses to query the OS. */ + +static void +kod_set_os (char *arg, int from_tty, struct cmd_list_element *command) +{ + char *p; + + if (command->type != set_cmd) + return; + + /* If we had already had an open OS, close it. */ + if (gdb_kod_close) + (*gdb_kod_close) (); + + /* Also remove the old OS's command. */ + if (old_operating_system) + { + delete_cmd (old_operating_system, &infolist); + free (old_operating_system); + } + old_operating_system = strdup (operating_system); + + if (! operating_system || ! *operating_system) + { + /* If user set operating system to empty, we want to forget we + had a module open. Setting these variables is just nice for + debugging and clarity. */ + gdb_kod_open = NULL; + gdb_kod_request = NULL; + gdb_kod_close = NULL; + } + else + { + char *kodlib; + + load_kod_library (operating_system); + + kodlib = (*gdb_kod_open) (gdb_kod_display, gdb_kod_query); + + /* Add kod related info commands to gdb. */ + add_info (operating_system, info_kod_command, + "Displays information about Kernel Objects."); + + p = strrchr (kodlib, '-'); + if (p != NULL) + p++; + else + p = "Unknown KOD library"; + printf_filtered ("%s - %s\n", operating_system, p); + + free (kodlib); + } +} + +/* Print information about currently known kernel objects of the + specified type or a list of all known kernel object types if + argument is empty. */ + +static void +info_kod_command (char *arg, int from_tty) +{ + (*gdb_kod_request) (arg, from_tty); +} + +/* Print name of kod command after selecting the appropriate kod + formatting library module. */ + +static void +load_kod_library (char *lib) +{ +#if 0 + /* FIXME: Don't have the eCos code here. */ + if (! strcmp (lib, "ecos")) + { + gdb_kod_open = ecos_kod_open; + gdb_kod_request = ecos_kod_request; + gdb_kod_close = ecos_kod_close; + } + else +#endif /* 0 */ + if (! strcmp (lib, "cisco")) + { + gdb_kod_open = cisco_kod_open; + gdb_kod_request = cisco_kod_request; + gdb_kod_close = cisco_kod_close; + } + else + error ("Unknown operating system: %s\n", operating_system); +} + +void +_initialize_kod () +{ + struct cmd_list_element *c; + + c = add_set_cmd ("os", no_class, var_string, + (char *) &operating_system, + "Set operating system", + &setlist); + c->function.sfunc = kod_set_os; + add_show_from_set (c, &showlist); +} diff --git a/gdb/language.c b/gdb/language.c index d177918a0ac..1aeb2372fcd 100644 --- a/gdb/language.c +++ b/gdb/language.c @@ -1076,21 +1076,10 @@ op_error (fmt, op, fatal) by the value of warning_pre_print and we do not return to the top level. */ void -#ifdef ANSI_PROTOTYPES type_error (char *string,...) -#else -type_error (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, string); -#else - char *string; - va_start (args); - string = va_arg (args, char *); -#endif if (type_check == type_check_warn) fprintf_filtered (gdb_stderr, warning_pre_print); @@ -1105,21 +1094,10 @@ type_error (va_alist) } void -#ifdef ANSI_PROTOTYPES range_error (char *string,...) -#else -range_error (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, string); -#else - char *string; - va_start (args); - string = va_arg (args, char *); -#endif if (range_check == range_check_warn) fprintf_filtered (gdb_stderr, warning_pre_print); diff --git a/gdb/m3-nat.c b/gdb/m3-nat.c index 61274bd98af..6e53546be26 100644 --- a/gdb/m3-nat.c +++ b/gdb/m3-nat.c @@ -1683,9 +1683,9 @@ catch_exception_raise (port, thread, task, exception, code, subcode) } if (exception < 0 || exception > MAX_EXCEPTION) - fatal ("catch_exception_raise: unknown exception code %d thread %d", - exception, - mid); + internal_error ("catch_exception_raise: unknown exception code %d thread %d", + exception, + mid); if (!MACH_PORT_VALID (inferior_task)) error ("got an exception, but inferior_task is null or dead"); @@ -3598,7 +3598,7 @@ mach3_exception_actions (w, force_print_only, who) stop_code); break; default: - fatal ("Unknown exception"); + internal_error ("Unknown exception"); } } } @@ -3624,13 +3624,13 @@ setup_notify_port (create_new) MACH_PORT_RIGHT_RECEIVE, &our_notify_port); if (ret != KERN_SUCCESS) - fatal ("Creating notify port %s", mach_error_string (ret)); + internal_error ("Creating notify port %s", mach_error_string (ret)); ret = mach_port_move_member (mach_task_self (), our_notify_port, inferior_wait_port_set); if (ret != KERN_SUCCESS) - fatal ("initial move member %s", mach_error_string (ret)); + internal_error ("initial move member %s", mach_error_string (ret)); } } @@ -4650,7 +4650,7 @@ _initialize_m3_nat () MACH_PORT_RIGHT_PORT_SET, &inferior_wait_port_set); if (ret != KERN_SUCCESS) - fatal ("initial port set %s", mach_error_string (ret)); + internal_error ("initial port set %s", mach_error_string (ret)); /* mach_really_wait now waits for this */ currently_waiting_for = inferior_wait_port_set; diff --git a/gdb/main.c b/gdb/main.c index 26a97cd697a..d6481e45b9f 100644 --- a/gdb/main.c +++ b/gdb/main.c @@ -684,7 +684,9 @@ Options:\n\n\ fputs_unfiltered ("\ --mapped Use mapped symbol files if supported on this system.\n\ --nw Do not use a window interface.\n\ - --nx Do not read .gdbinit file.\n\ + --nx Do not read ", stream); + fputs_unfiltered (gdbinit, stream); + fputs_unfiltered (" file.\n\ --quiet Do not print version number on startup.\n\ --readnow Fully read symbol files on first access.\n\ ", stream); diff --git a/gdb/mcore-rom.c b/gdb/mcore-rom.c new file mode 100644 index 00000000000..e28fddc52c0 --- /dev/null +++ b/gdb/mcore-rom.c @@ -0,0 +1,206 @@ +/* Remote debugging interface to Motorola picobug monitor for gdb, + the GNU debugger. + Copyright 1999 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#include "defs.h" +#include "gdbcore.h" +#include "target.h" +#include "monitor.h" +#include "gdb_string.h" + +/* Functions used only in this file. */ + +static void init_picobug_cmds (void); + + +/* Functions exported from this file. */ + +void _initialize_picobug_rom (void); + +void picobug_open (char *args, int from_tty); + +int picobug_dumpregs (void); + + +static char *picobug_inits[] = +{"\r", NULL}; + +static struct target_ops picobug_ops; +static struct monitor_ops picobug_cmds; + +/* Picobug only supports a subset of registers from MCore. In reality, + it doesn't support ss1, either. */ +/* *INDENT-OFF* */ +static char *picobug_regnames[] = { + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + "psr", "vbr", "epsr", "fpsr", "epc", "fpc", 0, "ss1", + "ss2", "ss3", "ss4", 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + "pc" }; +/* *INDENT-ON* */ + + + +void +picobug_open (char *args, int from_tty) +{ + monitor_open (args, &picobug_cmds, from_tty); +} +/* *INDENT-OFF* */ +/* We choose to write our own dumpregs routine, since the output of + the register dumping is rather difficult to encapsulate in a + regexp: + +picobug> rd + pc 2f00031e epc 2f00031e fpc 00000000 + psr 80000101 epsr 80000101 fpsr 00000000 +ss0-ss4 bad0beef 00000000 00000000 00000000 00000000 vbr 30005c00 + r0-r7 2f0fff4c 00000090 00000001 00000002 00000003 00000004 00000005 00000006 + r8-r15 2f0fff64 00000000 00000000 00000000 00000000 00000000 00000000 2f00031e */ +/* *INDENT-ON* */ + + + +int +picobug_dumpregs () +{ + char buf[1024]; + int resp_len; + char *p; + + /* Send the dump register command to the monitor and + get the reply. */ + monitor_printf (picobug_cmds.dump_registers); + resp_len = monitor_expect_prompt (buf, sizeof (buf)); + + p = strtok (buf, " \t\r\n"); + while (p) + { + if (strchr (p, '-')) + { + /* got a range. either r0-r7, r8-r15 or ss0-ss4 */ + if (STREQN (p, "r0", 2) || STREQN (p, "r8", 2)) + { + int rn = (p[1] == '0' ? 0 : 8); + int i = 0; + + /* Get the next 8 values and record them. */ + while (i < 8) + { + p = strtok (NULL, " \t\r\n"); + if (p) + monitor_supply_register (rn + i, p); + i++; + } + } + else if (STREQN (p, "ss", 2)) + { + /* get the next five values, ignoring the first */ + int rn; + p = strtok (NULL, " \t\r\n"); + for (rn = 39; rn < 43; rn++) + { + p = strtok (NULL, " \t\r\n"); + if (p) + monitor_supply_register (rn, p); + } + } + else + { + break; + } + } + else + { + /* Simple register type, paired */ + char *name = p; + int i; + + /* Get and record value */ + p = strtok (NULL, " \t\r\n"); + if (p) + { + for (i = 0; i < NUM_REGS; i++) + { + if (picobug_regnames[i] && STREQ (picobug_regnames[i], name)) + break; + } + + if (i <= NUM_REGS) + monitor_supply_register (i, p); + } + } + p = strtok (NULL, " \t\r\n"); + } + + return 0; +} + +static void +init_picobug_cmds (void) +{ + picobug_cmds.flags = MO_GETMEM_NEEDS_RANGE | MO_CLR_BREAK_USES_ADDR | MO_PRINT_PROGRAM_OUTPUT; + + picobug_cmds.init = picobug_inits; /* Init strings */ + picobug_cmds.cont = "g\n"; /* continue command */ + picobug_cmds.step = "s\n"; /* single step */ + picobug_cmds.set_break = "br %x\n"; /* set a breakpoint */ + picobug_cmds.clr_break = "nobr %x\n"; /* clear a breakpoint */ + picobug_cmds.clr_all_break = "nobr\n"; /* clear all breakpoints */ + picobug_cmds.setmem.cmdb = "mm %x %x ;b\n"; /* setmem.cmdb (addr, value) */ + picobug_cmds.setmem.cmdw = "mm %x %x ;h\n"; /* setmem.cmdw (addr, value) */ + picobug_cmds.setmem.cmdl = "mm %x %x ;w\n"; /* setmem.cmdl (addr, value) */ + picobug_cmds.getmem.cmdb = "md %x %x\n"; /* getmem.cmdb (start addr, end addr) */ + picobug_cmds.getmem.resp_delim = ":"; /* getmem.resp_delim */ + picobug_cmds.setreg.cmd = "rm %s %x\n"; /* setreg.cmd (name, value) */ + picobug_cmds.getreg.cmd = "rd %s\n"; /* getreg.cmd (name) */ + picobug_cmds.getreg.resp_delim = ":"; /* getreg.resp_delim */ + picobug_cmds.dump_registers = "rd\n"; /* dump_registers */ + picobug_cmds.dumpregs = picobug_dumpregs; /* dump registers parser */ + picobug_cmds.load = "lo\n"; /* download command */ + picobug_cmds.prompt = "picobug> "; /* monitor command prompt */ + picobug_cmds.line_term = "\n"; /* end-of-line terminator */ + picobug_cmds.target = &picobug_ops; /* target operations */ + picobug_cmds.stopbits = SERIAL_1_STOPBITS; /* number of stop bits */ + picobug_cmds.regnames = picobug_regnames; /* registers names */ + picobug_cmds.num_breakpoints = 20; /* number of breakpoints */ + picobug_cmds.magic = MONITOR_OPS_MAGIC; /* magic */ +} + +void +_initialize_picobug_rom () +{ + int i; + + /* Initialize m32r RevC monitor target */ + init_picobug_cmds (); + init_monitor_ops (&picobug_ops); + picobug_ops.to_shortname = "picobug"; + picobug_ops.to_longname = "picobug monitor"; + picobug_ops.to_doc = "Debug via the picobug monitor.\n\ +Specify the serial device it is connected to (e.g. /dev/ttya)."; + picobug_ops.to_open = picobug_open; + + add_target (&picobug_ops); +} diff --git a/gdb/mcore-tdep.c b/gdb/mcore-tdep.c new file mode 100644 index 00000000000..1fc6e906a16 --- /dev/null +++ b/gdb/mcore-tdep.c @@ -0,0 +1,992 @@ +/* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger + Copyright (C) 1999 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "defs.h" +#include "frame.h" +#include "symtab.h" +#include "value.h" +#include "gdbcmd.h" + +/* Functions declared and used only in this file */ + +static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue); + +static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame); + +static int get_insn (CORE_ADDR pc); + +/* Functions exported from this file */ + +int mcore_use_struct_convention (int gcc_p, struct type *type); + +void _initialize_mcore (void); + +void mcore_init_extra_frame_info (struct frame_info *fi); + +CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi); + +CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum); + +CORE_ADDR mcore_frame_args_address (struct frame_info *fi); + +CORE_ADDR mcore_frame_locals_address (struct frame_info *fi); + +void mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset); + +CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp); + +CORE_ADDR mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp, + unsigned char struct_return, CORE_ADDR struct_addr); + +void mcore_pop_frame (struct frame_info *fi); + +CORE_ADDR mcore_skip_prologue (CORE_ADDR pc); + +CORE_ADDR mcore_frame_chain (struct frame_info *fi); + +unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size); + +int mcore_use_struct_convention (int gcc_p, struct type *type); + +void mcore_store_return_value (struct type *type, char *valbuf); + +CORE_ADDR mcore_extract_struct_value_address (char *regbuf); + +void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf); + +#ifdef MCORE_DEBUG +int mcore_debug = 0; +#endif + +/* The registers of the Motorola MCore processors */ +/* *INDENT-OFF* */ +char *mcore_register_names[] = +{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7", + "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15", + "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", + "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15", + "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23", + "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", + "pc" }; +/* *INDENT-ON* */ + + + +/* Additional info that we use for managing frames */ +struct frame_extra_info + { + /* A generic status word */ + int status; + + /* Size of this frame */ + int framesize; + + /* The register that is acting as a frame pointer, if + it is being used. This is undefined if status + does not contain the flag MY_FRAME_IN_FP. */ + int fp_regnum; + }; + +/* frame_extra_info status flags */ + +/* The base of the current frame is actually in the stack pointer. + This happens when there is no frame pointer (MCore ABI does not + require a frame pointer) or when we're stopped in the prologue or + epilogue itself. In these cases, mcore_analyze_prologue will need + to update fi->frame before returning or analyzing the register + save instructions. */ +#define MY_FRAME_IN_SP 0x1 + +/* The base of the current frame is in a frame pointer register. + This register is noted in frame_extra_info->fp_regnum. + + Note that the existance of an FP might also indicate that the + function has called alloca. */ +#define MY_FRAME_IN_FP 0x2 + +/* This flag is set to indicate that this frame is the top-most + frame. This tells frame chain not to bother trying to unwind + beyond this frame. */ +#define NO_MORE_FRAMES 0x4 + +/* Instruction macros used for analyzing the prologue */ +#define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */ +#define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */ +#define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */ +#define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */ +#define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */ +#define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */ +#define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */ +#define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */ +#define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */ +#define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */ +#define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */ +#define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */ +#define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */ +#define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */ +#define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */ +#define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */ +#define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */ +#define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */ +#define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */ +#define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */ + +#define IS_R1_ADJUSTER(x) \ + (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \ + || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \ + || IS_IXH1(x) || IS_IXW1(x)) + + +#ifdef MCORE_DEBUG +static void +mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn) +{ + if (mcore_debug) + { + printf_filtered ("MCORE: %s %08x %08x ", + commnt, (unsigned int) pc, (unsigned int) insn); + (*tm_print_insn) (pc, &tm_print_insn_info); + printf_filtered ("\n"); + } +} +#define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; } +#else /* !MCORE_DEBUG */ +#define mcore_dump_insn(a,b,c) {} +#define mcore_insn_debug(args) {} +#endif + +/* Given the address at which to insert a breakpoint (BP_ADDR), + what will that breakpoint be? + + For MCore, we have a breakpoint instruction. Since all MCore + instructions are 16 bits, this is all we need, regardless of + address. bpkt = 0x0000 */ + +unsigned char * +mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size) +{ + static char breakpoint[] = + {0x00, 0x00}; + *bp_size = 2; + return breakpoint; +} + +/* Helper function for several routines below. This funtion simply + sets up a fake, aka dummy, frame (not a _call_ dummy frame) that + we can analyze with mcore_analyze_prologue. */ + +static struct frame_info * +analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame) +{ + static struct frame_info *dummy = NULL; + + if (dummy == NULL) + { + dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info)); + dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS); + dummy->extra_info = + (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info)); + } + + dummy->next = NULL; + dummy->prev = NULL; + dummy->pc = pc; + dummy->frame = frame; + dummy->extra_info->status = 0; + dummy->extra_info->framesize = 0; + memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS); + mcore_analyze_prologue (dummy, 0, 0); + return dummy; +} + +/* Function prologues on the Motorol MCore processors consist of: + + - adjustments to the stack pointer (r1 used as scratch register) + - store word/multiples that use r0 as the base address + - making a copy of r0 into another register (a "frame" pointer) + + Note that the MCore really doesn't have a real frame pointer. + Instead, the compiler may copy the SP into a register (usually + r8) to act as an arg pointer. For our target-dependent purposes, + the frame info's "frame" member will be the beginning of the + frame. The SP could, in fact, point below this. + + The prologue ends when an instruction fails to meet either of + the first two criteria or when an FP is made. We make a special + exception for gcc. When compiling unoptimized code, gcc will + setup stack slots. We need to make sure that we skip the filling + of these stack slots as much as possible. This is only done + when SKIP_PROLOGUE is set, so that it does not mess up + backtraces. */ + +/* Analyze the prologue of frame FI to determine where registers are saved, + the end of the prologue, etc. Return the address of the first line + of "real" code (i.e., the end of the prologue). */ + +static CORE_ADDR +mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue) +{ + CORE_ADDR func_addr, func_end, addr, stop; + CORE_ADDR stack_size; + int insn, rn; + int status, fp_regnum, flags; + int framesize; + int register_offsets[NUM_REGS]; + char *name; + + /* If provided, use the PC in the frame to look up the + start of this function. */ + pc = (fi == NULL ? pc : fi->pc); + + /* Find the start of this function. */ + status = find_pc_partial_function (pc, &name, &func_addr, &func_end); + + /* If the start of this function could not be found or if the debbuger + is stopped at the first instruction of the prologue, do nothing. */ + if (status == 0) + return pc; + + /* If the debugger is entry function, give up. */ + if (func_addr == entry_point_address ()) + { + if (fi != NULL) + fi->extra_info->status |= NO_MORE_FRAMES; + return pc; + } + + /* At the start of a function, our frame is in the stack pointer. */ + flags = MY_FRAME_IN_SP; + + /* Start decoding the prologue. We start by checking two special cases: + + 1. We're about to return + 2. We're at the first insn of the prologue. + + If we're about to return, our frame has already been deallocated. + If we are stopped at the first instruction of a prologue, + then our frame has not yet been set up. */ + + /* Get the first insn from memory (all MCore instructions are 16 bits) */ + mcore_insn_debug (("MCORE: starting prologue decoding\n")); + insn = get_insn (pc); + mcore_dump_insn ("got 1: ", pc, insn); + + /* Check for return. */ + if (fi != NULL && IS_RTS (insn)) + { + mcore_insn_debug (("MCORE: got jmp r15")); + if (fi->next == NULL) + fi->frame = read_sp (); + return fi->pc; + } + + /* Check for first insn of prologue */ + if (fi != NULL && fi->pc == func_addr) + { + if (fi->next == NULL) + fi->frame = read_sp (); + return fi->pc; + } + + /* Figure out where to stop scanning */ + stop = (fi ? fi->pc : func_end); + + /* Don't walk off the end of the function */ + stop = (stop > func_end ? func_end : stop); + + /* REGISTER_OFFSETS will contain offsets, from the top of the frame + (NOT the frame pointer), for the various saved registers or -1 + if the register is not saved. */ + for (rn = 0; rn < NUM_REGS; rn++) + register_offsets[rn] = -1; + + /* Analyze the prologue. Things we determine from analyzing the + prologue include: + * the size of the frame + * where saved registers are located (and which are saved) + * FP used? */ + mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n", + (unsigned int) func_addr, (unsigned int) stop)); + + framesize = 0; + for (addr = func_addr; addr < stop; addr += 2) + { + /* Get next insn */ + insn = get_insn (addr); + mcore_dump_insn ("got 2: ", addr, insn); + + if (IS_SUBI0 (insn)) + { + int offset = 1 + ((insn >> 4) & 0x1f); + mcore_insn_debug (("MCORE: got subi r0,%d; contnuing\n", offset)); + framesize += offset; + continue; + } + else if (IS_STM (insn)) + { + /* Spill register(s) */ + int offset; + int start_register; + + /* BIG WARNING! The MCore ABI does not restrict functions + to taking only one stack allocation. Therefore, when + we save a register, we record the offset of where it was + saved relative to the current framesize. This will + then give an offset from the SP upon entry to our + function. Remember, framesize is NOT constant until + we're done scanning the prologue. */ + start_register = (insn & 0xf); + mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register)); + + for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4) + { + register_offsets[rn] = framesize - offset; + mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn, + register_offsets[rn], offset)); + } + mcore_insn_debug (("MCORE: continuing\n")); + continue; + } + else if (IS_STWx0 (insn)) + { + /* Spill register: see note for IS_STM above. */ + int imm; + + rn = (insn >> 8) & 0xf; + imm = (insn >> 4) & 0xf; + register_offsets[rn] = framesize - (imm << 2); + mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn])); + mcore_insn_debug (("MCORE: continuing\n")); + continue; + } + else if (IS_MOVx0 (insn)) + { + /* We have a frame pointer, so this prologue is over. Note + the register which is acting as the frame pointer. */ + flags |= MY_FRAME_IN_FP; + flags &= ~MY_FRAME_IN_SP; + fp_regnum = insn & 0xf; + mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum)); + + /* If we found an FP, we're at the end of the prologue. */ + mcore_insn_debug (("MCORE: end of prologue\n")); + if (skip_prologue) + continue; + + /* If we're decoding prologue, stop here. */ + addr += 2; + break; + } + else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum)) + { + /* Special case. Skip over stack slot allocs, too. */ + mcore_insn_debug (("MCORE: push arg onto stack.\n")); + continue; + } + else if (IS_LRW1 (insn) || IS_MOVI1 (insn) + || IS_BGENI1 (insn) || IS_BMASKI1 (insn)) + { + int adjust = 0; + int offset = 0; + int insn2; + + mcore_insn_debug (("MCORE: looking at large frame\n")); + if (IS_LRW1 (insn)) + { + adjust = + read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4); + } + else if (IS_MOVI1 (insn)) + adjust = (insn >> 4) & 0x7f; + else if (IS_BGENI1 (insn)) + adjust = 1 << ((insn >> 4) & 0x1f); + else /* IS_BMASKI (insn) */ + adjust = (1 << (adjust >> 4) & 0x1f) - 1; + + mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust)); + + /* May have zero or more insns which modify r1 */ + mcore_insn_debug (("MCORE: looking for r1 adjusters...\n")); + offset = 2; + insn2 = get_insn (addr + offset); + while (IS_R1_ADJUSTER (insn2)) + { + int imm; + + imm = (insn2 >> 4) & 0x1f; + mcore_dump_insn ("got 3: ", addr + offset, insn); + if (IS_ADDI1 (insn2)) + { + adjust += (imm + 1); + mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1)); + } + else if (IS_SUBI1 (insn2)) + { + adjust -= (imm + 1); + mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1)); + } + else if (IS_RSUBI1 (insn2)) + { + adjust = imm - adjust; + mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1)); + } + else if (IS_NOT1 (insn2)) + { + adjust = ~adjust; + mcore_insn_debug (("MCORE: not r1\n")); + } + else if (IS_ROTLI1 (insn2)) + { + adjust <<= imm; + mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1)); + } + else if (IS_BSETI1 (insn2)) + { + adjust |= (1 << imm); + mcore_insn_debug (("MCORE: bseti r1,%d\n", imm)); + } + else if (IS_BCLRI1 (insn2)) + { + adjust &= ~(1 << imm); + mcore_insn_debug (("MCORE: bclri r1,%d\n", imm)); + } + else if (IS_IXH1 (insn2)) + { + adjust *= 3; + mcore_insn_debug (("MCORE: ix.h r1,r1\n")); + } + else if (IS_IXW1 (insn2)) + { + adjust *= 5; + mcore_insn_debug (("MCORE: ix.w r1,r1\n")); + } + + offset += 2; + insn2 = get_insn (addr + offset); + }; + + mcore_insn_debug (("MCORE: done looking for r1 adjusters\n")); + + /* If the next insn adjusts the stack pointer, we keep everything; + if not, we scrap it and we've found the end of the prologue. */ + if (IS_SUB01 (insn2)) + { + addr += offset; + framesize += adjust; + mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust)); + mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr)); + mcore_insn_debug (("MCORE: continuing\n")); + continue; + } + + /* None of these instructions are prologue, so don't touch + anything. */ + mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n")); + break; + } + + /* This is not a prologue insn, so stop here. */ + mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n")); + break; + } + + mcore_insn_debug (("MCORE: done analyzing prologue\n")); + mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr)); + + /* Save everything we have learned about this frame into FI. */ + if (fi != NULL) + { + fi->extra_info->framesize = framesize; + fi->extra_info->fp_regnum = fp_regnum; + fi->extra_info->status = flags; + + /* Fix the frame pointer. When gcc uses r8 as a frame pointer, + it is really an arg ptr. We adjust fi->frame to be a "real" + frame pointer. */ + if (fi->next == NULL) + { + if (fi->extra_info->status & MY_FRAME_IN_SP) + fi->frame = read_sp () + framesize; + else + fi->frame = read_register (fp_regnum) + framesize; + } + + /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS + are computed relative to the top of the frame. */ + for (rn = 0; rn < NUM_REGS; rn++) + { + if (register_offsets[rn] >= 0) + { + fi->saved_regs[rn] = fi->frame - register_offsets[rn]; + mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n", + mcore_register_names[rn], fi->saved_regs[rn], + read_memory_integer (fi->saved_regs[rn], 4))); + } + } + } + + /* Return addr of first non-prologue insn. */ + return addr; +} + +/* Given a GDB frame, determine the address of the calling function's frame. + This will be used to create a new GDB frame struct, and then + INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */ + +CORE_ADDR +mcore_frame_chain (struct frame_info * fi) +{ + struct frame_info *dummy; + CORE_ADDR callers_addr; + + /* Analyze the prologue of this function. */ + if (fi->extra_info->status == 0) + mcore_analyze_prologue (fi, 0, 0); + + /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */ + if (fi->extra_info->status & NO_MORE_FRAMES) + return 0; + + /* Now that we've analyzed our prologue, we can start to ask + for information about our caller. The easiest way to do + this is to analyze our caller's prologue. + + If our caller has a frame pointer, then we need to find + the value of that register upon entry to our frame. + This value is either in fi->saved_regs[rn] if it's saved, + or it's still in a register. + + If our caller does not have a frame pointer, then his frame base + is <our base> + -<caller's frame size>. */ + dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame); + + if (dummy->extra_info->status & MY_FRAME_IN_FP) + { + int fp = dummy->extra_info->fp_regnum; + + /* Our caller has a frame pointer. */ + if (fi->saved_regs[fp] != 0) + { + /* The "FP" was saved on the stack. Don't forget to adjust + the "FP" with the framesize to get a real FP. */ + callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE) + + dummy->extra_info->framesize; + } + else + { + /* It's still in the register. Don't forget to adjust + the "FP" with the framesize to get a real FP. */ + callers_addr = read_register (fp) + dummy->extra_info->framesize; + } + } + else + { + /* Our caller does not have a frame pointer. */ + callers_addr = fi->frame + dummy->extra_info->framesize; + } + + return callers_addr; +} + +/* Skip the prologue of the function at PC. */ + +CORE_ADDR +mcore_skip_prologue (CORE_ADDR pc) +{ + CORE_ADDR func_addr, func_end; + struct symtab_and_line sal; + + /* If we have line debugging information, then the end of the + prologue should the first assembly instruction of the first + source line */ + if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) + { + sal = find_pc_line (func_addr, 0); + if (sal.end && sal.end < func_end) + return sal.end; + } + + return mcore_analyze_prologue (NULL, pc, 1); +} + +/* Return the address at which function arguments are offset. */ +CORE_ADDR +mcore_frame_args_address (struct frame_info * fi) +{ + return fi->frame - fi->extra_info->framesize; +} + +CORE_ADDR +mcore_frame_locals_address (struct frame_info * fi) +{ + return fi->frame - fi->extra_info->framesize; +} + +/* Return the frame pointer in use at address PC. */ + +void +mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset) +{ + struct frame_info *dummy = analyze_dummy_frame (pc, 0); + if (dummy->extra_info->status & MY_FRAME_IN_SP) + { + *reg = SP_REGNUM; + *offset = 0; + } + else + { + *reg = dummy->extra_info->fp_regnum; + *offset = 0; + } +} + +/* Find the value of register REGNUM in frame FI. */ + +CORE_ADDR +mcore_find_callers_reg (struct frame_info *fi, int regnum) +{ + for (; fi != NULL; fi = fi->next) + { + if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) + return generic_read_register_dummy (fi->pc, fi->frame, regnum); + else if (fi->saved_regs[regnum] != 0) + return read_memory_integer (fi->saved_regs[regnum], + REGISTER_SIZE); + } + + return read_register (regnum); +} + +/* Find the saved pc in frame FI. */ + +CORE_ADDR +mcore_frame_saved_pc (struct frame_info * fi) +{ + + if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) + return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); + else + return mcore_find_callers_reg (fi, PR_REGNUM); +} + +/* INFERIOR FUNCTION CALLS */ + +/* This routine gets called when either the user uses the "return" + command, or the call dummy breakpoint gets hit. */ + +void +mcore_pop_frame (struct frame_info *fi) +{ + int rn; + + if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) + generic_pop_dummy_frame (); + else + { + /* Write out the PC we saved. */ + write_register (PC_REGNUM, FRAME_SAVED_PC (fi)); + + /* Restore any saved registers. */ + for (rn = 0; rn < NUM_REGS; rn++) + { + if (fi->saved_regs[rn] != 0) + { + ULONGEST value; + + value = read_memory_unsigned_integer (fi->saved_regs[rn], + REGISTER_SIZE); + write_register (rn, value); + } + } + + /* Actually cut back the stack. */ + write_register (SP_REGNUM, FRAME_FP (fi)); + } + + /* Finally, throw away any cached frame information. */ + flush_cached_frames (); +} + +/* Setup arguments and PR for a call to the target. First six arguments + go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack. + + * Types with lengths greater than REGISTER_SIZE may not be split + between registers and the stack, and they must start in an even-numbered + register. Subsequent args will go onto the stack. + + * Structs may be split between registers and stack, left-aligned. + + * If the function returns a struct which will not fit into registers (it's + more than eight bytes), we must allocate for that, too. Gdb will tell + us where this buffer is (STRUCT_ADDR), and we simply place it into + FIRST_ARGREG, since the MCORE treats struct returns (of less than eight + bytes) as hidden first arguments. */ + +CORE_ADDR +mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp, + unsigned char struct_return, CORE_ADDR struct_addr) +{ + int argreg; + int argnum; + struct stack_arg + { + int len; + char *val; + } + *stack_args; + int nstack_args = 0; + + stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg)); + + argreg = FIRST_ARGREG; + + /* Align the stack. This is mostly a nop, but not always. It will be needed + if we call a function which has argument overflow. */ + sp &= ~3; + + /* If this function returns a struct which does not fit in the + return registers, we must pass a buffer to the function + which it can use to save the return value. */ + if (struct_return) + write_register (argreg++, struct_addr); + + /* FIXME: what about unions? */ + for (argnum = 0; argnum < nargs; argnum++) + { + char *val = (char *) VALUE_CONTENTS (args[argnum]); + int len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); + struct type *type = VALUE_TYPE (args[argnum]); + int olen; + + mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n", + argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct")); + /* Arguments larger than a register must start in an even + numbered register. */ + olen = len; + + if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2) + { + mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n", + len, mcore_register_names[argreg])); + argreg++; + } + + if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE) + || (TYPE_CODE (type) == TYPE_CODE_STRUCT)) + { + /* Something that will fit entirely into registers (or a struct + which may be split between registers and stack). */ + mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum)); + + if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE) + { + /* Small structs must be right aligned within the register, + the most significant bits are undefined. */ + write_register (argreg, extract_unsigned_integer (val, len)); + argreg++; + len = 0; + } + + while (len > 0 && argreg <= LAST_ARGREG) + { + write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE)); + argreg++; + val += REGISTER_SIZE; + len -= REGISTER_SIZE; + } + + /* Any remainder for the stack is noted below... */ + } + else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT + && len > REGISTER_SIZE) + { + /* All subsequent args go onto the stack. */ + mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n")); + argnum = LAST_ARGREG + 1; + } + + if (len > 0) + { + /* Note that this must be saved onto the stack */ + mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum)); + stack_args[nstack_args].val = val; + stack_args[nstack_args].len = len; + nstack_args++; + } + + } + + /* We're done with registers and stack allocation. Now do the actual + stack pushes. */ + while (nstack_args--) + { + sp -= stack_args[nstack_args].len; + write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len); + } + + /* Return adjusted stack pointer. */ + return sp; +} + +/* Store the return address for the call dummy. For MCore, we've + opted to use generic call dummies, so we simply store the + CALL_DUMMY_ADDRESS into the PR register (r15). */ + +CORE_ADDR +mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp) +{ + write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ()); + return sp; +} + +/* Setting/getting return values from functions. + + The Motorola MCore processors use r2/r3 to return anything + not larger than 32 bits. Everything else goes into a caller- + supplied buffer, which is passed in via a hidden first + argument. + + For gdb, this leaves us two routes, based on what + USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns. + If this macro returns 1, gdb will call STORE_STRUCT_RETURN and + EXTRACT_STRUCT_VALUE_ADDRESS. + + If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE + and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */ + +/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of + EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc + and TYPE is the type (which is known to be struct, union or array). */ + +int +mcore_use_struct_convention (int gcc_p, struct type *type) +{ + return (TYPE_LENGTH (type) > 8); +} + +/* Where is the return value saved? For MCore, a pointer to + this buffer was passed as a hidden first argument, so + just return that address. */ + +CORE_ADDR +mcore_extract_struct_value_address (char *regbuf) +{ + return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE); +} + +/* Given a function which returns a value of type TYPE, extract the + the function's return value and place the result into VALBUF. + REGBUF is the register contents of the target. */ + +void +mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf) +{ + /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ + /* Only getting the first byte! if len = 1, we need the last byte of + the register, not the first. */ + memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) + + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type)); +} + +/* Store the return value in VALBUF (of type TYPE) where the caller + expects to see it. + + Values less than 32 bits are stored in r2, right justified and + sign or zero extended. + + Values between 32 and 64 bits are stored in r2 (most + significant word) and r3 (least significant word, left justified). + Note that this includes structures of less than eight bytes, too. */ + +void +mcore_store_return_value (struct type *type, char *valbuf) +{ + int value_size; + int return_size; + int offset; + char *zeros; + + value_size = TYPE_LENGTH (type); + + /* Return value fits into registers. */ + return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1); + offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size); + zeros = alloca (return_size); + memset (zeros, 0, return_size); + + write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size); + write_register_bytes (offset, valbuf, value_size); +} + +/* Initialize our target-dependent "stuff" for this newly created frame. + + This includes allocating space for saved registers and analyzing + the prologue of this frame. */ + +void +mcore_init_extra_frame_info (struct frame_info *fi) +{ + if (fi->next) + fi->pc = FRAME_SAVED_PC (fi->next); + + frame_saved_regs_zalloc (fi); + + fi->extra_info = (struct frame_extra_info *) + frame_obstack_alloc (sizeof (struct frame_extra_info)); + fi->extra_info->status = 0; + fi->extra_info->framesize = 0; + + if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) + { + /* We need to setup fi->frame here because run_stack_dummy gets it wrong + by assuming it's always FP. */ + fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); + } + else + mcore_analyze_prologue (fi, 0, 0); +} + +/* Get an insturction from memory. */ + +static int +get_insn (CORE_ADDR pc) +{ + char buf[4]; + int status = read_memory_nobpt (pc, buf, 2); + if (status != 0) + return 0; + + return extract_unsigned_integer (buf, 2); +} + +void +_initialize_mcore_tdep () +{ + extern int print_insn_mcore (bfd_vma, disassemble_info *); + tm_print_insn = print_insn_mcore; + +#ifdef MCORE_DEBUG + add_show_from_set (add_set_cmd ("mcoredebug", no_class, + var_boolean, (char *) &mcore_debug, + "Set mcore debugging.\n", &setlist), + &showlist); +#endif +} diff --git a/gdb/mipsread.c b/gdb/mipsread.c index 94e70a9c4f9..a388e76d805 100644 --- a/gdb/mipsread.c +++ b/gdb/mipsread.c @@ -51,8 +51,7 @@ static void mipscoff_symfile_init PARAMS ((struct objfile *)); static void -mipscoff_symfile_read PARAMS ((struct objfile *, struct section_offsets *, - int)); +mipscoff_symfile_read PARAMS ((struct objfile *, int)); static void mipscoff_symfile_finish PARAMS ((struct objfile *)); @@ -87,9 +86,8 @@ mipscoff_symfile_init (objfile) /* Read a symbol file from a file. */ static void -mipscoff_symfile_read (objfile, section_offsets, mainline) +mipscoff_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { bfd *abfd = objfile->obfd; @@ -106,11 +104,11 @@ mipscoff_symfile_read (objfile, section_offsets, mainline) error ("Error reading symbol table: %s", bfd_errmsg (bfd_get_error ())); mdebug_build_psymtabs (objfile, &ecoff_backend (abfd)->debug_swap, - &ecoff_data (abfd)->debug_info, section_offsets); + &ecoff_data (abfd)->debug_info, objfile->section_offsets); /* Add alpha coff dynamic symbols. */ - read_alphacoff_dynamic_symtab (section_offsets, objfile); + read_alphacoff_dynamic_symtab (objfile->section_offsets, objfile); /* Install any minimal symbols that have been collected as the current minimal symbols for this objfile. */ diff --git a/gdb/monitor.c b/gdb/monitor.c index 306b78350ae..01fda27a92d 100644 --- a/gdb/monitor.c +++ b/gdb/monitor.c @@ -42,11 +42,6 @@ #include "gdbcore.h" #include "target.h" #include "wait.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif #include <signal.h> #include <ctype.h> #include "gdb_string.h" @@ -67,8 +62,6 @@ static void monitor_vsprintf PARAMS ((char *sndbuf, char *pattern, va_list args) static int readchar PARAMS ((int timeout)); -static void monitor_command PARAMS ((char *args, int fromtty)); - static void monitor_fetch_register PARAMS ((int regno)); static void monitor_store_register PARAMS ((int regno)); @@ -322,24 +315,13 @@ monitor_vsprintf (sndbuf, pattern, args) Works just like printf. */ void -#ifdef ANSI_PROTOTYPES monitor_printf_noecho (char *pattern,...) -#else -monitor_printf_noecho (va_alist) - va_dcl -#endif { va_list args; char sndbuf[2000]; int len; -#if ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - va_start (args); - pattern = va_arg (args, char *); -#endif monitor_vsprintf (sndbuf, pattern, args); @@ -366,24 +348,13 @@ monitor_printf_noecho (va_alist) printf. */ void -#ifdef ANSI_PROTOTYPES monitor_printf (char *pattern,...) -#else -monitor_printf (va_alist) - va_dcl -#endif { va_list args; char sndbuf[2000]; int len; -#ifdef ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - va_start (args); - pattern = va_arg (args, char *); -#endif monitor_vsprintf (sndbuf, pattern, args); @@ -2261,14 +2232,13 @@ monitor_stop () monitor_printf_noecho (current_monitor->stop); } -/* Put a command string, in args, out to MONITOR. Output from MONITOR - is placed on the users terminal until the prompt is seen. FIXME: We - read the characters ourseleves here cause of a nasty echo. */ +/* Put a COMMAND string out to MONITOR. Output from MONITOR is placed + in OUTPUT until the prompt is seen. FIXME: We read the characters + ourseleves here cause of a nasty echo. */ static void -monitor_command (args, from_tty) - char *args; - int from_tty; +monitor_rcmd (char *command, + struct gdb_file *outbuf) { char *p; int resp_len; @@ -2282,11 +2252,11 @@ monitor_command (args, from_tty) /* Send the command. Note that if no args were supplied, then we're just sending the monitor a newline, which is sometimes useful. */ - monitor_printf ("%s\r", (args ? args : "")); + monitor_printf ("%s\r", (command ? command : "")); resp_len = monitor_expect_prompt (buf, sizeof buf); - fputs_unfiltered (buf, gdb_stdout); /* Output the response */ + fputs_unfiltered (buf, outbuf); /* Output the response */ } /* Convert hex digit A to a number. */ @@ -2369,6 +2339,7 @@ init_base_monitor_ops (void) monitor_ops.to_notice_signals = 0; monitor_ops.to_thread_alive = 0; monitor_ops.to_stop = monitor_stop; + monitor_ops.to_rcmd = monitor_rcmd; monitor_ops.to_pid_to_exec_file = NULL; monitor_ops.to_core_file_to_sym_file = NULL; monitor_ops.to_stratum = process_stratum; @@ -2407,7 +2378,4 @@ _initialize_remote_monitors () When enabled, a hashmark \'#\' is displayed.", &setlist), &showlist); - - add_com ("monitor", class_obscure, monitor_command, - "Send a command to the debug monitor."); } diff --git a/gdb/nlmread.c b/gdb/nlmread.c index 71018ddae9d..03413b33d80 100644 --- a/gdb/nlmread.c +++ b/gdb/nlmread.c @@ -38,7 +38,7 @@ static void nlm_symfile_init PARAMS ((struct objfile *)); static void -nlm_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +nlm_symfile_read PARAMS ((struct objfile *, int)); static void nlm_symfile_finish PARAMS ((struct objfile *)); @@ -182,9 +182,8 @@ nlm_symtab_read (abfd, addr, objfile) is not currently used. */ static void -nlm_symfile_read (objfile, section_offsets, mainline) +nlm_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { bfd *abfd = objfile->obfd; @@ -197,14 +196,14 @@ nlm_symfile_read (objfile, section_offsets, mainline) /* FIXME, should take a section_offsets param, not just an offset. */ - offset = ANOFFSET (section_offsets, 0); + offset = ANOFFSET (objfile->section_offsets, 0); /* Process the NLM export records, which become the bfd's canonical symbol table. */ nlm_symtab_read (abfd, offset, objfile); - stabsect_build_psymtabs (objfile, section_offsets, mainline, ".stab", + stabsect_build_psymtabs (objfile, mainline, ".stab", ".stabstr", ".text"); mainsym = lookup_symbol ("main", NULL, VAR_NAMESPACE, NULL, NULL); @@ -252,8 +251,7 @@ static struct sym_fns nlm_sym_fns = nlm_symfile_init, /* sym_init: read initial info, setup for sym_read() */ nlm_symfile_read, /* sym_read: read a symbol file into symtab */ nlm_symfile_finish, /* sym_finish: finished with file, cleanup */ - default_symfile_offsets, - /* sym_offsets: Translate ext. to int. relocation */ + default_symfile_offsets, /* sym_offsets: Translate ext. to int. relocation */ NULL /* next: pointer to next struct sym_fns */ }; diff --git a/gdb/objfiles.c b/gdb/objfiles.c index 436dcb8bf3e..123c2308f74 100644 --- a/gdb/objfiles.c +++ b/gdb/objfiles.c @@ -74,6 +74,11 @@ int mapped_symbol_files; /* Try to use mapped symbol files */ #define TARGET_KEEP_SECTION(ASECT) 0 #endif +/* Called via bfd_map_over_sections to build up the section table that + the objfile references. The objfile contains pointers to the start + of the table (objfile->sections) and to the first location after + the end of the table (objfile->sections_end). */ + static void add_to_objfile_sections (abfd, asect, objfile_p_char) bfd *abfd; @@ -103,7 +108,19 @@ add_to_objfile_sections (abfd, asect, objfile_p_char) /* Builds a section table for OBJFILE. Returns 0 if OK, 1 on error (in which case bfd_error contains the - error). */ + error). + + Note that while we are building the table, which goes into the + psymbol obstack, we hijack the sections_end pointer to instead hold + a count of the number of sections. When bfd_map_over_sections + returns, this count is used to compute the pointer to the end of + the sections table, which then overwrites the count. + + Also note that the OFFSET and OVLY_MAPPED in each table entry + are initialized to zero. + + Also note that if anything else writes to the psymbol obstack while + we are building the table, we're pretty much hosed. */ int build_objfile_section_table (objfile) @@ -632,8 +649,7 @@ objfile_relocate (objfile, new_offsets) abfd = objfile->obfd; - for (s = objfile->sections; - s < objfile->sections_end; ++s) + ALL_OBJFILE_OSECTIONS (objfile, s) { flagword flags; @@ -944,8 +960,7 @@ find_pc_sect_section (pc, section) struct obj_section *s; struct objfile *objfile; - ALL_OBJFILES (objfile) - for (s = objfile->sections; s < objfile->sections_end; ++s) + ALL_OBJSECTIONS (objfile, s) #if defined(HPUXHPPA) if ((section == 0 || section == s->the_bfd_section) && s->addr <= pc && pc <= s->endaddr) diff --git a/gdb/objfiles.h b/gdb/objfiles.h index 96890be646d..f6fe03ca533 100644 --- a/gdb/objfiles.h +++ b/gdb/objfiles.h @@ -376,9 +376,13 @@ struct objfile struct section_offsets *section_offsets; int num_sections; - /* set of section begin and end addresses used to map pc addresses - into sections. Currently on the psymbol_obstack (which makes no - sense, but I'm not sure it's harming anything). */ + /* These pointers are used to locate the section table, which + among other thigs, is used to map pc addresses into sections. + SECTIONS points to the first entry in the table, and + SECTIONS_END points to the first location past the last entry + in the table. Currently the table is stored on the + psymbol_obstack (which makes no sense, but I'm not sure it's + harming anything). */ struct obj_section *sections, *sections_end; diff --git a/gdb/os9kread.c b/gdb/os9kread.c index 8f439c4d476..92b28246851 100644 --- a/gdb/os9kread.c +++ b/gdb/os9kread.c @@ -152,7 +152,7 @@ static void os9k_new_init PARAMS ((struct objfile *)); static void -os9k_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +os9k_symfile_read PARAMS ((struct objfile *, int)); static void os9k_symfile_finish PARAMS ((struct objfile *)); @@ -332,9 +332,8 @@ read_minimal_symbols (objfile, section_offsets) table (as opposed to a shared lib or dynamically loaded file). */ static void -os9k_symfile_read (objfile, section_offsets, mainline) +os9k_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; /* FIXME comments above */ { bfd *sym_bfd; @@ -350,11 +349,11 @@ os9k_symfile_read (objfile, section_offsets, mainline) back_to = make_cleanup (really_free_pendings, 0); make_cleanup ((make_cleanup_func) discard_minimal_symbols, 0); - read_minimal_symbols (objfile, section_offsets); + read_minimal_symbols (objfile, objfile->section_offsets); /* Now that the symbol table data of the executable file are all in core, process them and define symbols accordingly. */ - read_os9k_psymtab (section_offsets, objfile, + read_os9k_psymtab (objfile->section_offsets, objfile, DBX_TEXT_ADDR (objfile), DBX_TEXT_SIZE (objfile)); @@ -1663,8 +1662,7 @@ static struct sym_fns os9k_sym_fns = os9k_symfile_init, /* sym_init: read initial info, setup for sym_read() */ os9k_symfile_read, /* sym_read: read a symbol file into symtab */ os9k_symfile_finish, /* sym_finish: finished with file, cleanup */ - default_symfile_offsets, - /* sym_offsets: parse user's offsets to internal form */ + default_symfile_offsets, /* sym_offsets: parse user's offsets to internal form */ NULL /* next: pointer to next struct sym_fns */ }; diff --git a/gdb/osfsolib.c b/gdb/osfsolib.c index 75396085203..831fc7526ee 100644 --- a/gdb/osfsolib.c +++ b/gdb/osfsolib.c @@ -591,7 +591,7 @@ symbol_add_stub (arg) lowest_sect = bfd_get_section_by_name (so->abfd, ".text"); if (lowest_sect == NULL) bfd_map_over_sections (so->abfd, find_lowest_section, - (PTR) & lowest_sect); + (PTR) &lowest_sect); if (lowest_sect) text_addr = bfd_section_vma (so->abfd, lowest_sect) + LM_OFFSET (so); } diff --git a/gdb/partial-stab.h b/gdb/partial-stab.h index f627c8e3232..2a8c01075c8 100644 --- a/gdb/partial-stab.h +++ b/gdb/partial-stab.h @@ -47,19 +47,19 @@ switch (CUR_SYMBOL_TYPE) case N_TEXT | N_EXT: case N_NBTEXT | N_EXT: - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_TEXT); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); goto record_it; case N_DATA | N_EXT: case N_NBDATA | N_EXT: - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_DATA); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); goto record_it; case N_BSS: case N_BSS | N_EXT: case N_NBBSS | N_EXT: case N_SETV | N_EXT: /* FIXME, is this in BSS? */ - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_BSS); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_BSS); goto record_it; case N_ABS | N_EXT: @@ -86,7 +86,7 @@ switch (CUR_SYMBOL_TYPE) case N_FN_SEQ: case N_TEXT: #ifdef DBXREAD_ONLY - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_TEXT); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); SET_NAMESTRING (); if ((namestring[0] == '-' && namestring[1] == 'l') || (namestring[(nsl = strlen (namestring)) - 1] == 'o' @@ -122,7 +122,7 @@ switch (CUR_SYMBOL_TYPE) continue; case N_DATA: - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_DATA); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); goto record_it; case N_UNDF | N_EXT: @@ -204,7 +204,7 @@ switch (CUR_SYMBOL_TYPE) char *p; int prev_textlow_not_set; - valu = CUR_SYMBOL_VALUE + ANOFFSET (section_offsets, SECT_OFF_TEXT); + valu = CUR_SYMBOL_VALUE + ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); prev_textlow_not_set = textlow_not_set; @@ -266,7 +266,7 @@ switch (CUR_SYMBOL_TYPE) immediately follow the first. */ if (!pst) - pst = START_PSYMTAB (objfile, section_offsets, + pst = START_PSYMTAB (objfile, objfile->section_offsets, namestring, valu, first_so_symnum * symbol_size, objfile->global_psymbols.next, @@ -424,7 +424,7 @@ switch (CUR_SYMBOL_TYPE) switch (p[1]) { case 'S': - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_DATA); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); #ifdef STATIC_TRANSFORM_NAME namestring = STATIC_TRANSFORM_NAME (namestring); #endif @@ -435,7 +435,7 @@ switch (CUR_SYMBOL_TYPE) psymtab_language, objfile); continue; case 'G': - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_DATA); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_DATA); /* The addresses in these entries are reported to be wrong. See the code that reads 'G's for symtabs. */ add_psymbol_to_list (namestring, p - namestring, @@ -576,7 +576,7 @@ switch (CUR_SYMBOL_TYPE) continue; case 'f': - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_TEXT); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); #ifdef DBXREAD_ONLY /* Keep track of the start of the last function so we can handle end of function symbols. */ @@ -602,7 +602,7 @@ switch (CUR_SYMBOL_TYPE) if (textlow_not_set || (CUR_SYMBOL_VALUE < pst->textlow && CUR_SYMBOL_VALUE - != ANOFFSET (section_offsets, SECT_OFF_TEXT))) + != ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT))) { pst->textlow = CUR_SYMBOL_VALUE; textlow_not_set = 0; @@ -619,7 +619,7 @@ switch (CUR_SYMBOL_TYPE) are put into the global psymtab like one would expect. They're also in the minimal symbol table. */ case 'F': - CUR_SYMBOL_VALUE += ANOFFSET (section_offsets, SECT_OFF_TEXT); + CUR_SYMBOL_VALUE += ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT); #ifdef DBXREAD_ONLY /* Keep track of the start of the last function so we can handle end of function symbols. */ @@ -644,7 +644,7 @@ switch (CUR_SYMBOL_TYPE) if (textlow_not_set || (CUR_SYMBOL_VALUE < pst->textlow && CUR_SYMBOL_VALUE - != ANOFFSET (section_offsets, SECT_OFF_TEXT))) + != ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT))) { pst->textlow = CUR_SYMBOL_VALUE; textlow_not_set = 0; diff --git a/gdb/remote-array.c b/gdb/remote-array.c index 62a15d33665..932166fce0c 100644 --- a/gdb/remote-array.c +++ b/gdb/remote-array.c @@ -29,11 +29,6 @@ #include "gdbcore.h" #include "target.h" #include "wait.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif #include <ctype.h> #include <signal.h> #include <sys/types.h> @@ -200,24 +195,13 @@ Specify the serial device it is connected to (e.g. /dev/ttya)."; * printf_monitor -- send data to monitor. Works just like printf. */ static void -#ifdef ANSI_PROTOTYPES printf_monitor (char *pattern,...) -#else -printf_monitor (va_alist) - va_dcl -#endif { va_list args; char buf[PBUFSIZ]; int i; -#ifdef ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - va_start (args); - pattern = va_arg (args, char *); -#endif vsprintf (buf, pattern, args); @@ -251,12 +235,7 @@ write_monitor (data, len) * to be formatted and printed. A CR is added after each string is printed. */ static void -#ifdef ANSI_PROTOTYPES debuglogs (int level, char *pattern,...) -#else -debuglogs (va_alist) - va_dcl -#endif { va_list args; char *p; @@ -264,15 +243,7 @@ debuglogs (va_alist) char newbuf[PBUFSIZ]; int i; -#ifdef ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - int level; - va_start (args); - level = va_arg (args, int); /* get the debug level */ - pattern = va_arg (args, char *); /* get the printf style pattern */ -#endif if ((level < 0) || (level > 100)) { diff --git a/gdb/remote-mips.c b/gdb/remote-mips.c index 6d6329d6dca..c92c82fb8a4 100644 --- a/gdb/remote-mips.c +++ b/gdb/remote-mips.c @@ -35,11 +35,6 @@ #include <signal.h> #include <sys/types.h> #include <sys/stat.h> -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif /* Microsoft C's stat.h doesn't define all the POSIX file modes. */ #ifndef S_IROTH @@ -487,22 +482,11 @@ close_ports () inconsistent state. */ static NORETURN void -#ifdef ANSI_PROTOTYPES mips_error (char *string,...) -#else -mips_error (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, string); -#else - char *string; - va_start (args); - string = va_arg (args, char *); -#endif target_terminal_ours (); wrap_here (""); /* Force out any buffered output */ @@ -1279,7 +1263,7 @@ mips_request (cmd, addr, data, perr, timeout, buff) if (cmd != '\0') { if (mips_need_reply) - fatal ("mips_request: Trying to send command before reply"); + internal_error ("mips_request: Trying to send command before reply"); sprintf (buff, "0x0 %c 0x%s 0x%s", cmd, paddr_nz (addr), paddr_nz (data)); mips_send_packet (buff, 1); mips_need_reply = 1; @@ -1289,7 +1273,7 @@ mips_request (cmd, addr, data, perr, timeout, buff) return 0; if (!mips_need_reply) - fatal ("mips_request: Trying to get reply before command"); + internal_error ("mips_request: Trying to get reply before command"); mips_need_reply = 0; diff --git a/gdb/remote-os9k.c b/gdb/remote-os9k.c index 9bb927ef501..b14b460d762 100644 --- a/gdb/remote-os9k.c +++ b/gdb/remote-os9k.c @@ -41,11 +41,6 @@ #include "gdbcore.h" #include "target.h" #include "wait.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif #include <signal.h> #include "gdb_string.h" #include <sys/types.h> @@ -93,24 +88,13 @@ static char readbuf[16]; /* Send data to monitor. Works just like printf. */ static void -#ifdef ANSI_PROTOTYPES printf_monitor (char *pattern,...) -#else -printf_monitor (va_alist) - va_dcl -#endif { va_list args; char buf[200]; int i; -#ifdef ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - va_start (args); - pattern = va_arg (args, char *); -#endif vsprintf (buf, pattern, args); va_end (args); diff --git a/gdb/remote-rdi.c b/gdb/remote-rdi.c index 7a6b9a9d59d..49ed2c71623 100644 --- a/gdb/remote-rdi.c +++ b/gdb/remote-rdi.c @@ -426,6 +426,7 @@ arm_rdi_close (quitting) } closed_already = 1; inferior_pid = 0; + Adp_CloseDevice (); } } diff --git a/gdb/remote-rdp.c b/gdb/remote-rdp.c index 9b6584d874a..6701f740078 100644 --- a/gdb/remote-rdp.c +++ b/gdb/remote-rdp.c @@ -42,11 +42,6 @@ #include "value.h" #include "callback.h" #include "command.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif #include <ctype.h> #include <fcntl.h> #include "symfile.h" @@ -379,23 +374,13 @@ rdp_init (cold, tty) } -#ifdef ANSI_PROTOTYPES void send_rdp (char *template,...) -#else -void -send_rdp (char *template, va_alist) - va_dcl -#endif { char buf[200]; char *dst = buf; va_list alist; -#ifdef ANSI_PROTOTYPES va_start (alist, template); -#else - va_start (alist); -#endif while (*template) { diff --git a/gdb/remote-sim.c b/gdb/remote-sim.c index 5364066ef19..6f3af0ca321 100644 --- a/gdb/remote-sim.c +++ b/gdb/remote-sim.c @@ -243,25 +243,11 @@ gdb_os_flush_stderr (p) /* GDB version of printf_filtered callback. */ -/* VARARGS */ static void -#ifdef ANSI_PROTOTYPES gdb_os_printf_filtered (host_callback * p, const char *format,...) -#else -gdb_os_printf_filtered (p, va_alist) - host_callback *p; - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - char *format; - - va_start (args); - format = va_arg (args, char *); -#endif vfprintf_filtered (gdb_stdout, format, args); @@ -270,61 +256,31 @@ gdb_os_printf_filtered (p, va_alist) /* GDB version of error vprintf_filtered. */ -/* VARARGS */ static void -#ifdef ANSI_PROTOTYPES gdb_os_vprintf_filtered (host_callback * p, const char *format, va_list ap) -#else -gdb_os_vprintf_filtered (p, format, ap) - host_callback *p; - char *format; - va_list ap; -#endif { vfprintf_filtered (gdb_stdout, format, ap); } /* GDB version of error evprintf_filtered. */ -/* VARARGS */ static void -#ifdef ANSI_PROTOTYPES gdb_os_evprintf_filtered (host_callback * p, const char *format, va_list ap) -#else -gdb_os_evprintf_filtered (p, format, ap) - host_callback *p; - char *format; - va_list ap; -#endif { vfprintf_filtered (gdb_stderr, format, ap); } /* GDB version of error callback. */ -/* VARARGS */ static void -#ifdef ANSI_PROTOTYPES gdb_os_error (host_callback * p, const char *format,...) -#else -gdb_os_error (p, va_alist) - host_callback *p; - va_dcl -#endif { if (error_hook) (*error_hook) (); else { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - char *format; - - va_start (args); - format = va_arg (args, char *); -#endif error_begin (); vfprintf_filtered (gdb_stderr, format, args); @@ -386,7 +342,7 @@ gdbsim_store_register (regno) read_register_gen (regno, tmp); nr_bytes = sim_store_register (gdbsim_desc, regno, tmp, REGISTER_RAW_SIZE (regno)); if (nr_bytes > 0 && nr_bytes != REGISTER_RAW_SIZE (regno)) - fatal ("Register size different to expected"); + internal_error ("Register size different to expected"); if (sr_get_debug ()) { printf_filtered ("gdbsim_store_register: %d", regno); @@ -539,7 +495,7 @@ gdbsim_open (args, from_tty) strcat (arg_buf, " -E little"); break; default: - fatal ("Value of TARGET_BYTE_ORDER unknown"); + internal_error ("Value of TARGET_BYTE_ORDER unknown"); } } /* Specify the architecture of the target when it has been diff --git a/gdb/remote-st.c b/gdb/remote-st.c index 79c6b425f32..3400903503f 100644 --- a/gdb/remote-st.c +++ b/gdb/remote-st.c @@ -39,11 +39,6 @@ #include "gdbcore.h" #include "target.h" #include "wait.h" -#ifdef ANSI_PROTOTYPES -#include <stdarg.h> -#else -#include <varargs.h> -#endif #include <signal.h> #include "gdb_string.h" #include <sys/types.h> @@ -71,23 +66,12 @@ static serial_t st2000_desc; /* Send data to stdebug. Works just like printf. */ static void -#ifdef ANSI_PROTOTYPES printf_stdebug (char *pattern,...) -#else -printf_stdebug (va_alist) - va_dcl -#endif { va_list args; char buf[200]; -#ifdef ANSI_PROTOTYPES va_start (args, pattern); -#else - char *pattern; - va_start (args); - pattern = va_arg (args, char *); -#endif vsprintf (buf, pattern, args); va_end (args); diff --git a/gdb/remote-vx.c b/gdb/remote-vx.c index 787bd3924a4..8c09d2c011c 100644 --- a/gdb/remote-vx.c +++ b/gdb/remote-vx.c @@ -1026,8 +1026,8 @@ vx_wait (pid_to_wait_for, status) sleep_ms (200); /* FIXME Don't kill the network too badly */ } else if (pid != inferior_pid) - fatal ("Bad pid for debugged task: %s\n", - local_hex_string ((unsigned long) pid)); + internal_error ("Bad pid for debugged task: %s\n", + local_hex_string ((unsigned long) pid)); } while (pid == 0); diff --git a/gdb/remote.c b/gdb/remote.c index c697bd45501..5b967052503 100644 --- a/gdb/remote.c +++ b/gdb/remote.c @@ -18,188 +18,8 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* *INDENT-OFF* */ -/* Remote communication protocol. - - A debug packet whose contents are <data> - is encapsulated for transmission in the form: - - $ <data> # CSUM1 CSUM2 - - <data> must be ASCII alphanumeric and cannot include characters - '$' or '#'. If <data> starts with two characters followed by - ':', then the existing stubs interpret this as a sequence number. - - CSUM1 and CSUM2 are ascii hex representation of an 8-bit - checksum of <data>, the most significant nibble is sent first. - the hex digits 0-9,a-f are used. - - Receiver responds with: - - + - if CSUM is correct and ready for next packet - - - if CSUM is incorrect - - <data> is as follows: - Most values are encoded in ascii hex digits. Signal numbers are according - to the numbering in target.h. - - Request Packet - - set thread Hct... Set thread for subsequent operations. - c = 'c' for thread used in step and - continue; t... can be -1 for all - threads. - c = 'g' for thread used in other - operations. If zero, pick a thread, - any thread. - reply OK for success - ENN for an error. - - read registers g - reply XX....X Each byte of register data - is described by two hex digits. - Registers are in the internal order - for GDB, and the bytes in a register - are in the same order the machine uses. - or ENN for an error. - - write regs GXX..XX Each byte of register data - is described by two hex digits. - reply OK for success - ENN for an error - - write reg Pn...=r... Write register n... with value r..., - which contains two hex digits for each - byte in the register (target byte - order). - reply OK for success - ENN for an error - (not supported by all stubs). - - read mem mAA..AA,LLLL AA..AA is address, LLLL is length. - reply XX..XX XX..XX is mem contents - Can be fewer bytes than requested - if able to read only part of the data. - or ENN NN is errno - - write mem MAA..AA,LLLL:XX..XX - AA..AA is address, - LLLL is number of bytes, - XX..XX is data - reply OK for success - ENN for an error (this includes the case - where only part of the data was - written). - - write mem XAA..AA,LLLL:XX..XX - (binary) AA..AA is address, - LLLL is number of bytes, - XX..XX is binary data - reply OK for success - ENN for an error - - continue cAA..AA AA..AA is address to resume - If AA..AA is omitted, - resume at same address. - - step sAA..AA AA..AA is address to resume - If AA..AA is omitted, - resume at same address. - - continue with Csig;AA..AA Continue with signal sig (hex signal - signal number). If ;AA..AA is omitted, - resume at same address. - - step with Ssig;AA..AA Like 'C' but step not continue. - signal - - last signal ? Reply the current reason for stopping. - This is the same reply as is generated - for step or cont : SAA where AA is the - signal number. - - detach D Reply OK. - - There is no immediate reply to step or cont. - The reply comes when the machine stops. - It is SAA AA is the signal number. - - or... TAAn...:r...;n...:r...;n...:r...; - AA = signal number - n... = register number (hex) - r... = register contents - n... = `thread' - r... = thread process ID. This is - a hex integer. - n... = other string not starting - with valid hex digit. - gdb should ignore this n,r pair - and go on to the next. This way - we can extend the protocol. - or... WAA The process exited, and AA is - the exit status. This is only - applicable for certains sorts of - targets. - or... XAA The process terminated with signal - AA. - or (obsolete) NAA;tttttttt;dddddddd;bbbbbbbb - AA = signal number - tttttttt = address of symbol "_start" - dddddddd = base of data section - bbbbbbbb = base of bss section. - Note: only used by Cisco Systems - targets. The difference between this - reply and the "qOffsets" query is that - the 'N' packet may arrive spontaneously - whereas the 'qOffsets' is a query - initiated by the host debugger. - or... OXX..XX XX..XX is hex encoding of ASCII data. This - can happen at any time while the - program is running and the debugger - should continue to wait for - 'W', 'T', etc. - - thread alive TXX Find out if the thread XX is alive. - reply OK thread is still alive - ENN thread is dead - - remote restart RXX Restart the remote server - - extended ops ! Use the extended remote protocol. - Sticky -- only needs to be set once. - - kill request k - - toggle debug d toggle debug flag (see 386 & 68k stubs) - reset r reset -- see sparc stub. - reserved <other> On other requests, the stub should - ignore the request and send an empty - response ($#<checksum>). This way - we can extend the protocol and GDB - can tell whether the stub it is - talking to uses the old or the new. - search tAA:PP,MM Search backwards starting at address - AA for a match with pattern PP and - mask MM. PP and MM are 4 bytes. - Not supported by all stubs. - - general query qXXXX Request info about XXXX. - general set QXXXX=yyyy Set value of XXXX to yyyy. - query sect offs qOffsets Get section offsets. Reply is - Text=xxx;Data=yyy;Bss=zzz - - Responses can be run-length encoded to save space. A '*' means that - the next character is an ASCII encoding giving a repeat count which - stands for that many repititions of the character preceding the '*'. - The encoding is n+29, yielding a printable character where n >=3 - (which is where rle starts to win). Don't use an n > 126. - - So - "0* " means the same as "0000". */ -/* *INDENT-ON* */ - - +/* See the GDB User Guide for details of the GDB remote protocol. */ #include "defs.h" #include "gdb_string.h" @@ -401,6 +221,13 @@ static void set_remote_protocol_P_packet_cmd PARAMS ((char *args, static void show_remote_protocol_P_packet_cmd PARAMS ((char *args, int from_tty)); +static void set_remote_protocol_Z_packet_cmd PARAMS ((char *args, + int from_tty, + struct cmd_list_element * c)); + +static void show_remote_protocol_Z_packet_cmd PARAMS ((char *args, + int from_tty)); + @@ -447,17 +274,6 @@ static serial_t remote_desc = NULL; to denote that the target is in kernel mode. */ static int cisco_kernel_mode = 0; -/* This variable (available to the user via "set remotebinarydownload") - dictates whether downloads are sent in binary (via the 'X' packet). - We assume that the stub can, and attempt to do it. This will be cleared if - the stub does not understand it. This switch is still needed, though - in cases when the packet is supported in the stub, but the connection - does not allow it (i.e., 7-bit serial connection only). */ -static int remote_binary_download = 1; - -/* Have we already checked whether binary downloads work? */ -static int remote_binary_checked; - /* Maximum number of bytes to read/write at once. The value here is chosen to fill up a packet (the headers account for the 32). */ #define MAXBUFBYTES(N) (((N)-32)/2) @@ -558,7 +374,7 @@ set_packet_config_cmd (config, c) config->support = PACKET_SUPPORT_UNKNOWN; } else - fatal ("Bad enum value"); + internal_error ("Bad enum value"); } static void @@ -657,6 +473,54 @@ show_remote_protocol_P_packet_cmd (args, from_tty) show_packet_config_cmd (&remote_protocol_P); } +/* Should we try the 'Z' (set breakpoint) request? */ + +static struct packet_config remote_protocol_Z; + +static void +set_remote_protocol_Z_packet_cmd (args, from_tty, c) + char *args; + int from_tty; + struct cmd_list_element *c; +{ + set_packet_config_cmd (&remote_protocol_Z, c); +} + +static void +show_remote_protocol_Z_packet_cmd (args, from_tty) + char *args; + int from_tty; +{ + show_packet_config_cmd (&remote_protocol_Z); +} + +/* Should we try the 'X' (remote binary download) packet? + + This variable (available to the user via "set remote X-packet") + dictates whether downloads are sent in binary (via the 'X' packet). + We assume that the stub can, and attempt to do it. This will be + cleared if the stub does not understand it. This switch is still + needed, though in cases when the packet is supported in the stub, + but the connection does not allow it (i.e., 7-bit serial connection + only). */ + +static struct packet_config remote_protocol_binary_download; + +static void +set_remote_protocol_binary_download_cmd (char *args, + int from_tty, + struct cmd_list_element *c) +{ + set_packet_config_cmd (&remote_protocol_binary_download, c); +} + +static void +show_remote_protocol_binary_download_cmd (char *args, + int from_tty) +{ + show_packet_config_cmd (&remote_protocol_binary_download); +} + /* Tokens for use by the asynchronous signal handlers for SIGINT */ PTR sigint_remote_twice_token; @@ -1742,7 +1606,7 @@ remote_cisco_section_offsets (text_addr, data_addr, bss_addr, * Relocate the symbol file for a remote target. */ -static void +void remote_cisco_objfile_relocate (text_off, data_off, bss_off) bfd_signed_vma text_off; bfd_signed_vma data_off; @@ -1902,13 +1766,14 @@ serial device is attached to the remote system (e.g. /dev/ttya)."); push_target (target); /* Switch to using remote target now */ init_packet_config (&remote_protocol_P); - + init_packet_config (&remote_protocol_Z); + general_thread = -2; continue_thread = -2; /* Force remote_write_bytes to check whether target supports binary downloading. */ - remote_binary_checked = 0; + init_packet_config (&remote_protocol_binary_download); /* Without this, some commands which require an active target (such as kill) won't work. This variable serves (at least) double duty @@ -1992,13 +1857,14 @@ serial device is attached to the remote system (e.g. /dev/ttya)."); push_target (target); /* Switch to using remote target now */ init_packet_config (&remote_protocol_P); + init_packet_config (&remote_protocol_Z); general_thread = -2; continue_thread = -2; /* Force remote_write_bytes to check whether target supports binary downloading. */ - remote_binary_checked = 0; + init_packet_config (&remote_protocol_binary_download); /* If running asynchronously, set things up for telling the target to use the extended protocol. This will happen only after the @@ -2074,6 +1940,7 @@ remote_detach (args, from_tty) pop_target (); if (from_tty) puts_filtered ("Ending remote debugging.\n"); + } /* Same as remote_detach, but with async support. */ @@ -3103,41 +2970,52 @@ remote_address_masked (addr) the whole packet, since many stubs strip the eighth bit and subsequently compute a wrong checksum, which causes real havoc with remote_write_bytes. - NOTE: This can still lose if the serial line is not eight-bit clean. In - cases like this, the user should clear "remotebinarydownload". */ + NOTE: This can still lose if the serial line is not eight-bit + clean. In cases like this, the user should clear "remote + X-packet". */ + static void check_binary_download (addr) CORE_ADDR addr; { - if (remote_binary_download && !remote_binary_checked) + switch (remote_protocol_binary_download.support) { - char *buf = alloca (PBUFSIZ); - char *p; - remote_binary_checked = 1; - - p = buf; - *p++ = 'X'; - p += hexnumstr (p, (ULONGEST) addr); - *p++ = ','; - p += hexnumstr (p, (ULONGEST) 0); - *p++ = ':'; - *p = '\0'; - - putpkt_binary (buf, (int) (p - buf)); - getpkt (buf, 0); - - if (buf[0] == '\0') - remote_binary_download = 0; - } + case PACKET_DISABLE: + break; + case PACKET_ENABLE: + break; + case PACKET_SUPPORT_UNKNOWN: + { + char *buf = alloca (PBUFSIZ); + char *p; + + p = buf; + *p++ = 'X'; + p += hexnumstr (p, (ULONGEST) addr); + *p++ = ','; + p += hexnumstr (p, (ULONGEST) 0); + *p++ = ':'; + *p = '\0'; + + putpkt_binary (buf, (int) (p - buf)); + getpkt (buf, 0); - if (remote_debug) - { - if (remote_binary_download) - fprintf_unfiltered (gdb_stdlog, - "binary downloading suppported by target\n"); - else - fprintf_unfiltered (gdb_stdlog, - "binary downloading NOT suppported by target\n"); + if (buf[0] == '\0') + { + if (remote_debug) + fprintf_unfiltered (gdb_stdlog, + "binary downloading NOT suppported by target\n"); + remote_protocol_binary_download.support = PACKET_DISABLE; + } + else + { + if (remote_debug) + fprintf_unfiltered (gdb_stdlog, + "binary downloading suppported by target\n"); + remote_protocol_binary_download.support = PACKET_ENABLE; + } + break; + } } } @@ -3182,15 +3060,18 @@ remote_write_bytes (memaddr, myaddr, len) /* sprintf (buf, "M%lx,%x:", (unsigned long) memaddr, todo); */ memaddr = remote_address_masked (memaddr); p = buf; - if (remote_binary_download) + switch (remote_protocol_binary_download.support) { + case PACKET_ENABLE: *p++ = 'X'; todo = min (len, max_buf_size); - } - else - { + break; + case PACKET_DISABLE: *p++ = 'M'; todo = min (len, max_buf_size / 2); /* num bytes that will fit */ + break; + case PACKET_SUPPORT_UNKNOWN: + internal_error ("remote_write_bytes: bad switch"); } p += hexnumstr (p, (ULONGEST) memaddr); @@ -3204,50 +3085,57 @@ remote_write_bytes (memaddr, myaddr, len) /* We send target system values byte by byte, in increasing byte addresses, each byte encoded as two hex characters (or one binary character). */ - if (remote_binary_download) + switch (remote_protocol_binary_download.support) { - int escaped = 0; - for (i = 0; - (i < todo) && (i + escaped) < (max_buf_size - 2); - i++) - { - switch (myaddr[i] & 0xff) - { - case '$': - case '#': - case 0x7d: - /* These must be escaped */ - escaped++; - *p++ = 0x7d; - *p++ = (myaddr[i] & 0xff) ^ 0x20; - break; - default: - *p++ = myaddr[i] & 0xff; - break; - } - } - - if (i < todo) - { - /* Escape chars have filled up the buffer prematurely, - and we have actually sent fewer bytes than planned. - Fix-up the length field of the packet. */ - - /* FIXME: will fail if new len is a shorter string than - old len. */ - - plen += hexnumstr (plen, (ULONGEST) i); - *plen++ = ':'; - } - } - else - { - for (i = 0; i < todo; i++) - { - *p++ = tohex ((myaddr[i] >> 4) & 0xf); - *p++ = tohex (myaddr[i] & 0xf); - } - *p = '\0'; + case PACKET_ENABLE: + { + int escaped = 0; + for (i = 0; + (i < todo) && (i + escaped) < (max_buf_size - 2); + i++) + { + switch (myaddr[i] & 0xff) + { + case '$': + case '#': + case 0x7d: + /* These must be escaped */ + escaped++; + *p++ = 0x7d; + *p++ = (myaddr[i] & 0xff) ^ 0x20; + break; + default: + *p++ = myaddr[i] & 0xff; + break; + } + } + + if (i < todo) + { + /* Escape chars have filled up the buffer prematurely, + and we have actually sent fewer bytes than planned. + Fix-up the length field of the packet. */ + + /* FIXME: will fail if new len is a shorter string than + old len. */ + + plen += hexnumstr (plen, (ULONGEST) i); + *plen++ = ':'; + } + break; + } + case PACKET_DISABLE: + { + for (i = 0; i < todo; i++) + { + *p++ = tohex ((myaddr[i] >> 4) & 0xf); + *p++ = tohex (myaddr[i] & 0xf); + } + *p = '\0'; + break; + } + case PACKET_SUPPORT_UNKNOWN: + internal_error ("remote_write_bytes: bad switch"); } putpkt_binary (buf, (int) (p - buf)); @@ -4032,7 +3920,52 @@ remote_insert_breakpoint (addr, contents_cache) { #ifdef REMOTE_BREAKPOINT int val; +#endif + int bp_size; + + /* Try the "Z" packet if it is not already disabled. + If it succeeds, then set the support to PACKET_ENABLE. + If it fails, and the user has explicitly requested the Z support + then report an error, otherwise, mark it disabled and go on. */ + + if ((remote_protocol_Z.support == PACKET_ENABLE) + || (remote_protocol_Z.support == PACKET_SUPPORT_UNKNOWN)) + { + char buf[PBUFSIZ], *p = buf; + + addr = remote_address_masked (addr); + *(p++) = 'Z'; + *(p++) = '0'; + *(p++) = ','; + p += hexnumstr (p, (ULONGEST) addr); + BREAKPOINT_FROM_PC (&addr, &bp_size); + sprintf (p, ",%d", bp_size); + + putpkt (buf); + getpkt (buf, 0); + + if (buf[0] != '\0') + { + remote_protocol_Z.support = PACKET_ENABLE; + return (buf[0] == 'E'); + } + + /* The stub does not support the 'Z' request. If the user has + explicitly requested the Z support, or if the stub previously + said it supported the packet, this is an error, + otherwise, mark it disabled. */ + + else if (remote_protocol_Z.support == PACKET_ENABLE) + { + error ("Protocol error: Z packet not recognized by stub"); + } + else + { + remote_protocol_Z.support = PACKET_DISABLE; + } + } +#ifdef REMOTE_BREAKPOINT val = target_read_memory (addr, contents_cache, sizeof big_break_insn); if (val == 0) @@ -4056,6 +3989,29 @@ remote_remove_breakpoint (addr, contents_cache) CORE_ADDR addr; char *contents_cache; { + char buf[PBUFSIZ]; + int bp_size; + + if ((remote_protocol_Z.support == PACKET_ENABLE) + || (remote_protocol_Z.support == PACKET_SUPPORT_UNKNOWN)) + { + char buf[PBUFSIZ], *p = buf; + + *(p++) = 'z'; + *(p++) = '0'; + *(p++) = ','; + + addr = remote_address_masked (addr); + p += hexnumstr (p, (ULONGEST) addr); + BREAKPOINT_FROM_PC (&addr, &bp_size); + sprintf (p, ",%d", bp_size); + + putpkt (buf); + getpkt (buf, 0); + + return (buf[0] == 'E'); + } + #ifdef REMOTE_BREAKPOINT return target_write_memory (addr, contents_cache, sizeof big_break_insn); #else @@ -4063,6 +4019,107 @@ remote_remove_breakpoint (addr, contents_cache) #endif /* REMOTE_BREAKPOINT */ } +#ifdef TARGET_HAS_HARDWARE_WATCHPOINTS +int +remote_insert_watchpoint (addr, len, type) + CORE_ADDR addr; + int len; + int type; +{ + char buf[PBUFSIZ], *p; + + if (remote_protocol_Z.support == PACKET_DISABLE) + error ("Can't set hardware watchpoints without the 'Z' packet\n"); + + sprintf (buf, "Z%x,", type + 2 ); + p = strchr (buf, '\0'); + addr = remote_address_masked (addr); + p += hexnumstr (p, (ULONGEST) addr); + sprintf (p, ",%lx", len); + + putpkt (buf); + getpkt (buf, 0); + + if (buf[0] == '\0' || buf [0] == 'E') + return -1; + + return 0; +} + +int +remote_remove_watchpoint (addr, len, type) + CORE_ADDR addr; + int len; + int type; +{ + char buf[PBUFSIZ], *p; + + sprintf (buf, "z%x,", type + 2 ); + p = strchr (buf, '\0'); + addr = remote_address_masked (addr); + p += hexnumstr (p, (ULONGEST) addr); + sprintf (p, ",%lx", len); + putpkt (buf); + getpkt (buf, 0); + + if (buf[0] == '\0' || buf [0] == 'E') + return -1; + + return 0; +} + +int +remote_insert_hw_breakpoint (addr, len) + CORE_ADDR addr; + int len; +{ + char buf[PBUFSIZ], *p = buf; + + if (remote_protocol_Z.support == PACKET_DISABLE) + error ("Can't set hardware breakpoints without the 'Z' packet\n"); + + *(p++) = 'Z'; + *(p++) = '1'; + *(p++) = ','; + + addr = remote_address_masked (addr); + p += hexnumstr (p, (ULONGEST) addr); + *p = '\0'; + + putpkt (buf); + getpkt (buf, 0); + + if (buf[0] == '\0' || buf [0] == 'E') + return -1; + + return 0; +} + +int +remote_remove_hw_breakpoint (addr, len) + CORE_ADDR addr; + int len; +{ + char buf[PBUFSIZ], *p = buf; + + *(p++) = 'z'; + *(p++) = '1'; + *(p++) = ','; + + addr = remote_address_masked (addr); + p += hexnumstr (p, (ULONGEST) addr); + *p = '\0'; + + putpkt(buf); + getpkt (buf, 0); + + if (buf[0] == '\0' || buf [0] == 'E') + return -1; + + return 0; +} +#endif + /* Some targets are only capable of doing downloads, and afterwards they switch to the remote serial protocol. This function provides a clean way to get from the download target to the remote target. @@ -4287,6 +4344,59 @@ remote_query (query_type, buf, outbuf, bufsiz) } static void +remote_rcmd (char *command, + struct gdb_file *outbuf) +{ + int i; + char *buf = alloca (PBUFSIZ); + char *p = buf; + + if (!remote_desc) + error ("remote rcmd is only available after target open"); + + /* The query prefix */ + strcpy (buf, "qRcmd,"); + p = strchr (buf, '\0'); + + if ((strlen (buf) + strlen (command) * 2 + 8/*misc*/) > PBUFSIZ) + error ("\"monitor\" command ``%s'' is too long\n", command); + + /* Encode the actual command */ + for (i = 0; command[i]; i++) + { + *p++ = tohex ((command[i] >> 4) & 0xf); + *p++ = tohex (command[i] & 0xf); + } + *p = '\0'; + + if (putpkt (buf) < 0) + error ("Communication problem with target\n"); + + /* get/display the response */ + while (1) + { + /* XXX - see also tracepoint.c:remote_get_noisy_reply() */ + buf[0] = '\0'; + getpkt (buf, 0); + if (buf[0] == '\0') + error ("Target does not support this command\n"); + if (buf[0] == 'O' && buf[1] != 'K') + { + remote_console_output (buf + 1); /* 'O' message from stub */ + continue; + } + if (strcmp (buf, "OK") == 0) + break; + for (p = buf; p[0] != '\0' && p[1] != '\0'; p += 2) + { + char c = (fromhex (p[0]) << 4) + fromhex (p[1]); + fputc_unfiltered (c, outbuf); + } + break; + } +} + +static void packet_command (args, from_tty) char *args; int from_tty; @@ -4498,6 +4608,7 @@ Specify the serial device it is connected to (e.g. /dev/ttya)."; remote_ops.to_find_new_threads = remote_threads_info; remote_ops.to_stop = remote_stop; remote_ops.to_query = remote_query; + remote_ops.to_rcmd = remote_rcmd; remote_ops.to_stratum = process_stratum; remote_ops.to_has_all_memory = 1; remote_ops.to_has_memory = 1; @@ -4623,13 +4734,14 @@ device is attached to the remote system (e.g. host:port)."); push_target (&remote_cisco_ops); /* Switch to using cisco target now */ init_packet_config (&remote_protocol_P); + init_packet_config (&remote_protocol_Z); general_thread = -2; continue_thread = -2; /* Force remote_write_bytes to check whether target supports binary downloading. */ - remote_binary_checked = 0; + init_packet_config (&remote_protocol_binary_download); /* Without this, some commands which require an active target (such as kill) won't work. This variable serves (at least) double duty @@ -4952,6 +5064,7 @@ Specify the serial device it is connected to (e.g. /dev/ttya)."; remote_async_ops.to_find_new_threads = remote_threads_info; remote_async_ops.to_stop = remote_stop; remote_async_ops.to_query = remote_query; + remote_async_ops.to_rcmd = remote_rcmd; remote_async_ops.to_stratum = process_stratum; remote_async_ops.to_has_all_memory = 1; remote_async_ops.to_has_memory = 1; @@ -5088,11 +5201,20 @@ in a memory packet.\n", &setlist), &showlist); + add_packet_config_cmd (&remote_protocol_binary_download, + "X", "binary-download", + set_remote_protocol_binary_download_cmd, + show_remote_protocol_binary_download_cmd, + &remote_set_cmdlist, &remote_show_cmdlist); +#if 0 + /* XXXX - should ``set remotebinarydownload'' be retained for + compatibility. */ add_show_from_set (add_set_cmd ("remotebinarydownload", no_class, var_boolean, (char *) &remote_binary_download, "Set binary downloads.\n", &setlist), &showlist); +#endif add_info ("remote-process", remote_info_process, "Query the remote system for process info."); @@ -5101,4 +5223,9 @@ in a memory packet.\n", set_remote_protocol_P_packet_cmd, show_remote_protocol_P_packet_cmd, &remote_set_cmdlist, &remote_show_cmdlist); + + add_packet_config_cmd (&remote_protocol_Z, "Z", "breakpoint", + set_remote_protocol_Z_packet_cmd, + show_remote_protocol_Z_packet_cmd, + &remote_set_cmdlist, &remote_show_cmdlist); } diff --git a/gdb/ser-pipe.c b/gdb/ser-pipe.c index 3c37f141ae2..4941845c020 100644 --- a/gdb/ser-pipe.c +++ b/gdb/ser-pipe.c @@ -23,7 +23,9 @@ #include "defs.h" #include "serial.h" #include <sys/types.h> +#ifdef HAVE_SYS_WAIT_H #include <sys/wait.h> +#endif #include <sys/socket.h> #include <sys/time.h> #include <fcntl.h> @@ -70,7 +72,7 @@ pipe_open (scb, name) serial_t scb; const char *name; { -#if !defined(O_NONBLOCK) || !defined(F_GETFL) || !defined(F_SETFL) +#if !defined(O_NONBLOCK) || !defined(F_GETFL) || !defined(F_SETFL) || !HAVE_SOCKETPAIR return -1; #else struct pipe_state *state; diff --git a/gdb/serial.c b/gdb/serial.c index dca48bcb3e1..9dd316f1dbe 100644 --- a/gdb/serial.c +++ b/gdb/serial.c @@ -492,27 +492,12 @@ connect_command (args, fromtty) } #endif /* 0 */ -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES serial_printf (serial_t desc, const char *format,...) -#else -serial_printf (va_alist) - va_dcl -#endif { va_list args; char *buf; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - serial_t desc; - char *format; - - va_start (args); - desc = va_arg (args, serial_t); - format = va_arg (args, char *); -#endif vasprintf (&buf, format, args); SERIAL_WRITE (desc, buf, strlen (buf)); diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c index 72c6cbd2b9d..38d7929c5ee 100644 --- a/gdb/sh-tdep.c +++ b/gdb/sh-tdep.c @@ -620,7 +620,7 @@ sh_target_architecture_hook (ap) } } - fatal ("Architecture `%s' unreconized", ap->printable_name); + internal_error ("Architecture `%s' unreconized", ap->printable_name); } /* Print the registers in a form similar to the E7000 */ diff --git a/gdb/solib.c b/gdb/solib.c index 65b35e74fc0..cfb230d6fb1 100644 --- a/gdb/solib.c +++ b/gdb/solib.c @@ -1033,7 +1033,7 @@ symbol_add_stub (arg) lowest_sect = bfd_get_section_by_name (so->abfd, ".text"); if (lowest_sect == NULL) bfd_map_over_sections (so->abfd, find_lowest_section, - (PTR) & lowest_sect); + (PTR) &lowest_sect); if (lowest_sect) text_addr = bfd_section_vma (so->abfd, lowest_sect) + (CORE_ADDR) LM_ADDR (so); diff --git a/gdb/somread.c b/gdb/somread.c index bbbaa98a7c0..861f34d7549 100644 --- a/gdb/somread.c +++ b/gdb/somread.c @@ -43,7 +43,7 @@ static void som_new_init PARAMS ((struct objfile *)); static void -som_symfile_read PARAMS ((struct objfile *, struct section_offsets *, int)); +som_symfile_read PARAMS ((struct objfile *, int)); static void som_symfile_finish PARAMS ((struct objfile *)); @@ -53,7 +53,7 @@ som_symtab_read PARAMS ((bfd *, struct objfile *, struct section_offsets *)); static struct section_offsets * - som_symfile_offsets PARAMS ((struct objfile *, CORE_ADDR)); +som_symfile_offsets PARAMS ((struct objfile *, CORE_ADDR)); /* FIXME: These should really be in a common header somewhere */ @@ -356,9 +356,8 @@ som_symtab_read (abfd, objfile, section_offsets) capability even for files compiled without -g. */ static void -som_symfile_read (objfile, section_offsets, mainline) +som_symfile_read (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; { bfd *abfd = objfile->obfd; @@ -386,20 +385,20 @@ som_symfile_read (objfile, section_offsets, mainline) actually scan the DNTT. It does scan the linker symbol table and thus build up a "minimal symbol table". */ - som_symtab_read (abfd, objfile, section_offsets); + som_symtab_read (abfd, objfile, objfile->section_offsets); /* Now read information from the stabs debug sections. This is a no-op for SOM. Perhaps it is intended for some kind of mixed STABS/SOM situation? */ - stabsect_build_psymtabs (objfile, section_offsets, mainline, + stabsect_build_psymtabs (objfile, mainline, "$GDB_SYMBOLS$", "$GDB_STRINGS$", "$TEXT$"); /* Now read the native debug information. This builds the psymtab. This used to be done via a scan of the DNTT, but is now done via the PXDB-built quick-lookup tables together with a scan of the GNTT. See hp-psymtab-read.c. */ - hpread_build_psymtabs (objfile, section_offsets, mainline); + hpread_build_psymtabs (objfile, objfile->section_offsets, mainline); /* Install any minimal symbols that have been collected as the current minimal symbols for this objfile. diff --git a/gdb/source.c b/gdb/source.c index ca1dddae0ed..928782cc913 100644 --- a/gdb/source.c +++ b/gdb/source.c @@ -205,7 +205,7 @@ select_source_symtab (s) { if (cs_pst->readin) { - fatal ("Internal: select_source_symtab: readin pst found and no symtabs."); + internal_error ("select_source_symtab: readin pst found and no symtabs."); } else { diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c index c3ff9520279..04e3d4d9029 100644 --- a/gdb/sparc-tdep.c +++ b/gdb/sparc-tdep.c @@ -454,7 +454,7 @@ setup_arbitrary_frame (argc, argv) frame = create_new_frame (argv[0], 0); if (!frame) - fatal ("internal: create_new_frame returned invalid frame"); + internal_error ("create_new_frame returned invalid frame"); frame->bottom = argv[1]; frame->pc = FRAME_SAVED_PC (frame); @@ -974,7 +974,7 @@ sparc_frame_find_saved_regs (fi, saved_regs_addr) CORE_ADDR frame_addr = FRAME_FP (fi); if (!fi) - fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); + internal_error ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); memset (saved_regs_addr, 0, sizeof (*saved_regs_addr)); @@ -1735,7 +1735,7 @@ gdb_print_insn_sparc (memaddr, info) disassemble_info *info; { /* It's necessary to override mach again because print_insn messes it up. */ - info->mach = TM_PRINT_INSN_MACH; + info->mach = TARGET_ARCHITECTURE->mach; return print_insn_sparc (memaddr, info); } diff --git a/gdb/stabsread.h b/gdb/stabsread.h index 013a99a7859..648eea3ab6c 100644 --- a/gdb/stabsread.h +++ b/gdb/stabsread.h @@ -208,7 +208,6 @@ process_one_symbol PARAMS ((int, int, CORE_ADDR, char *, extern void elfstab_build_psymtabs PARAMS ((struct objfile * objfile, - struct section_offsets * section_offsets, int mainline, file_ptr staboff, unsigned int stabsize, file_ptr stabstroffset, @@ -216,7 +215,6 @@ extern void elfstab_build_psymtabs extern void coffstab_build_psymtabs PARAMS ((struct objfile * objfile, - struct section_offsets * section_offsets, int mainline, CORE_ADDR textaddr, unsigned int textsize, struct stab_section_list * stabs, @@ -225,7 +223,6 @@ extern void coffstab_build_psymtabs extern void stabsect_build_psymtabs PARAMS ((struct objfile * objfile, - struct section_offsets * section_offsets, int mainline, char *stab_name, char *stabstr_name, diff --git a/gdb/symfile.c b/gdb/symfile.c index 42d9e4f867e..c951866b732 100644 --- a/gdb/symfile.c +++ b/gdb/symfile.c @@ -483,14 +483,16 @@ default_symfile_offsets (objfile, addr) /* Process a symbol file, as either the main file or as a dynamically loaded file. - NAME is the file name (which will be tilde-expanded and made - absolute herein) (but we don't free or modify NAME itself). - FROM_TTY says how verbose to be. MAINLINE specifies whether this - is the main symbol file, or whether it's an extra symbol file such - as dynamically loaded code. If !mainline, ADDR is the address - where the text segment was loaded. If VERBO, the caller has printed - a verbose message about the symbol reading (and complaints can be - more terse about it). */ + OBJFILE is where the symbols are to be read from. + + ADDR is the address where the text segment was loaded, unless the + objfile is the main symbol file, in which case it is zero. + + MAINLINE is nonzero if this is the main symbol file, or zero if + it's an extra symbol file such as dynamically loaded code. + + VERBO is nonzero if the caller has printed a verbose message about + the symbol reading (and complaints can be more terse about it). */ void syms_from_objfile (objfile, addr, mainline, verbo) @@ -546,7 +548,7 @@ syms_from_objfile (objfile, addr, mainline, verbo) lowest_sect = bfd_get_section_by_name (objfile->obfd, ".text"); if (lowest_sect == NULL) bfd_map_over_sections (objfile->obfd, find_lowest_section, - (PTR) & lowest_sect); + (PTR) &lowest_sect); if (lowest_sect == NULL) warning ("no loadable sections found in added symbol-file %s", @@ -557,7 +559,7 @@ syms_from_objfile (objfile, addr, mainline, verbo) warning ("Lowest section in %s is %s at 0x%lx", objfile->name, bfd_section_name (objfile->obfd, lowest_sect), - (unsigned long) bfd_section_vma (objfile->obfd, lowest_sect)); + (unsigned long) bfd_section_vma (objfile->obfd, lowest_sect)); if (lowest_sect) addr -= bfd_section_vma (objfile->obfd, lowest_sect); @@ -587,7 +589,7 @@ syms_from_objfile (objfile, addr, mainline, verbo) Section offsets are built similarly, except that they are built by adding addr in all cases because there is no clear mapping from section_offsets into actual sections. Note that solib.c - has a different algorythm for finding section offsets. + has a different algorithm for finding section offsets. These should probably all be collapsed into some target independent form of shared library support. FIXME. */ @@ -596,7 +598,7 @@ syms_from_objfile (objfile, addr, mainline, verbo) { struct obj_section *s; - for (s = objfile->sections; s < objfile->sections_end; ++s) + ALL_OBJFILE_OSECTIONS (objfile, s) { s->addr -= s->offset; s->addr += addr; @@ -607,7 +609,7 @@ syms_from_objfile (objfile, addr, mainline, verbo) } #endif /* not IBM6000_TARGET */ - (*objfile->sf->sym_read) (objfile, section_offsets, mainline); + (*objfile->sf->sym_read) (objfile, mainline); if (!have_partial_symbols () && !have_full_symbols ()) { @@ -633,10 +635,10 @@ syms_from_objfile (objfile, addr, mainline, verbo) discard_cleanups (old_chain); -/* Call this after reading in a new symbol table to give target dependant code - a crack at the new symbols. For instance, this could be used to update the - values of target-specific symbols GDB needs to keep track of (such as - _sigtramp, or whatever). */ + /* Call this after reading in a new symbol table to give target + dependant code a crack at the new symbols. For instance, this + could be used to update the values of target-specific symbols GDB + needs to keep track of (such as _sigtramp, or whatever). */ TARGET_SYMFILE_POSTREAD (objfile); } @@ -1506,7 +1508,7 @@ reread_symbols () /* The "mainline" parameter is a hideous hack; I think leaving it zero is OK since dbxread.c also does what it needs to do if objfile->global_psymbols.size is 0. */ - (*objfile->sf->sym_read) (objfile, objfile->section_offsets, 0); + (*objfile->sf->sym_read) (objfile, 0); if (!have_partial_symbols () && !have_full_symbols ()) { wrap_here (""); diff --git a/gdb/symfile.h b/gdb/symfile.h index 6390d1ab04f..875f1b5dc42 100644 --- a/gdb/symfile.h +++ b/gdb/symfile.h @@ -88,7 +88,7 @@ struct sym_fns symbol file (e.g. shared library or dynamically loaded file) is being read. */ - void (*sym_read) PARAMS ((struct objfile *, struct section_offsets *, int)); + void (*sym_read) PARAMS ((struct objfile *, int)); /* Called when we are finished with an objfile. Should do all cleanup that is specific to the object file format for the particular objfile. */ @@ -116,7 +116,7 @@ struct sym_fns do anything special. */ extern struct section_offsets * - default_symfile_offsets PARAMS ((struct objfile * objfile, CORE_ADDR addr)); +default_symfile_offsets PARAMS ((struct objfile * objfile, CORE_ADDR addr)); extern void diff --git a/gdb/symm-nat.c b/gdb/symm-nat.c index d1ad8637c06..1ec3a6004a4 100644 --- a/gdb/symm-nat.c +++ b/gdb/symm-nat.c @@ -543,7 +543,7 @@ child_wait (pid, status) } break; case PTS_WATCHPT_HIT: - fatal ("PTS_WATCHPT_HIT\n"); + internal_error ("PTS_WATCHPT_HIT\n"); break; default: /* stopped by signal */ @@ -873,8 +873,8 @@ _initialize_symm_nat () rv = mptrace (XPT_MPDEBUGGER, 0, 0, 0); if (-1 == rv) { - fatal ("_initialize_symm_nat(): mptrace(XPT_MPDEBUGGER): %s", - safe_strerror (errno)); + internal_error ("_initialize_symm_nat(): mptrace(XPT_MPDEBUGGER): %s", + safe_strerror (errno)); } /* @@ -891,14 +891,14 @@ _initialize_symm_nat () rv = sigaddset (&set, SIGCHLD); if (-1 == rv) { - fatal ("_initialize_symm_nat(): sigaddset(SIGCHLD): %s", - safe_strerror (errno)); + internal_error ("_initialize_symm_nat(): sigaddset(SIGCHLD): %s", + safe_strerror (errno)); } rv = sigprocmask (SIG_BLOCK, &set, (sigset_t *) NULL); if (-1 == rv) { - fatal ("_initialize_symm_nat(): sigprocmask(SIG_BLOCK): %s", - safe_strerror (errno)); + internal_error ("_initialize_symm_nat(): sigprocmask(SIG_BLOCK): %s", + safe_strerror (errno)); } sact.sa_handler = sigchld_handler; @@ -907,8 +907,8 @@ _initialize_symm_nat () rv = sigaction (SIGCHLD, &sact, (struct sigaction *) NULL); if (-1 == rv) { - fatal ("_initialize_symm_nat(): sigaction(SIGCHLD): %s", - safe_strerror (errno)); + internal_error ("_initialize_symm_nat(): sigaction(SIGCHLD): %s", + safe_strerror (errno)); } #endif } diff --git a/gdb/target.c b/gdb/target.c index 3c18b40c746..d0b94829ac0 100644 --- a/gdb/target.c +++ b/gdb/target.c @@ -444,6 +444,7 @@ cleanup_target (t) de_fault (to_thread_alive, (int (*)PARAMS ((int))) target_ignore); de_fault (to_stop, (void (*)PARAMS ((void))) target_ignore); de_fault (to_query, (int (*)PARAMS ((int /*char */ , char *, char *, int *))) target_ignore); + de_fault (to_rcmd, (void (*) (char *, struct gdb_file *)) tcomplain); de_fault (to_enable_exception_callback, (struct symtab_and_line * (*)PARAMS ((enum exception_event_kind, int))) nosupport_runtime); de_fault (to_get_current_exception_event, (struct exception_event_record * (*)PARAMS ((void))) nosupport_runtime); @@ -527,6 +528,7 @@ update_current_target () INHERIT (to_find_new_threads, t); INHERIT (to_stop, t); INHERIT (to_query, t); + INHERIT (to_rcmd, t); INHERIT (to_enable_exception_callback, t); INHERIT (to_get_current_exception_event, t); INHERIT (to_pid_to_exec_file, t); @@ -1937,7 +1939,7 @@ debug_to_open (args, from_tty) { debug_target.to_open (args, from_tty); - fprintf_unfiltered (gdb_stderr, "target_open (%s, %d)\n", args, from_tty); + fprintf_unfiltered (gdb_stdlog, "target_open (%s, %d)\n", args, from_tty); } static void @@ -1946,7 +1948,7 @@ debug_to_close (quitting) { debug_target.to_close (quitting); - fprintf_unfiltered (gdb_stderr, "target_close (%d)\n", quitting); + fprintf_unfiltered (gdb_stdlog, "target_close (%d)\n", quitting); } static void @@ -1956,7 +1958,7 @@ debug_to_attach (args, from_tty) { debug_target.to_attach (args, from_tty); - fprintf_unfiltered (gdb_stderr, "target_attach (%s, %d)\n", args, from_tty); + fprintf_unfiltered (gdb_stdlog, "target_attach (%s, %d)\n", args, from_tty); } @@ -1966,7 +1968,7 @@ debug_to_post_attach (pid) { debug_target.to_post_attach (pid); - fprintf_unfiltered (gdb_stderr, "target_post_attach (%d)\n", pid); + fprintf_unfiltered (gdb_stdlog, "target_post_attach (%d)\n", pid); } static void @@ -1976,7 +1978,7 @@ debug_to_require_attach (args, from_tty) { debug_target.to_require_attach (args, from_tty); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_require_attach (%s, %d)\n", args, from_tty); } @@ -1987,7 +1989,7 @@ debug_to_detach (args, from_tty) { debug_target.to_detach (args, from_tty); - fprintf_unfiltered (gdb_stderr, "target_detach (%s, %d)\n", args, from_tty); + fprintf_unfiltered (gdb_stdlog, "target_detach (%s, %d)\n", args, from_tty); } static void @@ -1998,7 +2000,7 @@ debug_to_require_detach (pid, args, from_tty) { debug_target.to_require_detach (pid, args, from_tty); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_require_detach (%d, %s, %d)\n", pid, args, from_tty); } @@ -2010,7 +2012,7 @@ debug_to_resume (pid, step, siggnal) { debug_target.to_resume (pid, step, siggnal); - fprintf_unfiltered (gdb_stderr, "target_resume (%d, %s, %s)\n", pid, + fprintf_unfiltered (gdb_stdlog, "target_resume (%d, %s, %s)\n", pid, step ? "step" : "continue", target_signal_to_name (siggnal)); } @@ -2024,40 +2026,40 @@ debug_to_wait (pid, status) retval = debug_target.to_wait (pid, status); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_wait (%d, status) = %d, ", pid, retval); - fprintf_unfiltered (gdb_stderr, "status->kind = "); + fprintf_unfiltered (gdb_stdlog, "status->kind = "); switch (status->kind) { case TARGET_WAITKIND_EXITED: - fprintf_unfiltered (gdb_stderr, "exited, status = %d\n", + fprintf_unfiltered (gdb_stdlog, "exited, status = %d\n", status->value.integer); break; case TARGET_WAITKIND_STOPPED: - fprintf_unfiltered (gdb_stderr, "stopped, signal = %s\n", + fprintf_unfiltered (gdb_stdlog, "stopped, signal = %s\n", target_signal_to_name (status->value.sig)); break; case TARGET_WAITKIND_SIGNALLED: - fprintf_unfiltered (gdb_stderr, "signalled, signal = %s\n", + fprintf_unfiltered (gdb_stdlog, "signalled, signal = %s\n", target_signal_to_name (status->value.sig)); break; case TARGET_WAITKIND_LOADED: - fprintf_unfiltered (gdb_stderr, "loaded\n"); + fprintf_unfiltered (gdb_stdlog, "loaded\n"); break; case TARGET_WAITKIND_FORKED: - fprintf_unfiltered (gdb_stderr, "forked\n"); + fprintf_unfiltered (gdb_stdlog, "forked\n"); break; case TARGET_WAITKIND_VFORKED: - fprintf_unfiltered (gdb_stderr, "vforked\n"); + fprintf_unfiltered (gdb_stdlog, "vforked\n"); break; case TARGET_WAITKIND_EXECD: - fprintf_unfiltered (gdb_stderr, "execd\n"); + fprintf_unfiltered (gdb_stdlog, "execd\n"); break; case TARGET_WAITKIND_SPURIOUS: - fprintf_unfiltered (gdb_stderr, "spurious\n"); + fprintf_unfiltered (gdb_stdlog, "spurious\n"); break; default: - fprintf_unfiltered (gdb_stderr, "unknown???\n"); + fprintf_unfiltered (gdb_stdlog, "unknown???\n"); break; } @@ -2071,7 +2073,7 @@ debug_to_post_wait (pid, status) { debug_target.to_post_wait (pid, status); - fprintf_unfiltered (gdb_stderr, "target_post_wait (%d, %d)\n", + fprintf_unfiltered (gdb_stdlog, "target_post_wait (%d, %d)\n", pid, status); } @@ -2081,13 +2083,13 @@ debug_to_fetch_registers (regno) { debug_target.to_fetch_registers (regno); - fprintf_unfiltered (gdb_stderr, "target_fetch_registers (%s)", + fprintf_unfiltered (gdb_stdlog, "target_fetch_registers (%s)", regno != -1 ? REGISTER_NAME (regno) : "-1"); if (regno != -1) - fprintf_unfiltered (gdb_stderr, " = 0x%x %d", + fprintf_unfiltered (gdb_stdlog, " = 0x%x %d", (unsigned long) read_register (regno), read_register (regno)); - fprintf_unfiltered (gdb_stderr, "\n"); + fprintf_unfiltered (gdb_stdlog, "\n"); } static void @@ -2097,12 +2099,12 @@ debug_to_store_registers (regno) debug_target.to_store_registers (regno); if (regno >= 0 && regno < NUM_REGS) - fprintf_unfiltered (gdb_stderr, "target_store_registers (%s) = 0x%x %d\n", + fprintf_unfiltered (gdb_stdlog, "target_store_registers (%s) = 0x%x %d\n", REGISTER_NAME (regno), (unsigned long) read_register (regno), (unsigned long) read_register (regno)); else - fprintf_unfiltered (gdb_stderr, "target_store_registers (%d)\n", regno); + fprintf_unfiltered (gdb_stdlog, "target_store_registers (%d)\n", regno); } static void @@ -2110,7 +2112,7 @@ debug_to_prepare_to_store () { debug_target.to_prepare_to_store (); - fprintf_unfiltered (gdb_stderr, "target_prepare_to_store ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_prepare_to_store ()\n"); } static int @@ -2125,7 +2127,7 @@ debug_to_xfer_memory (memaddr, myaddr, len, write, target) retval = debug_target.to_xfer_memory (memaddr, myaddr, len, write, target); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_xfer_memory (0x%x, xxx, %d, %s, xxx) = %d", (unsigned int) memaddr, /* possable truncate long long */ len, write ? "write" : "read", retval); @@ -2136,16 +2138,16 @@ debug_to_xfer_memory (memaddr, myaddr, len, write, target) { int i; - fputs_unfiltered (", bytes =", gdb_stderr); + fputs_unfiltered (", bytes =", gdb_stdlog); for (i = 0; i < retval; i++) { if ((((long) &(myaddr[i])) & 0xf) == 0) - fprintf_unfiltered (gdb_stderr, "\n"); - fprintf_unfiltered (gdb_stderr, " %02x", myaddr[i] & 0xff); + fprintf_unfiltered (gdb_stdlog, "\n"); + fprintf_unfiltered (gdb_stdlog, " %02x", myaddr[i] & 0xff); } } - fputc_unfiltered ('\n', gdb_stderr); + fputc_unfiltered ('\n', gdb_stdlog); return retval; } @@ -2156,7 +2158,7 @@ debug_to_files_info (target) { debug_target.to_files_info (target); - fprintf_unfiltered (gdb_stderr, "target_files_info (xxx)\n"); + fprintf_unfiltered (gdb_stdlog, "target_files_info (xxx)\n"); } static int @@ -2168,7 +2170,7 @@ debug_to_insert_breakpoint (addr, save) retval = debug_target.to_insert_breakpoint (addr, save); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_insert_breakpoint (0x%x, xxx) = %d\n", (unsigned long) addr, retval); return retval; @@ -2183,7 +2185,7 @@ debug_to_remove_breakpoint (addr, save) retval = debug_target.to_remove_breakpoint (addr, save); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_remove_breakpoint (0x%x, xxx) = %d\n", (unsigned long) addr, retval); return retval; @@ -2194,7 +2196,7 @@ debug_to_terminal_init () { debug_target.to_terminal_init (); - fprintf_unfiltered (gdb_stderr, "target_terminal_init ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_terminal_init ()\n"); } static void @@ -2202,7 +2204,7 @@ debug_to_terminal_inferior () { debug_target.to_terminal_inferior (); - fprintf_unfiltered (gdb_stderr, "target_terminal_inferior ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_terminal_inferior ()\n"); } static void @@ -2210,7 +2212,7 @@ debug_to_terminal_ours_for_output () { debug_target.to_terminal_ours_for_output (); - fprintf_unfiltered (gdb_stderr, "target_terminal_ours_for_output ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_terminal_ours_for_output ()\n"); } static void @@ -2218,7 +2220,7 @@ debug_to_terminal_ours () { debug_target.to_terminal_ours (); - fprintf_unfiltered (gdb_stderr, "target_terminal_ours ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_terminal_ours ()\n"); } static void @@ -2228,7 +2230,7 @@ debug_to_terminal_info (arg, from_tty) { debug_target.to_terminal_info (arg, from_tty); - fprintf_unfiltered (gdb_stderr, "target_terminal_info (%s, %d)\n", arg, + fprintf_unfiltered (gdb_stdlog, "target_terminal_info (%s, %d)\n", arg, from_tty); } @@ -2237,7 +2239,7 @@ debug_to_kill () { debug_target.to_kill (); - fprintf_unfiltered (gdb_stderr, "target_kill ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_kill ()\n"); } static void @@ -2247,7 +2249,7 @@ debug_to_load (args, from_tty) { debug_target.to_load (args, from_tty); - fprintf_unfiltered (gdb_stderr, "target_load (%s, %d)\n", args, from_tty); + fprintf_unfiltered (gdb_stdlog, "target_load (%s, %d)\n", args, from_tty); } static int @@ -2259,7 +2261,7 @@ debug_to_lookup_symbol (name, addrp) retval = debug_target.to_lookup_symbol (name, addrp); - fprintf_unfiltered (gdb_stderr, "target_lookup_symbol (%s, xxx)\n", name); + fprintf_unfiltered (gdb_stdlog, "target_lookup_symbol (%s, xxx)\n", name); return retval; } @@ -2272,7 +2274,7 @@ debug_to_create_inferior (exec_file, args, env) { debug_target.to_create_inferior (exec_file, args, env); - fprintf_unfiltered (gdb_stderr, "target_create_inferior (%s, %s, xxx)\n", + fprintf_unfiltered (gdb_stdlog, "target_create_inferior (%s, %s, xxx)\n", exec_file, args); } @@ -2282,7 +2284,7 @@ debug_to_post_startup_inferior (pid) { debug_target.to_post_startup_inferior (pid); - fprintf_unfiltered (gdb_stderr, "target_post_startup_inferior (%d)\n", + fprintf_unfiltered (gdb_stdlog, "target_post_startup_inferior (%d)\n", pid); } @@ -2292,7 +2294,7 @@ debug_to_acknowledge_created_inferior (pid) { debug_target.to_acknowledge_created_inferior (pid); - fprintf_unfiltered (gdb_stderr, "target_acknowledge_created_inferior (%d)\n", + fprintf_unfiltered (gdb_stdlog, "target_acknowledge_created_inferior (%d)\n", pid); } @@ -2303,7 +2305,7 @@ debug_to_clone_and_follow_inferior (child_pid, followed_child) { debug_target.to_clone_and_follow_inferior (child_pid, followed_child); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_clone_and_follow_inferior (%d, %d)\n", child_pid, *followed_child); } @@ -2313,7 +2315,7 @@ debug_to_post_follow_inferior_by_clone () { debug_target.to_post_follow_inferior_by_clone (); - fprintf_unfiltered (gdb_stderr, "target_post_follow_inferior_by_clone ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_post_follow_inferior_by_clone ()\n"); } static int @@ -2324,7 +2326,7 @@ debug_to_insert_fork_catchpoint (pid) retval = debug_target.to_insert_fork_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_insert_fork_catchpoint (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_insert_fork_catchpoint (%d) = %d\n", pid, retval); return retval; @@ -2338,7 +2340,7 @@ debug_to_remove_fork_catchpoint (pid) retval = debug_target.to_remove_fork_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_remove_fork_catchpoint (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_remove_fork_catchpoint (%d) = %d\n", pid, retval); return retval; @@ -2352,7 +2354,7 @@ debug_to_insert_vfork_catchpoint (pid) retval = debug_target.to_insert_vfork_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_insert_vfork_catchpoint (%d)= %d\n", + fprintf_unfiltered (gdb_stdlog, "target_insert_vfork_catchpoint (%d)= %d\n", pid, retval); return retval; @@ -2366,7 +2368,7 @@ debug_to_remove_vfork_catchpoint (pid) retval = debug_target.to_remove_vfork_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_remove_vfork_catchpoint (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_remove_vfork_catchpoint (%d) = %d\n", pid, retval); return retval; @@ -2381,7 +2383,7 @@ debug_to_has_forked (pid, child_pid) has_forked = debug_target.to_has_forked (pid, child_pid); - fprintf_unfiltered (gdb_stderr, "target_has_forked (%d, %d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_has_forked (%d, %d) = %d\n", pid, *child_pid, has_forked); return has_forked; @@ -2396,7 +2398,7 @@ debug_to_has_vforked (pid, child_pid) has_vforked = debug_target.to_has_vforked (pid, child_pid); - fprintf_unfiltered (gdb_stderr, "target_has_vforked (%d, %d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_has_vforked (%d, %d) = %d\n", pid, *child_pid, has_vforked); return has_vforked; @@ -2409,7 +2411,7 @@ debug_to_can_follow_vfork_prior_to_exec () can_immediately_follow_vfork = debug_target.to_can_follow_vfork_prior_to_exec (); - fprintf_unfiltered (gdb_stderr, "target_can_follow_vfork_prior_to_exec () = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_can_follow_vfork_prior_to_exec () = %d\n", can_immediately_follow_vfork); return can_immediately_follow_vfork; @@ -2424,7 +2426,7 @@ debug_to_post_follow_vfork (parent_pid, followed_parent, child_pid, followed_chi { debug_target.to_post_follow_vfork (parent_pid, followed_parent, child_pid, followed_child); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_post_follow_vfork (%d, %d, %d, %d)\n", parent_pid, followed_parent, child_pid, followed_child); } @@ -2437,7 +2439,7 @@ debug_to_insert_exec_catchpoint (pid) retval = debug_target.to_insert_exec_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_insert_exec_catchpoint (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_insert_exec_catchpoint (%d) = %d\n", pid, retval); return retval; @@ -2451,7 +2453,7 @@ debug_to_remove_exec_catchpoint (pid) retval = debug_target.to_remove_exec_catchpoint (pid); - fprintf_unfiltered (gdb_stderr, "target_remove_exec_catchpoint (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_remove_exec_catchpoint (%d) = %d\n", pid, retval); return retval; @@ -2466,7 +2468,7 @@ debug_to_has_execd (pid, execd_pathname) has_execd = debug_target.to_has_execd (pid, execd_pathname); - fprintf_unfiltered (gdb_stderr, "target_has_execd (%d, %s) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_has_execd (%d, %s) = %d\n", pid, (*execd_pathname ? *execd_pathname : "<NULL>"), has_execd); @@ -2480,7 +2482,7 @@ debug_to_reported_exec_events_per_exec_call () reported_exec_events = debug_target.to_reported_exec_events_per_exec_call (); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_reported_exec_events_per_exec_call () = %d\n", reported_exec_events); @@ -2512,7 +2514,7 @@ debug_to_has_syscall_event (pid, kind, syscall_id) } } - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target_has_syscall_event (%d, %s, %d) = %d\n", pid, kind_spelling, *syscall_id, has_syscall_event); @@ -2529,7 +2531,7 @@ debug_to_has_exited (pid, wait_status, exit_status) has_exited = debug_target.to_has_exited (pid, wait_status, exit_status); - fprintf_unfiltered (gdb_stderr, "target_has_exited (%d, %d, %d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_has_exited (%d, %d, %d) = %d\n", pid, wait_status, *exit_status, has_exited); return has_exited; @@ -2540,7 +2542,7 @@ debug_to_mourn_inferior () { debug_target.to_mourn_inferior (); - fprintf_unfiltered (gdb_stderr, "target_mourn_inferior ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_mourn_inferior ()\n"); } static int @@ -2550,7 +2552,7 @@ debug_to_can_run () retval = debug_target.to_can_run (); - fprintf_unfiltered (gdb_stderr, "target_can_run () = %d\n", retval); + fprintf_unfiltered (gdb_stdlog, "target_can_run () = %d\n", retval); return retval; } @@ -2561,7 +2563,7 @@ debug_to_notice_signals (pid) { debug_target.to_notice_signals (pid); - fprintf_unfiltered (gdb_stderr, "target_notice_signals (%d)\n", pid); + fprintf_unfiltered (gdb_stdlog, "target_notice_signals (%d)\n", pid); } static int @@ -2572,7 +2574,7 @@ debug_to_thread_alive (pid) retval = debug_target.to_thread_alive (pid); - fprintf_unfiltered (gdb_stderr, "target_thread_alive (%d) = %d\n", + fprintf_unfiltered (gdb_stdlog, "target_thread_alive (%d) = %d\n", pid, retval); return retval; @@ -2583,7 +2585,7 @@ debug_to_stop () { debug_target.to_stop (); - fprintf_unfiltered (gdb_stderr, "target_stop ()\n"); + fprintf_unfiltered (gdb_stdlog, "target_stop ()\n"); } static int @@ -2597,11 +2599,19 @@ debug_to_query (type, req, resp, siz) retval = debug_target.to_query (type, req, resp, siz); - fprintf_unfiltered (gdb_stderr, "target_query (%c, %s, %s, %d) = %d\n", type, req, resp, *siz, retval); + fprintf_unfiltered (gdb_stdlog, "target_query (%c, %s, %s, %d) = %d\n", type, req, resp, *siz, retval); return retval; } +static void +debug_to_rcmd (char *command, + struct gdb_file *outbuf) +{ + debug_target.to_rcmd (command, outbuf); + fprintf_unfiltered (gdb_stdlog, "target_rcmd (%s, ...)\n", command); +} + static struct symtab_and_line * debug_to_enable_exception_callback (kind, enable) enum exception_event_kind kind; @@ -2609,7 +2619,7 @@ debug_to_enable_exception_callback (kind, enable) { struct symtab_and_line *result; result = debug_target.to_enable_exception_callback (kind, enable); - fprintf_unfiltered (gdb_stderr, + fprintf_unfiltered (gdb_stdlog, "target get_exception_callback_sal (%d, %d)\n", kind, enable); return result; @@ -2620,7 +2630,7 @@ debug_to_get_current_exception_event () { struct exception_event_record *result; result = debug_target.to_get_current_exception_event (); - fprintf_unfiltered (gdb_stderr, "target get_current_exception_event ()\n"); + fprintf_unfiltered (gdb_stdlog, "target get_current_exception_event ()\n"); return result; } @@ -2632,7 +2642,7 @@ debug_to_pid_to_exec_file (pid) exec_file = debug_target.to_pid_to_exec_file (pid); - fprintf_unfiltered (gdb_stderr, "target_pid_to_exec_file (%d) = %s\n", + fprintf_unfiltered (gdb_stdlog, "target_pid_to_exec_file (%d) = %s\n", pid, exec_file); return exec_file; @@ -2646,7 +2656,7 @@ debug_to_core_file_to_sym_file (core) sym_file = debug_target.to_core_file_to_sym_file (core); - fprintf_unfiltered (gdb_stderr, "target_core_file_to_sym_file (%s) = %s\n", + fprintf_unfiltered (gdb_stdlog, "target_core_file_to_sym_file (%s) = %s\n", core, sym_file); return sym_file; @@ -2707,6 +2717,7 @@ setup_target_debug () current_target.to_thread_alive = debug_to_thread_alive; current_target.to_stop = debug_to_stop; current_target.to_query = debug_to_query; + current_target.to_rcmd = debug_to_rcmd; current_target.to_enable_exception_callback = debug_to_enable_exception_callback; current_target.to_get_current_exception_event = debug_to_get_current_exception_event; current_target.to_pid_to_exec_file = debug_to_pid_to_exec_file; @@ -2720,6 +2731,19 @@ static char targ_desc[] = Shows the entire stack of targets currently in use (including the exec-file,\n\ core-file, and process, if any), as well as the symbol file name."; +static void +do_monitor_command (char *cmd, + int from_tty) +{ + if ((current_target.to_rcmd == (void*) tcomplain) + || (current_target.to_rcmd == debug_to_rcmd + && (debug_target.to_rcmd == (void*) tcomplain))) + { + error ("\"monitor\" command not supported by this target.\n"); + } + target_rcmd (cmd, gdb_stdtarg); +} + void initialize_targets () { @@ -2736,6 +2760,10 @@ initialize_targets () When non-zero, target debugging is enabled.", &setlist), &showlist); + + add_com ("monitor", class_obscure, do_monitor_command, + "Send a command to the remote monitor (remote targets only)."); + if (!STREQ (signals[TARGET_SIGNAL_LAST].string, "TARGET_SIGNAL_MAGIC")) abort (); } diff --git a/gdb/target.h b/gdb/target.h index f7e0a94984d..fd4ffe5dc9e 100644 --- a/gdb/target.h +++ b/gdb/target.h @@ -376,6 +376,7 @@ struct target_ops void (*to_find_new_threads) PARAMS ((void)); void (*to_stop) PARAMS ((void)); int (*to_query) PARAMS ((int /*char */ , char *, char *, int *)); + void (*to_rcmd) (char *command, struct gdb_file *output); struct symtab_and_line *(*to_enable_exception_callback) PARAMS ((enum exception_event_kind, int)); struct exception_event_record *(*to_get_current_exception_event) PARAMS ((void)); char *(*to_pid_to_exec_file) PARAMS ((int pid)); @@ -930,6 +931,14 @@ print_section_info PARAMS ((struct target_ops *, bfd *)); #define target_query(query_type, query, resp_buffer, bufffer_size) \ (*current_target.to_query) (query_type, query, resp_buffer, bufffer_size) +/* Send the specified COMMAND to the target's monitor + (shell,interpreter) for execution. The result of the query is + placed in OUTBUF. */ + +#define target_rcmd(command, outbuf) \ + (*current_target.to_rcmd) (command, outbuf) + + /* Get the symbol information for a breakpointable routine called when an exception event occurs. Intended mainly for C++, and for those diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index c1e25cab084..7d31fa831ff 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,32 @@ +1999-08-05 Stan Shebs <shebs@andros.cygnus.com> + + * gdb.base/display.exp: Help expect by putting a newline in the + funky printf, remove a bogus p/a test. + +1999-08-05 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * gdb.base/display.exp: Make sure that when we say 'run', we are + connected to the target. This is necessary when running not + natively. + +1999-08-03 Stan Shebs <shebs@andros.cygnus.com> + + * gdb.base/step-test.exp: Removed some extraneous messages. + + * gdb.base/long_long.exp: Don't run memory examination tests + on little-endian targets (they will need a different set of + results to match). + +1999-08-02 Stan Shebs <shebs@andros.cygnus.com> + + * gdb.c++/virtfunc.exp: Expect to fail the virtual call tests + until somebody decides to fix GDB. + + * gdb.base/long_long.c: Stop compiler complaint by specifying long + constant as "ULL". + * gdb.base/long_long.exp: Loosen x/c test, add partial result + matches for a couple x/2 commands. + 1999-07-30 Stan Shebs <shebs@andros.cygnus.com> * gdb.c++/ref-types.cc, gdb.c++/ref-types.exp: Appease doschk diff --git a/gdb/testsuite/gdb.base/commands.exp b/gdb/testsuite/gdb.base/commands.exp index 62d9f109b48..c9cea084d70 100644 --- a/gdb/testsuite/gdb.base/commands.exp +++ b/gdb/testsuite/gdb.base/commands.exp @@ -185,7 +185,7 @@ proc infrun_breakpoint_command_test {} { if { [istarget "hppa*-hp-hpux*"] } { gdb_test "continue" \ "Continuing.*.*.*Breakpoint \[0-9\]*, factorial \\(value=5\\).*at.*\[0-9\]*\[ \]*if \\(value > 1\\) \{.*\[0-9\]*\[ \]*value \\*= factorial \\(value - 1\\);.*" \ - "contiune in infrun_breakpoint_command_test" + "continue in infrun_breakpoint_command_test" } else { gdb_test "continue" \ "Breakpoint \[0-9\]*, factorial \\(value=5\\).*at.* diff --git a/gdb/testsuite/gdb.base/display.exp b/gdb/testsuite/gdb.base/display.exp index 760a2e0a21e..98cd73cc285 100644 --- a/gdb/testsuite/gdb.base/display.exp +++ b/gdb/testsuite/gdb.base/display.exp @@ -46,6 +46,7 @@ gdb_exit gdb_start gdb_reinitialize_dir $srcdir/$subdir gdb_load ${binfile} + # Some coverage stuff # gdb_test "kill" ".*The program is not being run.*" @@ -59,9 +60,16 @@ gdb_test "detach" ".*" # Ok, on to real life # -if {![runto main]} { - fail "Could not run to main - other tests will fail." +gdb_exit +gdb_start +gdb_reinitialize_dir $srcdir/$subdir +gdb_load ${binfile} + +if ![runto_main] then { + fail "Could not run to main - other tests will fail." + continue } + gdb_test "b 14" ".*Breakpoint 2.*" "break do_loops" gdb_test "c" ".*Breakpoint 2, do_loops.*" "get to do_loops" @@ -133,7 +141,7 @@ gdb_test "printf" ".*Argument required.*" gdb_test "printf %d" ".*Bad format string, missing.*" gdb_test "printf \"%d" ".*Bad format string, non-terminated.*" gdb_test "printf \"%d%d\",i" ".*Wrong number of arguments.*" -gdb_test "printf \"\\\\!\\a\\f\\r\\t\\v\\b\"" ".*!.*" +gdb_test "printf \"\\\\!\\a\\f\\r\\t\\v\\b\\n\"" ".*!.*" gdb_test "printf \"\"" ".*" "re-set term" gdb_test "printf \"\\w\"" ".*Unrecognized escape character.*" gdb_test "printf \"%d\" j" ".*Invalid argument syntax.*" @@ -159,7 +167,6 @@ gdb_test "p/i sum" ".*Format letter.*is meaningless.*.*" "no i" gdb_test "p/a &sum" ".*= $hex.*<sum>.*" gdb_test "p/a main+1000" ".*= $hex.*<.*>.*" gdb_test "p/a \$pc" ".*= $hex.*<do_vars+.*>.*" -gdb_test "p/a &j" ".*= $hex.*<do_vars+.*>.*" gdb_test "p/a &&j" ".*A parse error.*" # Done! diff --git a/gdb/testsuite/gdb.base/long_long.c b/gdb/testsuite/gdb.base/long_long.c index a76e2792ab2..04fba92897e 100644 --- a/gdb/testsuite/gdb.base/long_long.c +++ b/gdb/testsuite/gdb.base/long_long.c @@ -31,7 +31,7 @@ int known_types() */ bin = 0x123456789abcdefLL; /* 64 bits = 16 hex digits */ oct = 01234567123456701234567LL; /* = 21+ octal digits */ - dec = 12345678901234567890LL; /* = 19+ decimal digits */ + dec = 12345678901234567890ULL; /* = 19+ decimal digits */ /* Stop here and look! */ diff --git a/gdb/testsuite/gdb.base/long_long.exp b/gdb/testsuite/gdb.base/long_long.exp index 07006b653a6..b779434d2ee 100644 --- a/gdb/testsuite/gdb.base/long_long.exp +++ b/gdb/testsuite/gdb.base/long_long.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1997, 1998 Free Software Foundation, Inc. +# Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -58,6 +58,17 @@ if { ![runto known_types] } then { return } +set target_bigendian_p 1 +send_gdb "show endian\n" +gdb_expect { + -re ".*little endian.*$gdb_prompt $" { set target_bigendian_p 0 } + -re ".*big endian.*$gdb_prompt $" { } + -re ".*$gdb_prompt $" { + fail "getting target endian" + } + default { fail "(timeout) getting target endian" } +} + gdb_test "n 4" ".*38.*" "get to known place" # Check the hack for long long prints. @@ -87,76 +98,90 @@ gdb_test "p/a oct" ".*0x.*77053977.*" gdb_test "p/c oct" ".*'w'.*" gdb_test "p/f oct" ".*-5.9822653797615723e-120.*" -gdb_test "p/d *(int *)&oct" ".*-1490098887.*" -gdb_test "p/u *(int *)&oct" ".*2804868409.*" -gdb_test "p/o *(int *)&oct" ".*024713562471.*" -gdb_test "p/t *(int *)&oct" ".*10100111001011101110010100111001.*" -gdb_test "p/a *(int *)&oct" ".*0xf*a72ee539.*" -gdb_test "p/c *(int *)&oct" ".*57 '9'.*" -gdb_test "p/f *(int *)&oct" ".*-2.42716126e-15.*" - -gdb_test "p/d *(short *)&oct" ".*-22738.*" -gdb_test "p/u *(short *)&oct" ".*42798.*" -gdb_test "p/o *(short *)&oct" ".*0123456.*" -gdb_test "p/t *(short *)&oct" ".*1010011100101110.*" -gdb_test "p/a *(short *)&oct" ".*0xf*ffffa72e.*" -gdb_test "p/c *(short *)&oct" ".* 46 '.'.*" -gdb_test "p/a *(short *)&oct" ".*0xf*ffffa72e.*" -gdb_test "p/f *(short *)&oct" ".*-22738.*" - -gdb_test "x/x &oct" ".*0xa72ee539.*" -gdb_test "x/d &oct" ".*.-1490098887*" -gdb_test "x/u &oct" ".*2804868409.*" -gdb_test "x/o &oct" ".*024713562471.*" -gdb_test "x/t &oct" ".*10100111001011101110010100111001.*" -gdb_test "x/a &oct" ".*0xa72ee539.*" -gdb_test "x/c &oct" ".*-89 '\\\\247'.*" -gdb_test "x/f &oct" ".*-5.9822653797615723e-120.*" - -gdb_test "x/2x &oct" ".*.*" -gdb_test "x/2d &oct" ".*.*" -gdb_test "x/2u &oct" ".*.*" -gdb_test "x/2o &oct" ".*.*" -gdb_test "x/2t &oct" ".*.*" -gdb_test "x/2a &oct" ".*.*" -gdb_test "x/2c &oct" ".*.*" -gdb_test "x/2f &oct" ".*.*" - -gdb_test "x/2bx &oct" ".*.*" -gdb_test "x/2bd &oct" ".*.*" -gdb_test "x/2bu &oct" ".*.*" -gdb_test "x/2bo &oct" ".*.*" -gdb_test "x/2bt &oct" ".*.*" -gdb_test "x/2ba &oct" ".*.*" -gdb_test "x/2bc &oct" ".*.*" -gdb_test "x/2bf &oct" ".*.*" - -gdb_test "x/2hx &oct" ".*.*" -gdb_test "x/2hd &oct" ".*.*" -gdb_test "x/2hu &oct" ".*.*" -gdb_test "x/2ho &oct" ".*.*" -gdb_test "x/2ht &oct" ".*.*" -gdb_test "x/2ha &oct" ".*.*" -gdb_test "x/2hc &oct" ".*.*" -gdb_test "x/2hf &oct" ".*.*" - -gdb_test "x/2wx &oct" ".*.*" -gdb_test "x/2wd &oct" ".*.*" -gdb_test "x/2wu &oct" ".*.*" -gdb_test "x/2wo &oct" ".*.*" -gdb_test "x/2wt &oct" ".*.*" -gdb_test "x/2wa &oct" ".*.*" -gdb_test "x/2wc &oct" ".*.*" -gdb_test "x/2wf &oct" ".*.*" - -gdb_test "x/2gx &oct" ".*.*" -gdb_test "x/2gd &oct" ".*.*" -gdb_test "x/2gu &oct" ".*.*" -gdb_test "x/2go &oct" ".*.*" -gdb_test "x/2gt &oct" ".*.*" -gdb_test "x/2ga &oct" ".*.*" -gdb_test "x/2gc &oct" ".*.*" -gdb_test "x/2gf &oct" ".*.*" +if { $target_bigendian_p } { + + gdb_test "p/d *(int *)&oct" ".*-1490098887.*" + gdb_test "p/u *(int *)&oct" ".*2804868409.*" + gdb_test "p/o *(int *)&oct" ".*024713562471.*" + gdb_test "p/t *(int *)&oct" ".*10100111001011101110010100111001.*" + gdb_test "p/a *(int *)&oct" ".*0xf*a72ee539.*" + gdb_test "p/c *(int *)&oct" ".*57 '9'.*" + gdb_test "p/f *(int *)&oct" ".*-2.42716126e-15.*" + + gdb_test "p/d *(short *)&oct" ".*-22738.*" + gdb_test "p/u *(short *)&oct" ".*42798.*" + gdb_test "p/o *(short *)&oct" ".*0123456.*" + gdb_test "p/t *(short *)&oct" ".*1010011100101110.*" + gdb_test "p/a *(short *)&oct" ".*0xf*ffffa72e.*" + gdb_test "p/c *(short *)&oct" ".* 46 '.'.*" + gdb_test "p/a *(short *)&oct" ".*0xf*ffffa72e.*" + gdb_test "p/f *(short *)&oct" ".*-22738.*" + + gdb_test "x/x &oct" ".*0xa72ee539.*" + gdb_test "x/d &oct" ".*.-1490098887*" + gdb_test "x/u &oct" ".*2804868409.*" + gdb_test "x/o &oct" ".*024713562471.*" + gdb_test "x/t &oct" ".*10100111001011101110010100111001.*" + gdb_test "x/a &oct" ".*0xa72ee539.*" + gdb_test "x/c &oct" ".*-89 .*" + # FIXME GDB's output is correct, but this longer match fails. + # gdb_test "x/c &oct" ".*-89 '\\\\247'.*" + gdb_test "x/f &oct" ".*-5.9822653797615723e-120.*" + + # FIXME Fill in the results for all the following tests. (But be careful + # about looking at locations with unspecified contents!) + + gdb_test "x/2x &oct" ".*0xa72ee53977053977.*" + gdb_test "x/2d &oct" ".*-6399925985474168457.*" + gdb_test "x/2u &oct" ".*.*" + gdb_test "x/2o &oct" ".*.*" + gdb_test "x/2t &oct" ".*.*" + gdb_test "x/2a &oct" ".*.*" + gdb_test "x/2c &oct" ".*.*" + gdb_test "x/2f &oct" ".*.*" + + gdb_test "x/2bx &oct" ".*.*" + gdb_test "x/2bd &oct" ".*.*" + gdb_test "x/2bu &oct" ".*.*" + gdb_test "x/2bo &oct" ".*.*" + gdb_test "x/2bt &oct" ".*.*" + gdb_test "x/2ba &oct" ".*.*" + gdb_test "x/2bc &oct" ".*.*" + gdb_test "x/2bf &oct" ".*.*" + + gdb_test "x/2hx &oct" ".*.*" + gdb_test "x/2hd &oct" ".*.*" + gdb_test "x/2hu &oct" ".*.*" + gdb_test "x/2ho &oct" ".*.*" + gdb_test "x/2ht &oct" ".*.*" + gdb_test "x/2ha &oct" ".*.*" + gdb_test "x/2hc &oct" ".*.*" + gdb_test "x/2hf &oct" ".*.*" + + gdb_test "x/2wx &oct" ".*.*" + gdb_test "x/2wd &oct" ".*.*" + gdb_test "x/2wu &oct" ".*.*" + gdb_test "x/2wo &oct" ".*.*" + gdb_test "x/2wt &oct" ".*.*" + gdb_test "x/2wa &oct" ".*.*" + gdb_test "x/2wc &oct" ".*.*" + gdb_test "x/2wf &oct" ".*.*" + + gdb_test "x/2gx &oct" ".*.*" + gdb_test "x/2gd &oct" ".*.*" + gdb_test "x/2gu &oct" ".*.*" + gdb_test "x/2go &oct" ".*.*" + gdb_test "x/2gt &oct" ".*.*" + gdb_test "x/2ga &oct" ".*.*" + gdb_test "x/2gc &oct" ".*.*" + gdb_test "x/2gf &oct" ".*.*" + +} else { + + # FIXME Add little-endian versions of these tests, or define a + # gdb_test_bi with two strings to match on. + +} gdb_exit return 0 diff --git a/gdb/testsuite/gdb.base/step-test.exp b/gdb/testsuite/gdb.base/step-test.exp index 6eeda0b9518..c8232cbe120 100644 --- a/gdb/testsuite/gdb.base/step-test.exp +++ b/gdb/testsuite/gdb.base/step-test.exp @@ -149,7 +149,6 @@ test_i "stepi into function" "stepi" \ send_gdb "finish\n" gdb_expect { -re ".*(Program received|Program exited).*$gdb_prompt $" { - puts "*** Matched Program recieved" # Oops... We ran to the end of the program... Better reset if {![runto_main]} then { fail "Can't run to main" @@ -162,13 +161,11 @@ gdb_expect { fail "stepi: finish call" } -re ".*${decimal}.*callee.*NEXTI.*$gdb_prompt $" { - puts "*** Matched success..." pass "stepi: finish call" } -re ".*${decimal}.*callee.*STEPI.*$gdb_prompt $" { # On PA64 we end up at a different instruction than PA32 if { [istarget "hppa2.0w-hp-hpux*"] } { - puts "*** Matched success..." pass "stepi: finish call 2" } else { fail "stepi: finish call 2" diff --git a/gdb/testsuite/gdb.c++/virtfunc.exp b/gdb/testsuite/gdb.c++/virtfunc.exp index e182744c167..dd73cabf6c1 100644 --- a/gdb/testsuite/gdb.c++/virtfunc.exp +++ b/gdb/testsuite/gdb.c++/virtfunc.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1992, 1994, 1997 Free Software Foundation, Inc. +# Copyright (C) 1992, 1994, 1997, 1999 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -34,6 +34,7 @@ if [get_compiler_info ${binfile} "c++"] { return -1 } +source ${binfile}.ci # Check to see if we have an executable to test. If not, then either we # haven't tried to compile one, or the compilation failed for some reason. @@ -678,6 +679,7 @@ proc test_virtual_calls {} { global gdb_prompt global GDB global nl + global gcc_compiled if [target_info exists gdb,cannot_call_functions] { setup_xfail "*-*-*" 2416 @@ -685,6 +687,12 @@ proc test_virtual_calls {} { return 0 } + # FIXME: In fall 1998, GCC's virtual function type info was changed, + # which causes GDB to be unable to resolve these calls. Until the + # problem is fixed, XFAIL these tests. -sts 1999-08-02 + + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pAe->f()\n" gdb_expect { -re ".* = 20$nl$gdb_prompt $" { pass "print pAe->f()" } @@ -706,6 +714,8 @@ proc test_virtual_calls {} { eof { fail "print pAe->f() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pAa->f()\n" gdb_expect { -re ".* = 1$nl$gdb_prompt $" { pass "print pAa->f()" } @@ -718,6 +728,8 @@ proc test_virtual_calls {} { eof { fail "print pAa->f() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pDe->vg()\n" gdb_expect { -re ".* = 202$nl$gdb_prompt $" { pass "print pDe->vg()" } @@ -730,6 +742,8 @@ proc test_virtual_calls {} { eof { fail "print pDe->vg() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pADe->vg()\n" gdb_expect { -re ".* = 202$nl$gdb_prompt $" { pass "print pADe->vg()" } @@ -742,6 +756,8 @@ proc test_virtual_calls {} { eof { fail "print pADe->vg() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pDd->vg()\n" gdb_expect { -re ".* = 101$nl$gdb_prompt $" { pass "print pDd->vg()" } @@ -754,6 +770,8 @@ proc test_virtual_calls {} { eof { fail "print pDd->vg() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pEe->vvb()\n" gdb_expect { -re ".* = 411$nl$gdb_prompt $" { pass "print pEe->vvb()" } @@ -766,6 +784,8 @@ proc test_virtual_calls {} { eof { fail "print pEe->vvb() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pVB->vvb()\n" gdb_expect { -re ".* = 407$nl$gdb_prompt $" { pass "print pVB->vvb()" } @@ -778,6 +798,8 @@ proc test_virtual_calls {} { eof { fail "print pVB->vvb() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pBe->vvb()\n" gdb_expect { -re ".* = 411$nl$gdb_prompt $" { pass "print pBe->vvb()" } @@ -790,6 +812,8 @@ proc test_virtual_calls {} { eof { fail "print pBe->vvb() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pDe->vvb()\n" gdb_expect { -re ".* = 411$nl$gdb_prompt $" { pass "print pDe->vvb()" } @@ -802,6 +826,8 @@ proc test_virtual_calls {} { eof { fail "print pDe->vvb() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pEe->vd()\n" gdb_expect { -re ".* = 282$nl$gdb_prompt $" { pass "print pEe->vd()" } @@ -814,6 +840,8 @@ proc test_virtual_calls {} { eof { fail "print pEe->vd() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pEe->fvb()\n" gdb_expect { -re ".* = 311$nl$gdb_prompt $" { pass "print pEe->fvb()" } @@ -826,6 +854,8 @@ proc test_virtual_calls {} { eof { fail "print pEe->fvb() ($GDB dumped core) (FIXME)" ; gdb_virtfunc_restart; return } } + if {$gcc_compiled} then { setup_xfail "*-*-*" } + send_gdb "print pEe->D::vg()\n" setup_xfail "*-*-*" gdb_expect { diff --git a/gdb/top.c b/gdb/top.c index 55359375711..40955abe63d 100644 --- a/gdb/top.c +++ b/gdb/top.c @@ -445,6 +445,9 @@ void (*registers_changed_hook) PARAMS ((void)); that several registers have changed (see value_assign). */ void (*register_changed_hook) PARAMS ((int regno)); +/* Tell the GUI that the disassembly flavor has changed */ +void (*disassembly_flavor_hook) PARAMS((char *args, int from_tty)); + /* Tell the GUI someone changed LEN bytes of memory at ADDR */ void (*memory_changed_hook) PARAMS ((CORE_ADDR addr, int len)); @@ -459,6 +462,11 @@ int (*target_wait_hook) PARAMS ((int pid, struct target_waitstatus * status)); void (*call_command_hook) PARAMS ((struct cmd_list_element * c, char *cmd, int from_tty)); +/* Called after a `set' command has finished. Is only run if the + `set' command succeeded. */ + +void (*set_hook) PARAMS ((struct cmd_list_element *c)); + /* Called when the current thread changes. Argument is thread id. */ void (*context_hook) PARAMS ((int id)); @@ -1045,7 +1053,7 @@ arg_cleanup () { struct user_args *oargs = user_args; if (!user_args) - fatal ("Internal error, arg_cleanup called with no user args.\n"); + internal_error ("Internal error, arg_cleanup called with no user args.\n"); user_args = user_args->next; free (oargs); @@ -3808,7 +3816,7 @@ init_main () else { /* initialize the prompt stack to a simple "(gdb) " prompt or to - whatever the DEFULAT_PROMPT is. */ + whatever the DEFAULT_PROMPT is. */ the_prompts.top = 0; PREFIX (0) = ""; #ifdef DEFAULT_PROMPT diff --git a/gdb/utils.c b/gdb/utils.c index 23374cf5374..58cefdf2675 100644 --- a/gdb/utils.c +++ b/gdb/utils.c @@ -66,9 +66,6 @@ static void malloc_botch PARAMS ((void)); #endif static void -fatal_dump_core PARAMS ((char *,...)); - -static void prompt_for_continue PARAMS ((void)); static void @@ -431,24 +428,11 @@ warning_begin () The primary difference between warnings and errors is that a warning does not force the return to command level. */ -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES warning (const char *string,...) -#else -warning (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, string); -#else - char *string; - - va_start (args); - string = va_arg (args, char *); -#endif if (warning_hook) (*warning_hook) (string, args); else @@ -487,36 +471,17 @@ error_begin () The first argument STRING is the error message, used as a fprintf string, and the remaining args are passed as arguments to it. */ -/* VARARGS */ NORETURN void -#ifdef ANSI_PROTOTYPES error (const char *string,...) -#else -error (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, string); -#else - va_start (args); -#endif if (error_hook) (*error_hook) (); else { error_begin (); -#ifdef ANSI_PROTOTYPES vfprintf_filtered (gdb_stderr, string, args); -#else - { - char *string1; - - string1 = va_arg (args, char *); - vfprintf_filtered (gdb_stderr, string1, args); - } -#endif fprintf_filtered (gdb_stderr, "\n"); va_end (args); return_to_top_level (RETURN_ERROR); @@ -524,69 +489,46 @@ error (va_alist) } -/* Print an error message and exit reporting failure. - This is for a error that we cannot continue from. - The arguments are printed a la printf. - - This function cannot be declared volatile (NORETURN) in an - ANSI environment because exit() is not declared volatile. */ +/* Print a message reporting an internal error. Ask the user if they + want to continue, dump core, or just exit. */ -/* VARARGS */ NORETURN void -#ifdef ANSI_PROTOTYPES -fatal (char *string,...) -#else -fatal (va_alist) - va_dcl -#endif +internal_error (char *string, ...) { + static char msg[] = "Internal GDB error: recursive internal error.\n"; + static int dejavu = 0; va_list args; -#ifdef ANSI_PROTOTYPES - va_start (args, string); -#else - char *string; - va_start (args); - string = va_arg (args, char *); -#endif - fprintf_unfiltered (gdb_stderr, "\ngdb: "); - vfprintf_unfiltered (gdb_stderr, string, args); - fprintf_unfiltered (gdb_stderr, "\n"); - va_end (args); - exit (1); -} -/* Print an error message and exit, dumping core. - The arguments are printed a la printf (). */ + /* don't allow infinite error recursion. */ + switch (dejavu) + { + case 0: + dejavu = 1; + break; + case 1: + dejavu = 2; + fputs_unfiltered (msg, gdb_stderr); + abort (); + default: + dejavu = 3; + write (STDERR_FILENO, msg, sizeof (msg)); + exit (1); + } -/* VARARGS */ -static void -#ifdef ANSI_PROTOTYPES -fatal_dump_core (char *string,...) -#else -fatal_dump_core (va_alist) - va_dcl -#endif -{ - va_list args; -#ifdef ANSI_PROTOTYPES + /* Try to get the message out */ + fputs_unfiltered ("\nGDB-INTERNAL-ERROR: ", gdb_stderr); va_start (args, string); -#else - char *string; - - va_start (args); - string = va_arg (args, char *); -#endif - /* "internal error" is always correct, since GDB should never dump - core, no matter what the input. */ - fprintf_unfiltered (gdb_stderr, "\ngdb internal error: "); vfprintf_unfiltered (gdb_stderr, string, args); - fprintf_unfiltered (gdb_stderr, "\n"); va_end (args); + fputs_unfiltered ("\n", gdb_stderr); + + if (query ("\ +An internal GDB error has been detected.\n\ +Do you want to quit GDB (dumping core)? ")) + abort (); - signal (SIGQUIT, SIG_DFL); - kill (getpid (), SIGQUIT); - /* We should never get here, but just in case... */ - exit (1); + dejavu = 0; + return_to_top_level (RETURN_ERROR); } /* The strerror() function can return NULL for errno values that are @@ -847,7 +789,8 @@ init_malloc (md) static void malloc_botch () { - fatal_dump_core ("Memory corruption"); + fprintf_unfiltered (gdb_stderr, "Memory corruption\n"); + abort (); } /* Attempt to install hooks in mmalloc/mrealloc/mfree for the heap specified @@ -898,11 +841,11 @@ nomem (size) { if (size > 0) { - fatal ("virtual memory exhausted: can't allocate %ld bytes.", size); + internal_error ("virtual memory exhausted: can't allocate %ld bytes.", size); } else { - fatal ("virtual memory exhausted."); + internal_error ("virtual memory exhausted."); } } @@ -1075,25 +1018,14 @@ gdb_print_address (addr, stream) /* VARARGS */ int -#ifdef ANSI_PROTOTYPES query (char *ctlstr,...) -#else -query (va_alist) - va_dcl -#endif { va_list args; register int answer; register int ans2; int retval; -#ifdef ANSI_PROTOTYPES va_start (args, ctlstr); -#else - char *ctlstr; - va_start (args); - ctlstr = va_arg (args, char *); -#endif if (query_hook) { @@ -2443,50 +2375,20 @@ vprintf_unfiltered (format, args) vfprintf_unfiltered (gdb_stdout, format, args); } -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES fprintf_filtered (GDB_FILE * stream, const char *format,...) -#else -fprintf_filtered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - GDB_FILE *stream; - char *format; - - va_start (args); - stream = va_arg (args, GDB_FILE *); - format = va_arg (args, char *); -#endif vfprintf_filtered (stream, format, args); va_end (args); } -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES fprintf_unfiltered (GDB_FILE * stream, const char *format,...) -#else -fprintf_unfiltered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - GDB_FILE *stream; - char *format; - - va_start (args); - stream = va_arg (args, GDB_FILE *); - format = va_arg (args, char *); -#endif vfprintf_unfiltered (stream, format, args); va_end (args); } @@ -2494,28 +2396,11 @@ fprintf_unfiltered (va_alist) /* Like fprintf_filtered, but prints its result indented. Called as fprintfi_filtered (spaces, stream, format, ...); */ -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES fprintfi_filtered (int spaces, GDB_FILE * stream, const char *format,...) -#else -fprintfi_filtered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - int spaces; - GDB_FILE *stream; - char *format; - - va_start (args); - spaces = va_arg (args, int); - stream = va_arg (args, GDB_FILE *); - format = va_arg (args, char *); -#endif print_spaces_filtered (spaces, stream); vfprintf_filtered (stream, format, args); @@ -2523,47 +2408,21 @@ fprintfi_filtered (va_alist) } -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES printf_filtered (const char *format,...) -#else -printf_filtered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - char *format; - - va_start (args); - format = va_arg (args, char *); -#endif vfprintf_filtered (gdb_stdout, format, args); va_end (args); } -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES printf_unfiltered (const char *format,...) -#else -printf_unfiltered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - char *format; - - va_start (args); - format = va_arg (args, char *); -#endif vfprintf_unfiltered (gdb_stdout, format, args); va_end (args); } @@ -2571,26 +2430,11 @@ printf_unfiltered (va_alist) /* Like printf_filtered, but prints it's result indented. Called as printfi_filtered (spaces, format, ...); */ -/* VARARGS */ void -#ifdef ANSI_PROTOTYPES printfi_filtered (int spaces, const char *format,...) -#else -printfi_filtered (va_alist) - va_dcl -#endif { va_list args; -#ifdef ANSI_PROTOTYPES va_start (args, format); -#else - int spaces; - char *format; - - va_start (args); - spaces = va_arg (args, int); - format = va_arg (args, char *); -#endif print_spaces_filtered (spaces, gdb_stdout); vfprintf_filtered (gdb_stdout, format, args); va_end (args); diff --git a/gdb/v850-tdep.c b/gdb/v850-tdep.c index c6e605b423c..060200f7588 100644 --- a/gdb/v850-tdep.c +++ b/gdb/v850-tdep.c @@ -873,7 +873,7 @@ v850_target_architecture_hook (ap) } } - fatal ("Architecture `%s' unreconized", ap->printable_name); + internal_error ("Architecture `%s' unreconized", ap->printable_name); } void diff --git a/gdb/xcoffread.c b/gdb/xcoffread.c index ef73399978f..059bc1d2f5c 100644 --- a/gdb/xcoffread.c +++ b/gdb/xcoffread.c @@ -196,7 +196,7 @@ static struct complaint eb_complaint = {"Mismatched .eb symbol ignored starting at symnum %d", 0, 0}; static void -xcoff_initial_scan PARAMS ((struct objfile *, struct section_offsets *, int)); +xcoff_initial_scan PARAMS ((struct objfile *, int)); static void scan_xcoff_symtab PARAMS ((struct section_offsets *, struct objfile *)); @@ -2230,7 +2230,7 @@ scan_xcoff_symtab (section_offsets, objfile) char *sraw_symbol; struct internal_syment symbol; - union internal_auxent main_aux; + union internal_auxent main_aux[5]; unsigned int ssymnum; char *last_csect_name = NULL; /* last seen csect's name and value */ @@ -2279,7 +2279,7 @@ scan_xcoff_symtab (section_offsets, objfile) union internal_auxent csect_aux; unsigned int symnum_before = ssymnum; - swap_sym (&symbol, &main_aux, &namestring, &sraw_symbol, + swap_sym (&symbol, &main_aux[0], &namestring, &sraw_symbol, &ssymnum, objfile); if (symbol.n_numaux > 1) { @@ -2293,7 +2293,7 @@ scan_xcoff_symtab (section_offsets, objfile) &csect_aux); } else - csect_aux = main_aux; + csect_aux = main_aux[0]; /* If symbol name starts with ".$" or "$", ignore it. */ if (namestring[0] == '$' @@ -2401,7 +2401,7 @@ scan_xcoff_symtab (section_offsets, objfile) if (first_fun_line_offset == 0 && symbol.n_numaux > 1) first_fun_line_offset = - main_aux.x_sym.x_fcnary.x_fcn.x_lnnoptr; + main_aux[0].x_sym.x_fcnary.x_fcn.x_lnnoptr; RECORD_MINIMAL_SYMBOL (namestring, symbol.n_value, sclass == C_HIDEXT ? mst_file_text : mst_text, @@ -2476,7 +2476,7 @@ scan_xcoff_symtab (section_offsets, objfile) unsigned int symnum_before; symnum_before = ssymnum; - swap_sym (&symbol, &main_aux, &namestring, &sraw_symbol, + swap_sym (&symbol, &main_aux[0], &namestring, &sraw_symbol, &ssymnum, objfile); /* See if the last csect needs to be recorded. */ @@ -2510,7 +2510,7 @@ scan_xcoff_symtab (section_offsets, objfile) exists, otherwise use the symbol itself. */ if (!strcmp (namestring, ".file") && symbol.n_numaux > 0) { - filestring = coff_getfilename (&main_aux, objfile); + filestring = coff_getfilename (&main_aux[0], objfile); } else filestring = namestring; @@ -2600,7 +2600,7 @@ scan_xcoff_symtab (section_offsets, objfile) case C_STSYM: stype = N_LSYM; pstab:; - swap_sym (&symbol, &main_aux, &namestring, &sraw_symbol, + swap_sym (&symbol, &main_aux[0], &namestring, &sraw_symbol, &ssymnum, objfile); #define CUR_SYMBOL_TYPE stype #define CUR_SYMBOL_VALUE symbol.n_value @@ -2654,9 +2654,8 @@ get_toc_offset (objfile) table (as opposed to a shared lib or dynamically loaded file). */ static void -xcoff_initial_scan (objfile, section_offsets, mainline) +xcoff_initial_scan (objfile, mainline) struct objfile *objfile; - struct section_offsets *section_offsets; int mainline; /* FIXME comments above */ { bfd *abfd; @@ -2751,7 +2750,7 @@ xcoff_initial_scan (objfile, section_offsets, mainline) /* Now that the symbol table data of the executable file are all in core, process them and define symbols accordingly. */ - scan_xcoff_symtab (section_offsets, objfile); + scan_xcoff_symtab (objfile->section_offsets, objfile); /* Install any minimal symbols that have been collected as the current minimal symbols for this objfile. */ @@ -2771,10 +2770,7 @@ xcoff_symfile_offsets (objfile, addr) objfile->num_sections = SECT_OFF_MAX; section_offsets = (struct section_offsets *) - obstack_alloc - (&objfile->psymbol_obstack, - sizeof (struct section_offsets) - + sizeof (section_offsets->offsets) * objfile->num_sections); + obstack_alloc (&objfile->psymbol_obstack, SIZEOF_SECTION_OFFSETS); /* syms_from_objfile kindly subtracts from addr the bfd_section_vma of the .text section. This strikes me as wrong--whether the diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index bc2bb014e8b..26dcb3cd746 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,35 @@ +1999-08-08 Doug Evans <devans@casey.cygnus.com> + + * cgen-engine.h (SEM_FN_NAME,SEMF_FN_NAME): Delete. + (insn_sem): Rewrite. + (sem_fn_desc): New struct. + (idesc): Rewrite. + * genmloop.sh (scache case,@cpu@_scache_lookup): Profile scache hit, + misses if ! FAST_P. + (scache case): Split into non-parallel/parallel versions. + (@cpu@_engine_run_{full,fast}): Call @cpu@_{sem,semf}_init_idesc_table + if not use semantic switch version. + +1999-08-04 Doug Evans <devans@casey.cygnus.com> + + * cgen-defs.h (SEM_BRANCH_TYPE): New enum. + * cgen-engine.h (SEM_BRANCH_UNTAKEN,SEM_BRANCH_UNCACHEABLE): Delete. + (SEM_BRANCH_INIT_EXTRACT): Delete. + (SEM_BRANCH_INIT): Replace npc_ptr with br_type. + (SEM_BRANCH_FINI): Ditto. + (SEM_BRANCH_VIA_ADDR): Ditto. + (SEM_BRANCH_VIA_CACHE): Ditto. Delete cachvarptr arg. + (SEM_BRANCH_ADDR_CACHE): Delete. + (SEM_SKIP_COMPILE,SEM_SKIP_INSN): New macros. + * cgen-scache.h (cpu_scache): Replace member pbb_pr_npc_ptr with + pbb_br_type. + * genmloop.sh (eng.hin): Update prototype of ${cpu}_pbb_cti_chain. + (@cpu@_pbb_begin): Initialize branch_target. + (@cpu@_pbb_cti_chain): Replace arg new_vpc_ptr with br_type. + (@cpu@_engine_run_full): Replace local pbb_br_npc_ptr with + pbb_br_type. + (@cpu@_engine_run_fast): Ditto. + Fri Jul 16 14:47:53 1999 Dave Brolley <brolley@cygnus.com> * cgen-utils.c (RORSI): New function. diff --git a/sim/common/cgen-cpu.h b/sim/common/cgen-cpu.h index c807182bbc0..914fb45991d 100644 --- a/sim/common/cgen-cpu.h +++ b/sim/common/cgen-cpu.h @@ -63,8 +63,8 @@ typedef struct { IDESC *idesc; #define CPU_IDESC(cpu) ((cpu)->cgen_cpu.idesc) - /* Whether the read,write,semantic entries (computed goto labels) have been - initialized or not. */ + /* Whether the read,write,semantic entries (function pointers or computed + goto labels) have been initialized or not. */ int idesc_read_init_p; #define CPU_IDESC_READ_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_read_init_p) int idesc_write_init_p; diff --git a/sim/common/cgen-defs.h b/sim/common/cgen-defs.h index d3c9a8ae57b..1faa2ee9ddf 100644 --- a/sim/common/cgen-defs.h +++ b/sim/common/cgen-defs.h @@ -92,6 +92,15 @@ typedef SCACHE *SEM_PC; #else typedef IADDR SEM_PC; #endif + +/* Kinds of branches. */ +typedef enum { + SEM_BRANCH_UNTAKEN, + /* Branch to an uncacheable address (e.g. j reg). */ + SEM_BRANCH_UNCACHEABLE, + /* Branch to a cacheable (fixed) address. */ + SEM_BRANCH_CACHEABLE +} SEM_BRANCH_TYPE; /* Virtual insn support. */ diff --git a/sim/common/cgen-engine.h b/sim/common/cgen-engine.h index e7d27e03588..fbcf3e5fc1a 100644 --- a/sim/common/cgen-engine.h +++ b/sim/common/cgen-engine.h @@ -180,11 +180,6 @@ do { \ & CGEN_ATTR_MASK (CGEN_INSN_SKIP_CTI)) \ != 0) -/* These are used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). */ -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#define SEMF_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) - /* Return pointer to ARGBUF given ptr to SCACHE. */ #define SEM_ARGBUF(sem_arg) (& (sem_arg) -> argbuf) @@ -217,22 +212,11 @@ do { \ #define PBB_UPDATE_INSN_COUNT(cpu,sc) \ (CPU_INSN_COUNT (cpu) += SEM_ARGBUF (sc) -> fields.chain.insn_count) -/* Value for br_addr_ptr indicating branch wasn't taken. */ -#define SEM_BRANCH_UNTAKEN ((SEM_PC *) 0) - -/* Value for br_addr_ptr indicating branch was taken to uncacheable - address (e.g. j reg). */ -#define SEM_BRANCH_UNCACHEABLE ((SEM_PC *) 1) - -/* Initialize next-pbb link for SEM_BRANCH_VIA_CACHE. */ -#define SEM_BRANCH_INIT_EXTRACT(abuf) \ -do { (abuf)->fields.cti.addr_cache = 0; } while (0) - /* Do not append a `;' to invocations of this. - npc,npc_ptr are for communication between the cti insn and cti-chain. */ + npc,br_type are for communication between the cti insn and cti-chain. */ #define SEM_BRANCH_INIT \ IADDR npc = 0; /* assign a value for -Wall */ \ - SEM_PC *npc_ptr = SEM_BRANCH_UNTAKEN; + SEM_BRANCH_TYPE br_type = SEM_BRANCH_UNTAKEN; /* SEM_IN_SWITCH is defined at the top of the mainloop.c files generated by genmloop.sh. It exists so generated semantic code needn't @@ -241,30 +225,36 @@ do { (abuf)->fields.cti.addr_cache = 0; } while (0) #define SEM_BRANCH_FINI(pcvar) \ do { \ pbb_br_npc = npc; \ - pbb_br_npc_ptr = npc_ptr; \ + pbb_br_type = br_type; \ } while (0) #else /* 1 semantic function per instruction */ #define SEM_BRANCH_FINI(pcvar) \ do { \ CPU_PBB_BR_NPC (current_cpu) = npc; \ - CPU_PBB_BR_NPC_PTR (current_cpu) = npc_ptr; \ + CPU_PBB_BR_TYPE (current_cpu) = br_type; \ } while (0) #endif -/* Return address of cached branch address value. */ -#define SEM_BRANCH_ADDR_CACHE(sem_arg) \ - (& SEM_ARGBUF (sem_arg)->fields.cti.addr_cache) - -#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar, cachevarptr) \ +#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar) \ do { \ npc = (newval); \ - npc_ptr = (cachevarptr); \ + br_type = SEM_BRANCH_CACHEABLE; \ } while (0) #define SEM_BRANCH_VIA_ADDR(cpu, sc, newval, pcvar) \ do { \ npc = (newval); \ - npc_ptr = SEM_BRANCH_UNCACHEABLE; \ + br_type = SEM_BRANCH_UNCACHEABLE; \ +} while (0) + +#define SEM_SKIP_COMPILE(cpu, sc, skip) \ +do { \ + SEM_ARGBUF (sc) -> skip_count = (skip); \ +} while (0) + +#define SEM_SKIP_INSN(cpu, sc, vpcvar) \ +do { \ + (vpcvar) += SEM_ARGBUF (sc) -> skip_count; \ } while (0) #else /* ! WITH_SCACHE_PBB */ @@ -273,8 +263,6 @@ do { \ #define SEM_NEXT_VPC(sem_arg, pc, len) ((pc) + (len)) -#define SEM_BRANCH_INIT_EXTRACT(abuf) do { } while (0) - /* ??? May wish to move taken_p out of here and make it explicit. */ #define SEM_BRANCH_INIT \ int taken_p = 0; @@ -285,9 +273,7 @@ do { \ #define SEM_BRANCH_FINI(pcvar) \ do { TARGET_SEM_BRANCH_FINI (pcvar, taken_p); } while (0) -#define SEM_BRANCH_ADDR_CACHE(sem_arg) shouldnt_be_used - -#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar, cachevar) \ +#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar) \ do { \ (pcvar) = (newval); \ taken_p = 1; \ @@ -314,9 +300,7 @@ do { \ #define SEM_BRANCH_INIT \ int taken_p = 0; -#define SEM_BRANCH_ADDR_CACHE(sem_arg) shouldnt_be_used - -#define SEM_BRANCH_VIA_CACHE(cpu, abuf, newval, pcvar, cachevar) \ +#define SEM_BRANCH_VIA_CACHE(cpu, abuf, newval, pcvar) \ do { \ (pcvar) = (newval); \ taken_p = 1; \ @@ -344,10 +328,12 @@ do { \ /* Instruction information. */ -/* Compile time computable instruction data. +/* Sanity check, at most one of these may be true. */ +#if WITH_PARALLEL_READ && WITH_PARALLEL_WRITE +#error "Both WITH_PARALLEL_READ && WITH_PARALLEL_WRITE can't be true." +#endif - ??? May wish to move parallel execution support into its own struct. - It's a fair bit of "clutter" for the "normal" case. */ +/* Compile time computable instruction data. */ struct insn_sem { /* The instruction type (a number that identifies each insn over the @@ -357,10 +343,8 @@ struct insn_sem { /* Index in IDESC table. */ int index; - /* Sanity check, at most one of these may be true. */ -#if WITH_PARALLEL_READ && WITH_PARALLEL_WRITE -#error "Both WITH_PARALLEL_READ && WITH_PARALLEL_WRITE can't be true." -#endif + /* Semantic format number. */ + int sfmt; #if WITH_PARALLEL_READ || WITH_PARALLEL_WRITE /* Index in IDESC table of parallel handler. */ @@ -368,50 +352,38 @@ struct insn_sem { #endif #if WITH_PARALLEL_READ -#ifndef __GNUC__ - /* Semantic format number of pre-read handler. - Only used by chips that support parallel execution of several insns. - It is always implemented as a `switch'. In the case of GNUC we use - computed gotos. When not GNUC, this is the argument to `switch'. */ - int fmt; -#endif + /* Index in IDESC table of read handler. */ + int read_index; #endif #if WITH_PARALLEL_WRITE - /* Index in IDESC table of writeback handler. - Only used by chips that support parallel execution of several insns. */ + /* Index in IDESC table of writeback handler. */ int write_index; #endif +}; - /* Routines to execute the insn. - The full version has all features (profiling,tracing) compiled in. - The fast version has none of that. */ -#if ! WITH_SEM_SWITCH_FULL - SEMANTIC_FN *sem_full; -#endif -#if WITH_FAST && ! WITH_SEM_SWITCH_FAST - SEMANTIC_FN *sem_fast; -#endif +/* Entry in semantic function table. + This information is copied to the insn descriptor table at run-time. */ + +struct sem_fn_desc { + /* Index in IDESC table. */ + int index; + + /* Function to perform the semantics of the insn. */ + SEMANTIC_FN *fn; }; /* Run-time computed instruction descriptor. */ struct idesc { - /* Parallel read-before-exec support. */ -#if WITH_PARALLEL_READ - struct idesc *par_idesc; +#if WITH_SEM_SWITCH_FAST #ifdef __GNUC__ - void *read; + void *sem_fast_lab; #else - int fmt; -#endif + /* nothing needed, switch's on `num' member */ #endif - - /* Parallel write-after-exec support. */ -#if WITH_PARALLEL_WRITE - /* Pointer to parallel handler if serial insn. - Pointer to writeback handler if parallel insn. */ - struct idesc *par_idesc; +#else + SEMANTIC_FN *sem_fast; #endif #if WITH_SEM_SWITCH_FULL @@ -424,20 +396,20 @@ struct idesc { SEMANTIC_FN *sem_full; #endif -#if WITH_SEM_SWITCH_FAST -#ifdef __GNUC__ - void *sem_fast_lab; -#else - /* nothing needed, switch's on `num' member */ -#endif -#else - SEMANTIC_FN *sem_fast; + /* Parallel support. */ +#if WITH_PARALLEL_READ || WITH_PARALLEL_WRITE + /* Pointer to parallel handler if serial insn. + Pointer to readahead/writeback handler if parallel insn. */ + struct idesc *par_idesc; #endif /* Instruction number (index in IDESC table, profile table). Also used to switch on in non-gcc semantic switches. */ int num; + /* Semantic format id. */ + int sfmt; + /* instruction data (name, attributes, size, etc.) */ const CGEN_INSN *idata; diff --git a/sim/common/cgen-scache.c b/sim/common/cgen-scache.c index c5ea075a9f1..890afc8edc2 100644 --- a/sim/common/cgen-scache.c +++ b/sim/common/cgen-scache.c @@ -313,6 +313,8 @@ scache_flush_cpu (SIM_CPU *cpu) SCACHE * scache_lookup (SIM_CPU *cpu, IADDR pc) { + /* FIXME: hash computation is wrong, doesn't take into account + NUM_HASH_CHAIN_ENTRIES. A lot of the hash table will be unused! */ unsigned int slot = HASH_PC (pc) & (CPU_SCACHE_NUM_HASH_CHAINS (cpu) - 1); int i, max_i = CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu); SCACHE_MAP *scm; @@ -343,6 +345,8 @@ scache_lookup (SIM_CPU *cpu, IADDR pc) SCACHE * scache_lookup_or_alloc (SIM_CPU *cpu, IADDR pc, int n, SCACHE **bufp) { + /* FIXME: hash computation is wrong, doesn't take into account + NUM_HASH_CHAIN_ENTRIES. A lot of the hash table will be unused! */ unsigned int slot = HASH_PC (pc) & (CPU_SCACHE_NUM_HASH_CHAINS (cpu) - 1); int i, max_i = CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu); SCACHE_MAP *scm; @@ -372,6 +376,7 @@ scache_lookup_or_alloc (SIM_CPU *cpu, IADDR pc, int n, SCACHE **bufp) static int next_free = 0; scm = & CPU_SCACHE_HASH_TABLE (cpu) [slot]; + /* FIXME: This seems rather clumsy. */ for (i = 0; i < next_free; ++i, ++scm) continue; ++next_free; @@ -381,6 +386,8 @@ scache_lookup_or_alloc (SIM_CPU *cpu, IADDR pc, int n, SCACHE **bufp) /* At this point SCM points to the hash table entry to use. Now make sure there's room in the cache. */ + /* FIXME: Kinda weird to use a next_free adjusted scm when cache is + flushed. */ { int elm_size = IMP_PROPS_SCACHE_ELM_SIZE (MACH_IMP_PROPS (CPU_MACH (cpu))); diff --git a/sim/common/cgen-scache.h b/sim/common/cgen-scache.h index 7ca4e65c471..b7a20de9915 100644 --- a/sim/common/cgen-scache.h +++ b/sim/common/cgen-scache.h @@ -69,10 +69,10 @@ typedef struct cpu_scache { SCACHE *next_free; #define CPU_SCACHE_NEXT_FREE(cpu) ((cpu) -> cgen_cpu.scache.next_free) - /* Address of cti-chain insn, only used by functional semantics, - not switch form. */ - SCACHE **pbb_br_npc_ptr; -#define CPU_PBB_BR_NPC_PTR(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_npc_ptr) + /* Kind of branch being taken. + Only used by functional semantics, not switch form. */ + SEM_BRANCH_TYPE pbb_br_type; +#define CPU_PBB_BR_TYPE(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_type) /* Target's branch address. */ IADDR pbb_br_npc; #define CPU_PBB_BR_NPC(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_npc) diff --git a/sim/common/genmloop.sh b/sim/common/genmloop.sh index 6720799a3ef..8a1b8d67dba 100644 --- a/sim/common/genmloop.sh +++ b/sim/common/genmloop.sh @@ -238,7 +238,7 @@ if [ x$pbb = xyes ] ; then echo "" echo "extern SEM_PC ${cpu}_pbb_begin (SIM_CPU *, int);" echo "extern SEM_PC ${cpu}_pbb_chain (SIM_CPU *, SEM_ARG);" - echo "extern SEM_PC ${cpu}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_PC *, PCADDR);" + echo "extern SEM_PC ${cpu}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);" echo "extern void ${cpu}_pbb_before (SIM_CPU *, SCACHE *);" echo "extern void ${cpu}_pbb_after (SIM_CPU *, SCACHE *);" fi @@ -372,10 +372,10 @@ fi # Note that this code may declare some locals. ${SHELL} $infile init -if [ x$parallel != xno ] ; then +if [ x$parallel = xread ] ; then cat << EOF -#if defined (HAVE_PARALLEL_EXEC) && defined (__GNUC__) +#if defined (__GNUC__) { if (! CPU_IDESC_READ_INIT_P (current_cpu)) { @@ -392,17 +392,19 @@ fi cat << EOF -#if WITH_SEM_SWITCH_FULL && defined (__GNUC__) - { - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { + if (! CPU_IDESC_SEM_INIT_P (current_cpu)) + { +#if WITH_SEM_SWITCH_FULL +#if defined (__GNUC__) /* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ #define DEFINE_LABELS #include "$switch" - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - } #endif +#else + @cpu@_sem_init_idesc_table (current_cpu); +#endif + CPU_IDESC_SEM_INIT_P (current_cpu) = 1; + } do { @@ -446,9 +448,10 @@ fi # simple engine ########################################################################## -# Scache engine: lookup insn in scache, fetch if missing, then execute it. +# Non-parallel scache engine: lookup insn in scache, fetch if missing, +# then execute it. -if [ x$scache = xyes ] ; then +if [ x$scache = xyes -a x$parallel = xno ] ; then cat << EOF @@ -463,7 +466,7 @@ static INLINE SCACHE * fetch and decode the instruction. */ if (sc->argbuf.addr != vpc) { - if (FAST_P) + if (! FAST_P) PROFILE_COUNT_SCACHE_MISS (current_cpu); /* begin extract-scache */ @@ -474,7 +477,7 @@ ${SHELL} $infile extract-scache cat << EOF /* end extract-scache */ } - else if (FAST_P) + else if (! FAST_P) { PROFILE_COUNT_SCACHE_HIT (current_cpu); /* Make core access statistics come out right. @@ -497,22 +500,182 @@ void EOF -if [ x$parallel != xno ] ; then - cat << EOF - PAREXEC pbufs[MAX_PARALLEL_INSNS]; - PAREXEC *par_exec; +# Any initialization code before looping starts. +# Note that this code may declare some locals. +${SHELL} $infile init + +cat << EOF + + if (! CPU_IDESC_SEM_INIT_P (current_cpu)) + { +#if ! WITH_SEM_SWITCH_FULL + @cpu@_sem_init_idesc_table (current_cpu); +#endif + CPU_IDESC_SEM_INIT_P (current_cpu) = 1; + } + + vpc = GET_H_PC (); + + do + { + SCACHE *sc; + + sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P); + +/* begin full-exec-scache */ +EOF + +${SHELL} $infile full-exec-scache + +cat << EOF +/* end full-exec-scache */ + + SET_H_PC (vpc); + + ++ CPU_INSN_COUNT (current_cpu); + } + while (0 /*CPU_RUNNING_P (current_cpu)*/); +} + +#undef FAST_P + +EOF + +#################################### + +# Non-parallel scache engine: fast version. + +if [ x$fast = xyes ] ; then + + cat << EOF + +#define FAST_P 1 + +void +@cpu@_engine_run_fast (SIM_CPU *current_cpu) +{ + SIM_DESC current_state = CPU_STATE (current_cpu); + SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); + unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu); + SEM_PC vpc; EOF -fi # Any initialization code before looping starts. # Note that this code may declare some locals. ${SHELL} $infile init -if [ x$parallel != xno ] ; then - cat << EOF +cat << EOF -#if defined (HAVE_PARALLEL_EXEC) && defined (__GNUC__) + if (! CPU_IDESC_SEM_INIT_P (current_cpu)) + { +#if WITH_SEM_SWITCH_FAST +#if defined (__GNUC__) +/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ +#define DEFINE_LABELS +#include "$switch" +#endif +#else + @cpu@_semf_init_idesc_table (current_cpu); +#endif + CPU_IDESC_SEM_INIT_P (current_cpu) = 1; + } + + vpc = GET_H_PC (); + + do + { + SCACHE *sc; + + sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P); + +/* begin fast-exec-scache */ +EOF + +${SHELL} $infile fast-exec-scache + +cat << EOF +/* end fast-exec-scache */ + + SET_H_PC (vpc); + + ++ CPU_INSN_COUNT (current_cpu); + } + while (0 /*CPU_RUNNING_P (current_cpu)*/); +} + +#undef FAST_P + +EOF + +fi # -fast + +fi # -scache && ! parallel + +########################################################################## + +# Parallel scache engine: lookup insn in scache, fetch if missing, +# then execute it. +# For the parallel case we give the target more flexibility. + +if [ x$scache = xyes -a x$parallel != xno ] ; then + + cat << EOF + +static INLINE SCACHE * +@cpu@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache, + unsigned int hash_mask, int *last_insn_p, int FAST_P) +{ + /* First step: look up current insn in hash table. */ + SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask); + + /* If the entry isn't the one we want (cache miss), + fetch and decode the instruction. */ + if (sc->argbuf.addr != vpc) + { + if (! FAST_P) + PROFILE_COUNT_SCACHE_MISS (current_cpu); + +#define SET_LAST_INSN_P(last_p) do { *last_insn_p = (last_p); } while (0) +/* begin extract-scache */ +EOF + +${SHELL} $infile extract-scache + +cat << EOF +/* end extract-scache */ +#undef SET_LAST_INSN_P + } + else if (! FAST_P) + { + PROFILE_COUNT_SCACHE_HIT (current_cpu); + /* Make core access statistics come out right. + The size is a guess, but it's currently not used either. */ + PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map); + } + + return sc; +} + +#define FAST_P 0 + +void +@cpu@_engine_run_full (SIM_CPU *current_cpu) +{ + SIM_DESC current_state = CPU_STATE (current_cpu); + SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); + unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu); + SEM_PC vpc; + +EOF + +# Any initialization code before looping starts. +# Note that this code may declare some locals. +${SHELL} $infile init + +if [ x$parallel = xread ] ; then +cat << EOF +#if defined (__GNUC__) { if (! CPU_IDESC_READ_INIT_P (current_cpu)) { @@ -529,14 +692,18 @@ fi cat << EOF + if (! CPU_IDESC_SEM_INIT_P (current_cpu)) + { +#if ! WITH_SEM_SWITCH_FULL + @cpu@_sem_init_idesc_table (current_cpu); +#endif + CPU_IDESC_SEM_INIT_P (current_cpu) = 1; + } + vpc = GET_H_PC (); do { - SCACHE *sc; - - sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P); - /* begin full-exec-scache */ EOF @@ -544,10 +711,6 @@ ${SHELL} $infile full-exec-scache cat << EOF /* end full-exec-scache */ - - SET_H_PC (vpc); - - ++ CPU_INSN_COUNT (current_cpu); } while (0 /*CPU_RUNNING_P (current_cpu)*/); } @@ -558,7 +721,7 @@ EOF #################################### -# Scache engine: fast version. +# Parallel scache engine: fast version. if [ x$fast = xyes ] ; then @@ -573,25 +736,19 @@ void SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu); SEM_PC vpc; - -EOF - -if [ x$parallel != xno ] ; then - cat << EOF PAREXEC pbufs[MAX_PARALLEL_INSNS]; PAREXEC *par_exec; EOF -fi # Any initialization code before looping starts. # Note that this code may declare some locals. ${SHELL} $infile init -if [ x$parallel != xno ] ; then - cat << EOF +if [ x$parallel = xread ] ; then +cat << EOF -#if defined (HAVE_PARALLEL_EXEC) && defined (__GNUC__) +#if defined (__GNUC__) { if (! CPU_IDESC_READ_INIT_P (current_cpu)) { @@ -604,30 +761,28 @@ if [ x$parallel != xno ] ; then #endif EOF -fi # parallel != no +fi cat << EOF -#if WITH_SEM_SWITCH_FAST && defined (__GNUC__) - { - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { + if (! CPU_IDESC_SEM_INIT_P (current_cpu)) + { +#if WITH_SEM_SWITCH_FAST +#if defined (__GNUC__) /* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ #define DEFINE_LABELS #include "$switch" - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - } #endif +#else + @cpu@_semf_init_idesc_table (current_cpu); +#endif + CPU_IDESC_SEM_INIT_P (current_cpu) = 1; + } vpc = GET_H_PC (); do { - SCACHE *sc; - - sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P); - /* begin fast-exec-scache */ EOF @@ -635,10 +790,6 @@ ${SHELL} $infile fast-exec-scache cat << EOF /* end fast-exec-scache */ - - SET_H_PC (vpc); - - ++ CPU_INSN_COUNT (current_cpu); } while (0 /*CPU_RUNNING_P (current_cpu)*/); } @@ -649,7 +800,7 @@ EOF fi # -fast -fi # -scache +fi # -scache && parallel ########################################################################## @@ -766,6 +917,7 @@ cat << EOF sc->argbuf.addr = pc; sc->argbuf.fields.chain.insn_count = _insn_count; sc->argbuf.fields.chain.next = 0; + sc->argbuf.fields.chain.branch_target = 0; ++sc; } @@ -817,15 +969,17 @@ INLINE SEM_PC } /* Chain to the next block from a cti terminated previous block. - NEW_VPC_PTR is one of SEM_BRANCH_UNTAKEN, SEM_BRANCH_UNCACHEABLE, or - a pointer to a location containing the SEM_PC of the branch's address. + BR_TYPE indicates whether the branch was taken and whether we can cache + the vpc of the branch target. NEW_PC is the target's branch address, and is only valid if - NEW_VPC_PTR != SEM_BRANCH_UNTAKEN. */ + BR_TYPE != SEM_BRANCH_UNTAKEN. */ INLINE SEM_PC @cpu@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg, - SEM_PC *new_vpc_ptr, PCADDR new_pc) + SEM_BRANCH_TYPE br_type, PCADDR new_pc) { + SEM_PC *new_vpc_ptr; + PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg); /* If not running forever, exit back to main loop. */ @@ -841,7 +995,7 @@ INLINE SEM_PC /* Restart compiler if we branched to an uncacheable address (e.g. "j reg"). */ - if (new_vpc_ptr == SEM_BRANCH_UNCACHEABLE) + if (br_type == SEM_BRANCH_UNCACHEABLE) { SET_H_PC (new_pc); return CPU_SCACHE_PBB_BEGIN (current_cpu); @@ -849,22 +1003,25 @@ INLINE SEM_PC /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our next chain ptr. */ - if (new_vpc_ptr == SEM_BRANCH_UNTAKEN) + if (br_type == SEM_BRANCH_UNTAKEN) { ARGBUF *abuf = SEM_ARGBUF (sem_arg); - SET_H_PC (abuf->addr); + new_pc = abuf->addr; + SET_H_PC (new_pc); new_vpc_ptr = &abuf->fields.chain.next; } else { + ARGBUF *abuf = SEM_ARGBUF (sem_arg); SET_H_PC (new_pc); + new_vpc_ptr = &abuf->fields.chain.branch_target; } /* If chained to next block, go straight to it. */ if (*new_vpc_ptr) return *new_vpc_ptr; /* See if next block has already been compiled. */ - *new_vpc_ptr = scache_lookup (current_cpu, GET_H_PC ()); + *new_vpc_ptr = scache_lookup (current_cpu, new_pc); if (*new_vpc_ptr) return *new_vpc_ptr; /* Nope, so next insn is a virtual insn to invoke the compiler @@ -955,8 +1112,8 @@ void SEM_PC vpc; #if WITH_SEM_SWITCH_FULL /* For communication between cti's and cti-chain. */ + SEM_BRANCH_TYPE pbb_br_type; PCADDR pbb_br_npc; - SEM_PC *pbb_br_npc_ptr; #endif EOF @@ -983,11 +1140,15 @@ cat << EOF a pbb). And in the "let's run until we're done" case we don't return until the program exits. */ -#if WITH_SEM_SWITCH_FULL && defined (__GNUC__) +#if WITH_SEM_SWITCH_FULL +#if defined (__GNUC__) /* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ #define DEFINE_LABELS #include "$switch" #endif +#else + @cpu@_sem_init_idesc_table (current_cpu); +#endif /* Initialize the "begin (compile) a pbb" virtual insn. */ vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); @@ -1041,8 +1202,8 @@ void SEM_PC vpc; #if WITH_SEM_SWITCH_FAST /* For communication between cti's and cti-chain. */ + SEM_BRANCH_TYPE pbb_br_type; PCADDR pbb_br_npc; - SEM_PC *pbb_br_npc_ptr; #endif EOF @@ -1069,11 +1230,15 @@ cat << EOF a pbb). And in the "let's run until we're done" case we don't return until the program exits. */ -#if WITH_SEM_SWITCH_FAST && defined (__GNUC__) +#if WITH_SEM_SWITCH_FAST +#if defined (__GNUC__) /* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ #define DEFINE_LABELS #include "$switch" #endif +#else + @cpu@_semf_init_idesc_table (current_cpu); +#endif /* Initialize the "begin (compile) a pbb" virtual insn. */ vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog index 16ad6d4826c..7b399705d75 100644 --- a/sim/fr30/ChangeLog +++ b/sim/fr30/ChangeLog @@ -1,3 +1,11 @@ +1999-08-09 Doug Evans <devans@casey.cygnus.com> + + * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. + +1999-08-04 Doug Evans <devans@casey.cygnus.com> + + * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. + 1999-07-06 Doug Evans <devans@casey.cygnus.com> * cpu.h,decode.h,model.c,sem-switch.c,sem.c: Rebuild. diff --git a/sim/fr30/cpu.h b/sim/fr30/cpu.h index fa07884071b..27745da1e3c 100644 --- a/sim/fr30/cpu.h +++ b/sim/fr30/cpu.h @@ -189,536 +189,227 @@ typedef struct { UINT load_regs_pending; } MODEL_FR30_1_DATA; +/* Instruction argument buffer. */ + union sem_fields { - struct { /* empty sformat for unspecified field list */ - int empty; - } fmt_empty; - struct { /* e.g. add $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_add; - struct { /* e.g. add $u4,$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_addi; - struct { /* e.g. add2 $m4,$Ri */ - SI f_m4; - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_add2; - struct { /* e.g. addc $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_addc; - struct { /* e.g. addn $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_addn; - struct { /* e.g. addn $u4,$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_addni; - struct { /* e.g. addn2 $m4,$Ri */ - SI f_m4; - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_addn2; - struct { /* e.g. cmp $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_cmp; - struct { /* e.g. cmp $u4,$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - } fmt_cmpi; - struct { /* e.g. cmp2 $m4,$Ri */ - SI f_m4; - SI * i_Ri; - unsigned char in_Ri; - } fmt_cmp2; - struct { /* e.g. and $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_and; - struct { /* e.g. and $Rj,@$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_andm; - struct { /* e.g. andh $Rj,@$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_andh; - struct { /* e.g. andb $Rj,@$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_andb; - struct { /* e.g. bandl $u4,@$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - } fmt_bandl; - struct { /* e.g. btstl $u4,@$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - } fmt_btstl; - struct { /* e.g. mul $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_mul; - struct { /* e.g. mulu $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_mulu; - struct { /* e.g. mulh $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_mulh; - struct { /* e.g. div0s $Ri */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_div0s; - struct { /* e.g. div0u $Ri */ - int empty; - } fmt_div0u; - struct { /* e.g. div1 $Ri */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_div1; - struct { /* e.g. div2 $Ri */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_div2; - struct { /* e.g. div3 */ - int empty; - } fmt_div3; - struct { /* e.g. div4s */ - int empty; - } fmt_div4s; - struct { /* e.g. lsl $Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_lsl; - struct { /* e.g. lsl $u4,$Ri */ - UINT f_u4; - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_lsli; - struct { /* e.g. ldi:8 $i8,$Ri */ - UINT f_i8; - SI * i_Ri; - unsigned char out_Ri; - } fmt_ldi8; - struct { /* e.g. ldi:20 $i20,$Ri */ - UINT f_i20; - SI * i_Ri; - unsigned char out_Ri; - } fmt_ldi20; - struct { /* e.g. ldi:32 $i32,$Ri */ - UINT f_i32; - SI * i_Ri; - unsigned char out_Ri; - } fmt_ldi32; - struct { /* e.g. ld @$Rj,$Ri */ - SI * i_Rj; - SI * i_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_ld; - struct { /* e.g. ld @($R13,$Rj),$Ri */ - SI * i_Rj; - SI * i_Ri; - unsigned char in_Rj; - unsigned char in_h_gr_13; - unsigned char out_Ri; - } fmt_ldr13; - struct { /* e.g. ld @($R14,$disp10),$Ri */ - SI f_disp10; - SI * i_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } fmt_ldr14; - struct { /* e.g. lduh @($R14,$disp9),$Ri */ - SI f_disp9; - SI * i_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } fmt_ldr14uh; - struct { /* e.g. ldub @($R14,$disp8),$Ri */ - INT f_disp8; - SI * i_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } fmt_ldr14ub; - struct { /* e.g. ld @($R15,$udisp6),$Ri */ - USI f_udisp6; - SI * i_Ri; - unsigned char in_h_gr_15; - unsigned char out_Ri; - } fmt_ldr15; - struct { /* e.g. ld @$R15+,$Ri */ - UINT f_Ri; - SI * i_Ri; - unsigned char in_h_gr_15; - unsigned char out_Ri; - unsigned char out_h_gr_15; - } fmt_ldr15gr; - struct { /* e.g. ld @$R15+,$Rs2 */ - UINT f_Rs2; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_ldr15dr; - struct { /* e.g. ld @$R15+,$ps */ - int empty; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_ldr15ps; - struct { /* e.g. st $Ri,@$Rj */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - } fmt_st; - struct { /* e.g. st $Ri,@($R13,$Rj) */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char in_h_gr_13; - } fmt_str13; - struct { /* e.g. st $Ri,@($R14,$disp10) */ - SI f_disp10; - SI * i_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } fmt_str14; - struct { /* e.g. sth $Ri,@($R14,$disp9) */ - SI f_disp9; - SI * i_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } fmt_str14h; - struct { /* e.g. stb $Ri,@($R14,$disp8) */ - INT f_disp8; - SI * i_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } fmt_str14b; - struct { /* e.g. st $Ri,@($R15,$udisp6) */ - USI f_udisp6; - SI * i_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_15; - } fmt_str15; - struct { /* e.g. st $Ri,@-$R15 */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_str15gr; - struct { /* e.g. st $Rs2,@-$R15 */ - UINT f_Rs2; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_str15dr; - struct { /* e.g. st $ps,@-$R15 */ - int empty; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_str15ps; - struct { /* e.g. mov $Rj,$Ri */ - SI * i_Rj; - SI * i_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_mov; - struct { /* e.g. mov $Rs1,$Ri */ - UINT f_Rs1; - SI * i_Ri; - unsigned char out_Ri; - } fmt_movdr; - struct { /* e.g. mov $ps,$Ri */ - SI * i_Ri; - unsigned char out_Ri; - } fmt_movps; - struct { /* e.g. mov $Ri,$Rs1 */ - UINT f_Rs1; - SI * i_Ri; - unsigned char in_Ri; - } fmt_mov2dr; - struct { /* e.g. mov $Ri,$ps */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_mov2ps; - struct { /* e.g. bno:d $label9 */ - int empty; - } fmt_bnod; - struct { /* e.g. dmov $R13,@$dir10 */ - USI f_dir10; - unsigned char in_h_gr_13; - } fmt_dmovr13; - struct { /* e.g. dmovh $R13,@$dir9 */ - USI f_dir9; - unsigned char in_h_gr_13; - } fmt_dmovr13h; - struct { /* e.g. dmovb $R13,@$dir8 */ - UINT f_dir8; - unsigned char in_h_gr_13; - } fmt_dmovr13b; - struct { /* e.g. dmov @$R13+,@$dir10 */ - USI f_dir10; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmovr13pi; - struct { /* e.g. dmovh @$R13+,@$dir9 */ - USI f_dir9; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmovr13pih; - struct { /* e.g. dmovb @$R13+,@$dir8 */ - UINT f_dir8; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmovr13pib; - struct { /* e.g. dmov @$R15+,@$dir10 */ - USI f_dir10; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_dmovr15pi; - struct { /* e.g. dmov @$dir10,$R13 */ - USI f_dir10; - unsigned char out_h_gr_13; - } fmt_dmov2r13; - struct { /* e.g. dmovh @$dir9,$R13 */ - USI f_dir9; - unsigned char out_h_gr_13; - } fmt_dmov2r13h; - struct { /* e.g. dmovb @$dir8,$R13 */ - UINT f_dir8; - unsigned char out_h_gr_13; - } fmt_dmov2r13b; - struct { /* e.g. dmov @$dir10,@$R13+ */ - USI f_dir10; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmov2r13pi; - struct { /* e.g. dmovh @$dir9,@$R13+ */ - USI f_dir9; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmov2r13pih; - struct { /* e.g. dmovb @$dir8,@$R13+ */ - UINT f_dir8; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } fmt_dmov2r13pib; - struct { /* e.g. dmov @$dir10,@-$R15 */ - USI f_dir10; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_dmov2r15pd; - struct { /* e.g. ldres @$Ri+,$u4 */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_ldres; - struct { /* e.g. copop $u4c,$ccc,$CRj,$CRi */ - int empty; - } fmt_copop; - struct { /* e.g. andccr $u8 */ - UINT f_u8; - } fmt_andccr; - struct { /* e.g. stilm $u8 */ - UINT f_u8; - } fmt_stilm; - struct { /* e.g. addsp $s10 */ - SI f_s10; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } fmt_addsp; - struct { /* e.g. extsb $Ri */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_extsb; - struct { /* e.g. extub $Ri */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_extub; - struct { /* e.g. extsh $Ri */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_extsh; - struct { /* e.g. extuh $Ri */ - SI * i_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } fmt_extuh; - struct { /* e.g. ldm0 ($reglist_low_ld) */ - UINT f_reglist_low_ld; - unsigned char in_h_gr_15; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - } fmt_ldm0; - struct { /* e.g. ldm1 ($reglist_hi_ld) */ - UINT f_reglist_hi_ld; - unsigned char in_h_gr_15; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } fmt_ldm1; - struct { /* e.g. stm0 ($reglist_low_st) */ - UINT f_reglist_low_st; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char out_h_gr_15; - } fmt_stm0; - struct { /* e.g. stm1 ($reglist_hi_st) */ - UINT f_reglist_hi_st; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_15; - } fmt_stm1; - struct { /* e.g. enter $u10 */ - USI f_u10; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - } fmt_enter; - struct { /* e.g. leave */ - int empty; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - } fmt_leave; - struct { /* e.g. xchb @$Rj,$Ri */ - SI * i_Ri; - SI * i_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } fmt_xchb; - /* cti insns, kept separately so addr_cache is in fixed place */ - struct { - union { - struct { /* e.g. jmp @$Ri */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_jmp; - struct { /* e.g. call @$Ri */ - SI * i_Ri; - unsigned char in_Ri; - } fmt_callr; - struct { /* e.g. call $label12 */ - IADDR i_label12; - } fmt_call; - struct { /* e.g. ret */ - int empty; - } fmt_ret; - struct { /* e.g. int $u8 */ - UINT f_u8; - } fmt_int; - struct { /* e.g. inte */ - int empty; - } fmt_inte; - struct { /* e.g. reti */ - int empty; - } fmt_reti; - struct { /* e.g. bra:d $label9 */ - IADDR i_label9; - } fmt_brad; - struct { /* e.g. beq:d $label9 */ - IADDR i_label9; - } fmt_beqd; - struct { /* e.g. bc:d $label9 */ - IADDR i_label9; - } fmt_bcd; - struct { /* e.g. bn:d $label9 */ - IADDR i_label9; - } fmt_bnd; - struct { /* e.g. bv:d $label9 */ - IADDR i_label9; - } fmt_bvd; - struct { /* e.g. blt:d $label9 */ - IADDR i_label9; - } fmt_bltd; - struct { /* e.g. ble:d $label9 */ - IADDR i_label9; - } fmt_bled; - struct { /* e.g. bls:d $label9 */ - IADDR i_label9; - } fmt_blsd; - } fields; -#if WITH_SCACHE_PBB - SEM_PC addr_cache; -#endif - } cti; + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + IADDR i_label9; + } sfmt_brad; + struct { /* */ + UINT f_u8; + } sfmt_int; + struct { /* */ + IADDR i_label12; + } sfmt_call; + struct { /* */ + SI f_s10; + unsigned char in_h_gr_15; + unsigned char out_h_gr_15; + } sfmt_addsp; + struct { /* */ + USI f_dir10; + unsigned char in_h_gr_15; + unsigned char out_h_gr_15; + } sfmt_dmovr15pi; + struct { /* */ + UINT f_dir8; + unsigned char in_h_gr_13; + unsigned char out_h_gr_13; + } sfmt_dmovr13pib; + struct { /* */ + USI f_dir9; + unsigned char in_h_gr_13; + unsigned char out_h_gr_13; + } sfmt_dmovr13pih; + struct { /* */ + USI f_dir10; + unsigned char in_h_gr_13; + unsigned char out_h_gr_13; + } sfmt_dmovr13pi; + struct { /* */ + SI* i_Ri; + UINT f_Rs1; + unsigned char in_Ri; + } sfmt_mov2dr; + struct { /* */ + SI* i_Ri; + UINT f_Rs1; + unsigned char out_Ri; + } sfmt_movdr; + struct { /* */ + UINT f_Rs2; + unsigned char in_h_gr_15; + unsigned char out_h_gr_15; + } sfmt_ldr15dr; + struct { /* */ + SI* i_Ri; + UINT f_i32; + unsigned char out_Ri; + } sfmt_ldi32; + struct { /* */ + SI* i_Ri; + UINT f_i20; + unsigned char out_Ri; + } sfmt_ldi20; + struct { /* */ + SI* i_Ri; + UINT f_i8; + unsigned char out_Ri; + } sfmt_ldi8; + struct { /* */ + SI* i_Ri; + unsigned char in_Ri; + unsigned char in_h_gr_15; + unsigned char out_h_gr_15; + } sfmt_str15gr; + struct { /* */ + SI* i_Ri; + USI f_udisp6; + unsigned char in_Ri; + unsigned char in_h_gr_15; + } sfmt_str15; + struct { /* */ + SI* i_Ri; + INT f_disp8; + unsigned char in_Ri; + unsigned char in_h_gr_14; + } sfmt_str14b; + struct { /* */ + SI* i_Ri; + SI f_disp9; + unsigned char in_Ri; + unsigned char in_h_gr_14; + } sfmt_str14h; + struct { /* */ + SI* i_Ri; + SI f_disp10; + unsigned char in_Ri; + unsigned char in_h_gr_14; + } sfmt_str14; + struct { /* */ + SI* i_Ri; + USI f_udisp6; + unsigned char in_h_gr_15; + unsigned char out_Ri; + } sfmt_ldr15; + struct { /* */ + SI* i_Ri; + INT f_disp8; + unsigned char in_h_gr_14; + unsigned char out_Ri; + } sfmt_ldr14ub; + struct { /* */ + SI* i_Ri; + SI f_disp9; + unsigned char in_h_gr_14; + unsigned char out_Ri; + } sfmt_ldr14uh; + struct { /* */ + SI* i_Ri; + SI f_disp10; + unsigned char in_h_gr_14; + unsigned char out_Ri; + } sfmt_ldr14; + struct { /* */ + SI* i_Ri; + SI f_m4; + unsigned char in_Ri; + unsigned char out_Ri; + } sfmt_add2; + struct { /* */ + SI* i_Ri; + UINT f_u4; + unsigned char in_Ri; + unsigned char out_Ri; + } sfmt_addi; + struct { /* */ + USI f_u10; + unsigned char in_h_gr_14; + unsigned char in_h_gr_15; + unsigned char out_h_gr_14; + unsigned char out_h_gr_15; + } sfmt_enter; + struct { /* */ + SI* i_Ri; + SI* i_Rj; + unsigned char in_Ri; + unsigned char in_Rj; + unsigned char in_h_gr_13; + } sfmt_str13; + struct { /* */ + SI* i_Ri; + UINT f_Ri; + unsigned char in_h_gr_15; + unsigned char out_Ri; + unsigned char out_h_gr_15; + } sfmt_ldr15gr; + struct { /* */ + SI* i_Ri; + SI* i_Rj; + unsigned char in_Rj; + unsigned char in_h_gr_13; + unsigned char out_Ri; + } sfmt_ldr13; + struct { /* */ + SI* i_Ri; + SI* i_Rj; + unsigned char in_Ri; + unsigned char in_Rj; + unsigned char out_Ri; + } sfmt_add; + struct { /* */ + UINT f_reglist_hi_st; + unsigned char in_h_gr_10; + unsigned char in_h_gr_11; + unsigned char in_h_gr_12; + unsigned char in_h_gr_13; + unsigned char in_h_gr_14; + unsigned char in_h_gr_15; + unsigned char in_h_gr_8; + unsigned char in_h_gr_9; + unsigned char out_h_gr_15; + } sfmt_stm1; + struct { /* */ + UINT f_reglist_hi_ld; + unsigned char in_h_gr_15; + unsigned char out_h_gr_10; + unsigned char out_h_gr_11; + unsigned char out_h_gr_12; + unsigned char out_h_gr_13; + unsigned char out_h_gr_14; + unsigned char out_h_gr_15; + unsigned char out_h_gr_8; + unsigned char out_h_gr_9; + } sfmt_ldm1; + struct { /* */ + UINT f_reglist_low_st; + unsigned char in_h_gr_0; + unsigned char in_h_gr_1; + unsigned char in_h_gr_15; + unsigned char in_h_gr_2; + unsigned char in_h_gr_3; + unsigned char in_h_gr_4; + unsigned char in_h_gr_5; + unsigned char in_h_gr_6; + unsigned char in_h_gr_7; + unsigned char out_h_gr_15; + } sfmt_stm0; + struct { /* */ + UINT f_reglist_low_ld; + unsigned char in_h_gr_15; + unsigned char out_h_gr_0; + unsigned char out_h_gr_1; + unsigned char out_h_gr_15; + unsigned char out_h_gr_2; + unsigned char out_h_gr_3; + unsigned char out_h_gr_4; + unsigned char out_h_gr_5; + unsigned char out_h_gr_6; + unsigned char out_h_gr_7; + } sfmt_ldm0; #if WITH_SCACHE_PBB /* Writeback handler. */ struct { @@ -740,6 +431,7 @@ union sem_fields { int insn_count; /* Next pbb to execute. */ SCACHE *next; + SCACHE *branch_target; } chain; #endif }; @@ -751,6 +443,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ union sem semantic; int written; @@ -771,13 +466,11 @@ struct scache { These define and assign the local vars that contain the insn's fields. */ #define EXTRACT_IFMT_EMPTY_VARS \ - /* Instruction fields. */ \ unsigned int length; #define EXTRACT_IFMT_EMPTY_CODE \ length = 0; \ #define EXTRACT_IFMT_ADD_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_Rj; \ @@ -791,7 +484,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_ADDI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_u4; \ @@ -805,7 +497,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_ADD2_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ SI f_m4; \ @@ -819,7 +510,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_DIV0S_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_op3; \ @@ -833,7 +523,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_DIV3_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_op3; \ @@ -847,7 +536,6 @@ struct scache { f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDI8_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_i8; \ UINT f_Ri; \ @@ -859,7 +547,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDI20_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_i20_4; \ UINT f_i20_16; \ @@ -882,7 +569,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDI32_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_i32; \ UINT f_op2; \ @@ -903,7 +589,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDR14_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ SI f_disp10; \ UINT f_Ri; \ @@ -915,7 +600,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDR14UH_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ SI f_disp9; \ UINT f_Ri; \ @@ -927,7 +611,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDR14UB_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ INT f_disp8; \ UINT f_Ri; \ @@ -939,7 +622,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDR15_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ USI f_udisp6; \ @@ -953,7 +635,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LDR15DR_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_op3; \ @@ -967,7 +648,6 @@ struct scache { f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_MOVDR_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_Rs1; \ @@ -981,7 +661,6 @@ struct scache { f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_CALL_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op5; \ SI f_rel12; \ @@ -993,7 +672,6 @@ struct scache { f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \ #define EXTRACT_IFMT_INT_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_u8; \ @@ -1005,7 +683,6 @@ struct scache { f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_BRAD_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_cc; \ SI f_rel9; \ @@ -1017,7 +694,6 @@ struct scache { f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \ #define EXTRACT_IFMT_DMOVR13_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ USI f_dir10; \ @@ -1029,7 +705,6 @@ struct scache { f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ #define EXTRACT_IFMT_DMOVR13H_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ USI f_dir9; \ @@ -1041,7 +716,6 @@ struct scache { f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \ #define EXTRACT_IFMT_DMOVR13B_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_dir8; \ @@ -1053,7 +727,6 @@ struct scache { f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_COPOP_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_ccc; \ UINT f_op2; \ @@ -1076,7 +749,6 @@ struct scache { f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ #define EXTRACT_IFMT_COPLD_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_ccc; \ UINT f_op2; \ @@ -1099,7 +771,6 @@ struct scache { f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ #define EXTRACT_IFMT_COPST_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_ccc; \ UINT f_op2; \ @@ -1122,7 +793,6 @@ struct scache { f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ #define EXTRACT_IFMT_ADDSP_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ SI f_s10; \ @@ -1134,7 +804,6 @@ struct scache { f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \ #define EXTRACT_IFMT_LDM0_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_reglist_low_ld; \ @@ -1146,7 +815,6 @@ struct scache { f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_LDM1_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_reglist_hi_ld; \ @@ -1158,7 +826,6 @@ struct scache { f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_STM0_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_reglist_low_st; \ @@ -1170,7 +837,6 @@ struct scache { f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_STM1_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ UINT f_reglist_hi_st; \ @@ -1182,7 +848,6 @@ struct scache { f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_ENTER_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_op2; \ USI f_u10; \ diff --git a/sim/fr30/cpuall.h b/sim/fr30/cpuall.h index dc8ed961395..f0ebb90cfb9 100644 --- a/sim/fr30/cpuall.h +++ b/sim/fr30/cpuall.h @@ -44,6 +44,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ }; #endif diff --git a/sim/fr30/decode.c b/sim/fr30/decode.c index ef87676bd45..3ed6a11a481 100644 --- a/sim/fr30/decode.c +++ b/sim/fr30/decode.c @@ -28,29 +28,6 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "sim-main.h" #include "sim-assert.h" -/* FIXME: Need to review choices for the following. */ - -#if WITH_SEM_SWITCH_FULL -#define FULL(fn) -#else -#define FULL(fn) CONCAT3 (fr30bf,_sem_,fn) , -#endif - -#if WITH_FAST -#if WITH_SEM_SWITCH_FAST -#define FAST(fn) -#else -#define FAST(fn) CONCAT3 (fr30bf,_semf_,fn) , /* f for fast */ -#endif -#else -#define FAST(fn) -#endif - -/* The INSN_ prefix is not here and is instead part of the `insn' argument - to avoid collisions with header files (e.g. `AND' in ansidecl.h). */ -#define IDX(insn) CONCAT2 (FR30BF_,insn) -#define TYPE(insn) CONCAT2 (FR30_,insn) - /* The instruction descriptor array. This is computed at runtime. Space for it is not malloc'd to save a teensy bit of cpu in the decoder. Moving it to malloc space is trivial @@ -63,190 +40,183 @@ static IDESC fr30bf_insn_data[FR30BF_INSN_MAX]; static const struct insn_sem fr30bf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) }, - { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) }, - { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) }, - { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) }, - { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) }, - { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) }, - { TYPE (INSN_ADD), IDX (INSN_ADD), FULL (add) FAST (add) }, - { TYPE (INSN_ADDI), IDX (INSN_ADDI), FULL (addi) FAST (addi) }, - { TYPE (INSN_ADD2), IDX (INSN_ADD2), FULL (add2) FAST (add2) }, - { TYPE (INSN_ADDC), IDX (INSN_ADDC), FULL (addc) FAST (addc) }, - { TYPE (INSN_ADDN), IDX (INSN_ADDN), FULL (addn) FAST (addn) }, - { TYPE (INSN_ADDNI), IDX (INSN_ADDNI), FULL (addni) FAST (addni) }, - { TYPE (INSN_ADDN2), IDX (INSN_ADDN2), FULL (addn2) FAST (addn2) }, - { TYPE (INSN_SUB), IDX (INSN_SUB), FULL (sub) FAST (sub) }, - { TYPE (INSN_SUBC), IDX (INSN_SUBC), FULL (subc) FAST (subc) }, - { TYPE (INSN_SUBN), IDX (INSN_SUBN), FULL (subn) FAST (subn) }, - { TYPE (INSN_CMP), IDX (INSN_CMP), FULL (cmp) FAST (cmp) }, - { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) }, - { TYPE (INSN_CMP2), IDX (INSN_CMP2), FULL (cmp2) FAST (cmp2) }, - { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) }, - { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) }, - { TYPE (INSN_EOR), IDX (INSN_EOR), FULL (eor) FAST (eor) }, - { TYPE (INSN_ANDM), IDX (INSN_ANDM), FULL (andm) FAST (andm) }, - { TYPE (INSN_ANDH), IDX (INSN_ANDH), FULL (andh) FAST (andh) }, - { TYPE (INSN_ANDB), IDX (INSN_ANDB), FULL (andb) FAST (andb) }, - { TYPE (INSN_ORM), IDX (INSN_ORM), FULL (orm) FAST (orm) }, - { TYPE (INSN_ORH), IDX (INSN_ORH), FULL (orh) FAST (orh) }, - { TYPE (INSN_ORB), IDX (INSN_ORB), FULL (orb) FAST (orb) }, - { TYPE (INSN_EORM), IDX (INSN_EORM), FULL (eorm) FAST (eorm) }, - { TYPE (INSN_EORH), IDX (INSN_EORH), FULL (eorh) FAST (eorh) }, - { TYPE (INSN_EORB), IDX (INSN_EORB), FULL (eorb) FAST (eorb) }, - { TYPE (INSN_BANDL), IDX (INSN_BANDL), FULL (bandl) FAST (bandl) }, - { TYPE (INSN_BORL), IDX (INSN_BORL), FULL (borl) FAST (borl) }, - { TYPE (INSN_BEORL), IDX (INSN_BEORL), FULL (beorl) FAST (beorl) }, - { TYPE (INSN_BANDH), IDX (INSN_BANDH), FULL (bandh) FAST (bandh) }, - { TYPE (INSN_BORH), IDX (INSN_BORH), FULL (borh) FAST (borh) }, - { TYPE (INSN_BEORH), IDX (INSN_BEORH), FULL (beorh) FAST (beorh) }, - { TYPE (INSN_BTSTL), IDX (INSN_BTSTL), FULL (btstl) FAST (btstl) }, - { TYPE (INSN_BTSTH), IDX (INSN_BTSTH), FULL (btsth) FAST (btsth) }, - { TYPE (INSN_MUL), IDX (INSN_MUL), FULL (mul) FAST (mul) }, - { TYPE (INSN_MULU), IDX (INSN_MULU), FULL (mulu) FAST (mulu) }, - { TYPE (INSN_MULH), IDX (INSN_MULH), FULL (mulh) FAST (mulh) }, - { TYPE (INSN_MULUH), IDX (INSN_MULUH), FULL (muluh) FAST (muluh) }, - { TYPE (INSN_DIV0S), IDX (INSN_DIV0S), FULL (div0s) FAST (div0s) }, - { TYPE (INSN_DIV0U), IDX (INSN_DIV0U), FULL (div0u) FAST (div0u) }, - { TYPE (INSN_DIV1), IDX (INSN_DIV1), FULL (div1) FAST (div1) }, - { TYPE (INSN_DIV2), IDX (INSN_DIV2), FULL (div2) FAST (div2) }, - { TYPE (INSN_DIV3), IDX (INSN_DIV3), FULL (div3) FAST (div3) }, - { TYPE (INSN_DIV4S), IDX (INSN_DIV4S), FULL (div4s) FAST (div4s) }, - { TYPE (INSN_LSL), IDX (INSN_LSL), FULL (lsl) FAST (lsl) }, - { TYPE (INSN_LSLI), IDX (INSN_LSLI), FULL (lsli) FAST (lsli) }, - { TYPE (INSN_LSL2), IDX (INSN_LSL2), FULL (lsl2) FAST (lsl2) }, - { TYPE (INSN_LSR), IDX (INSN_LSR), FULL (lsr) FAST (lsr) }, - { TYPE (INSN_LSRI), IDX (INSN_LSRI), FULL (lsri) FAST (lsri) }, - { TYPE (INSN_LSR2), IDX (INSN_LSR2), FULL (lsr2) FAST (lsr2) }, - { TYPE (INSN_ASR), IDX (INSN_ASR), FULL (asr) FAST (asr) }, - { TYPE (INSN_ASRI), IDX (INSN_ASRI), FULL (asri) FAST (asri) }, - { TYPE (INSN_ASR2), IDX (INSN_ASR2), FULL (asr2) FAST (asr2) }, - { TYPE (INSN_LDI8), IDX (INSN_LDI8), FULL (ldi8) FAST (ldi8) }, - { TYPE (INSN_LDI20), IDX (INSN_LDI20), FULL (ldi20) FAST (ldi20) }, - { TYPE (INSN_LDI32), IDX (INSN_LDI32), FULL (ldi32) FAST (ldi32) }, - { TYPE (INSN_LD), IDX (INSN_LD), FULL (ld) FAST (ld) }, - { TYPE (INSN_LDUH), IDX (INSN_LDUH), FULL (lduh) FAST (lduh) }, - { TYPE (INSN_LDUB), IDX (INSN_LDUB), FULL (ldub) FAST (ldub) }, - { TYPE (INSN_LDR13), IDX (INSN_LDR13), FULL (ldr13) FAST (ldr13) }, - { TYPE (INSN_LDR13UH), IDX (INSN_LDR13UH), FULL (ldr13uh) FAST (ldr13uh) }, - { TYPE (INSN_LDR13UB), IDX (INSN_LDR13UB), FULL (ldr13ub) FAST (ldr13ub) }, - { TYPE (INSN_LDR14), IDX (INSN_LDR14), FULL (ldr14) FAST (ldr14) }, - { TYPE (INSN_LDR14UH), IDX (INSN_LDR14UH), FULL (ldr14uh) FAST (ldr14uh) }, - { TYPE (INSN_LDR14UB), IDX (INSN_LDR14UB), FULL (ldr14ub) FAST (ldr14ub) }, - { TYPE (INSN_LDR15), IDX (INSN_LDR15), FULL (ldr15) FAST (ldr15) }, - { TYPE (INSN_LDR15GR), IDX (INSN_LDR15GR), FULL (ldr15gr) FAST (ldr15gr) }, - { TYPE (INSN_LDR15DR), IDX (INSN_LDR15DR), FULL (ldr15dr) FAST (ldr15dr) }, - { TYPE (INSN_LDR15PS), IDX (INSN_LDR15PS), FULL (ldr15ps) FAST (ldr15ps) }, - { TYPE (INSN_ST), IDX (INSN_ST), FULL (st) FAST (st) }, - { TYPE (INSN_STH), IDX (INSN_STH), FULL (sth) FAST (sth) }, - { TYPE (INSN_STB), IDX (INSN_STB), FULL (stb) FAST (stb) }, - { TYPE (INSN_STR13), IDX (INSN_STR13), FULL (str13) FAST (str13) }, - { TYPE (INSN_STR13H), IDX (INSN_STR13H), FULL (str13h) FAST (str13h) }, - { TYPE (INSN_STR13B), IDX (INSN_STR13B), FULL (str13b) FAST (str13b) }, - { TYPE (INSN_STR14), IDX (INSN_STR14), FULL (str14) FAST (str14) }, - { TYPE (INSN_STR14H), IDX (INSN_STR14H), FULL (str14h) FAST (str14h) }, - { TYPE (INSN_STR14B), IDX (INSN_STR14B), FULL (str14b) FAST (str14b) }, - { TYPE (INSN_STR15), IDX (INSN_STR15), FULL (str15) FAST (str15) }, - { TYPE (INSN_STR15GR), IDX (INSN_STR15GR), FULL (str15gr) FAST (str15gr) }, - { TYPE (INSN_STR15DR), IDX (INSN_STR15DR), FULL (str15dr) FAST (str15dr) }, - { TYPE (INSN_STR15PS), IDX (INSN_STR15PS), FULL (str15ps) FAST (str15ps) }, - { TYPE (INSN_MOV), IDX (INSN_MOV), FULL (mov) FAST (mov) }, - { TYPE (INSN_MOVDR), IDX (INSN_MOVDR), FULL (movdr) FAST (movdr) }, - { TYPE (INSN_MOVPS), IDX (INSN_MOVPS), FULL (movps) FAST (movps) }, - { TYPE (INSN_MOV2DR), IDX (INSN_MOV2DR), FULL (mov2dr) FAST (mov2dr) }, - { TYPE (INSN_MOV2PS), IDX (INSN_MOV2PS), FULL (mov2ps) FAST (mov2ps) }, - { TYPE (INSN_JMP), IDX (INSN_JMP), FULL (jmp) FAST (jmp) }, - { TYPE (INSN_JMPD), IDX (INSN_JMPD), FULL (jmpd) FAST (jmpd) }, - { TYPE (INSN_CALLR), IDX (INSN_CALLR), FULL (callr) FAST (callr) }, - { TYPE (INSN_CALLRD), IDX (INSN_CALLRD), FULL (callrd) FAST (callrd) }, - { TYPE (INSN_CALL), IDX (INSN_CALL), FULL (call) FAST (call) }, - { TYPE (INSN_CALLD), IDX (INSN_CALLD), FULL (calld) FAST (calld) }, - { TYPE (INSN_RET), IDX (INSN_RET), FULL (ret) FAST (ret) }, - { TYPE (INSN_RET_D), IDX (INSN_RET_D), FULL (ret_d) FAST (ret_d) }, - { TYPE (INSN_INT), IDX (INSN_INT), FULL (int) FAST (int) }, - { TYPE (INSN_INTE), IDX (INSN_INTE), FULL (inte) FAST (inte) }, - { TYPE (INSN_RETI), IDX (INSN_RETI), FULL (reti) FAST (reti) }, - { TYPE (INSN_BRAD), IDX (INSN_BRAD), FULL (brad) FAST (brad) }, - { TYPE (INSN_BRA), IDX (INSN_BRA), FULL (bra) FAST (bra) }, - { TYPE (INSN_BNOD), IDX (INSN_BNOD), FULL (bnod) FAST (bnod) }, - { TYPE (INSN_BNO), IDX (INSN_BNO), FULL (bno) FAST (bno) }, - { TYPE (INSN_BEQD), IDX (INSN_BEQD), FULL (beqd) FAST (beqd) }, - { TYPE (INSN_BEQ), IDX (INSN_BEQ), FULL (beq) FAST (beq) }, - { TYPE (INSN_BNED), IDX (INSN_BNED), FULL (bned) FAST (bned) }, - { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) }, - { TYPE (INSN_BCD), IDX (INSN_BCD), FULL (bcd) FAST (bcd) }, - { TYPE (INSN_BC), IDX (INSN_BC), FULL (bc) FAST (bc) }, - { TYPE (INSN_BNCD), IDX (INSN_BNCD), FULL (bncd) FAST (bncd) }, - { TYPE (INSN_BNC), IDX (INSN_BNC), FULL (bnc) FAST (bnc) }, - { TYPE (INSN_BND), IDX (INSN_BND), FULL (bnd) FAST (bnd) }, - { TYPE (INSN_BN), IDX (INSN_BN), FULL (bn) FAST (bn) }, - { TYPE (INSN_BPD), IDX (INSN_BPD), FULL (bpd) FAST (bpd) }, - { TYPE (INSN_BP), IDX (INSN_BP), FULL (bp) FAST (bp) }, - { TYPE (INSN_BVD), IDX (INSN_BVD), FULL (bvd) FAST (bvd) }, - { TYPE (INSN_BV), IDX (INSN_BV), FULL (bv) FAST (bv) }, - { TYPE (INSN_BNVD), IDX (INSN_BNVD), FULL (bnvd) FAST (bnvd) }, - { TYPE (INSN_BNV), IDX (INSN_BNV), FULL (bnv) FAST (bnv) }, - { TYPE (INSN_BLTD), IDX (INSN_BLTD), FULL (bltd) FAST (bltd) }, - { TYPE (INSN_BLT), IDX (INSN_BLT), FULL (blt) FAST (blt) }, - { TYPE (INSN_BGED), IDX (INSN_BGED), FULL (bged) FAST (bged) }, - { TYPE (INSN_BGE), IDX (INSN_BGE), FULL (bge) FAST (bge) }, - { TYPE (INSN_BLED), IDX (INSN_BLED), FULL (bled) FAST (bled) }, - { TYPE (INSN_BLE), IDX (INSN_BLE), FULL (ble) FAST (ble) }, - { TYPE (INSN_BGTD), IDX (INSN_BGTD), FULL (bgtd) FAST (bgtd) }, - { TYPE (INSN_BGT), IDX (INSN_BGT), FULL (bgt) FAST (bgt) }, - { TYPE (INSN_BLSD), IDX (INSN_BLSD), FULL (blsd) FAST (blsd) }, - { TYPE (INSN_BLS), IDX (INSN_BLS), FULL (bls) FAST (bls) }, - { TYPE (INSN_BHID), IDX (INSN_BHID), FULL (bhid) FAST (bhid) }, - { TYPE (INSN_BHI), IDX (INSN_BHI), FULL (bhi) FAST (bhi) }, - { TYPE (INSN_DMOVR13), IDX (INSN_DMOVR13), FULL (dmovr13) FAST (dmovr13) }, - { TYPE (INSN_DMOVR13H), IDX (INSN_DMOVR13H), FULL (dmovr13h) FAST (dmovr13h) }, - { TYPE (INSN_DMOVR13B), IDX (INSN_DMOVR13B), FULL (dmovr13b) FAST (dmovr13b) }, - { TYPE (INSN_DMOVR13PI), IDX (INSN_DMOVR13PI), FULL (dmovr13pi) FAST (dmovr13pi) }, - { TYPE (INSN_DMOVR13PIH), IDX (INSN_DMOVR13PIH), FULL (dmovr13pih) FAST (dmovr13pih) }, - { TYPE (INSN_DMOVR13PIB), IDX (INSN_DMOVR13PIB), FULL (dmovr13pib) FAST (dmovr13pib) }, - { TYPE (INSN_DMOVR15PI), IDX (INSN_DMOVR15PI), FULL (dmovr15pi) FAST (dmovr15pi) }, - { TYPE (INSN_DMOV2R13), IDX (INSN_DMOV2R13), FULL (dmov2r13) FAST (dmov2r13) }, - { TYPE (INSN_DMOV2R13H), IDX (INSN_DMOV2R13H), FULL (dmov2r13h) FAST (dmov2r13h) }, - { TYPE (INSN_DMOV2R13B), IDX (INSN_DMOV2R13B), FULL (dmov2r13b) FAST (dmov2r13b) }, - { TYPE (INSN_DMOV2R13PI), IDX (INSN_DMOV2R13PI), FULL (dmov2r13pi) FAST (dmov2r13pi) }, - { TYPE (INSN_DMOV2R13PIH), IDX (INSN_DMOV2R13PIH), FULL (dmov2r13pih) FAST (dmov2r13pih) }, - { TYPE (INSN_DMOV2R13PIB), IDX (INSN_DMOV2R13PIB), FULL (dmov2r13pib) FAST (dmov2r13pib) }, - { TYPE (INSN_DMOV2R15PD), IDX (INSN_DMOV2R15PD), FULL (dmov2r15pd) FAST (dmov2r15pd) }, - { TYPE (INSN_LDRES), IDX (INSN_LDRES), FULL (ldres) FAST (ldres) }, - { TYPE (INSN_STRES), IDX (INSN_STRES), FULL (stres) FAST (stres) }, - { TYPE (INSN_COPOP), IDX (INSN_COPOP), FULL (copop) FAST (copop) }, - { TYPE (INSN_COPLD), IDX (INSN_COPLD), FULL (copld) FAST (copld) }, - { TYPE (INSN_COPST), IDX (INSN_COPST), FULL (copst) FAST (copst) }, - { TYPE (INSN_COPSV), IDX (INSN_COPSV), FULL (copsv) FAST (copsv) }, - { TYPE (INSN_NOP), IDX (INSN_NOP), FULL (nop) FAST (nop) }, - { TYPE (INSN_ANDCCR), IDX (INSN_ANDCCR), FULL (andccr) FAST (andccr) }, - { TYPE (INSN_ORCCR), IDX (INSN_ORCCR), FULL (orccr) FAST (orccr) }, - { TYPE (INSN_STILM), IDX (INSN_STILM), FULL (stilm) FAST (stilm) }, - { TYPE (INSN_ADDSP), IDX (INSN_ADDSP), FULL (addsp) FAST (addsp) }, - { TYPE (INSN_EXTSB), IDX (INSN_EXTSB), FULL (extsb) FAST (extsb) }, - { TYPE (INSN_EXTUB), IDX (INSN_EXTUB), FULL (extub) FAST (extub) }, - { TYPE (INSN_EXTSH), IDX (INSN_EXTSH), FULL (extsh) FAST (extsh) }, - { TYPE (INSN_EXTUH), IDX (INSN_EXTUH), FULL (extuh) FAST (extuh) }, - { TYPE (INSN_LDM0), IDX (INSN_LDM0), FULL (ldm0) FAST (ldm0) }, - { TYPE (INSN_LDM1), IDX (INSN_LDM1), FULL (ldm1) FAST (ldm1) }, - { TYPE (INSN_STM0), IDX (INSN_STM0), FULL (stm0) FAST (stm0) }, - { TYPE (INSN_STM1), IDX (INSN_STM1), FULL (stm1) FAST (stm1) }, - { TYPE (INSN_ENTER), IDX (INSN_ENTER), FULL (enter) FAST (enter) }, - { TYPE (INSN_LEAVE), IDX (INSN_LEAVE), FULL (leave) FAST (leave) }, - { TYPE (INSN_XCHB), IDX (INSN_XCHB), FULL (xchb) FAST (xchb) }, + { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY }, + { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD }, + { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI }, + { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 }, + { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC }, + { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN }, + { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI }, + { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 }, + { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD }, + { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC }, + { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN }, + { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP }, + { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI }, + { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 }, + { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND }, + { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND }, + { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND }, + { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM }, + { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH }, + { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB }, + { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM }, + { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH }, + { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB }, + { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM }, + { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH }, + { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB }, + { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL }, + { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL }, + { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL }, + { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL }, + { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL }, + { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL }, + { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL }, + { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL }, + { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL }, + { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU }, + { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH }, + { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH }, + { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S }, + { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U }, + { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 }, + { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 }, + { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 }, + { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S }, + { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL }, + { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI }, + { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI }, + { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL }, + { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI }, + { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI }, + { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL }, + { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI }, + { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI }, + { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 }, + { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 }, + { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 }, + { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD }, + { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LD }, + { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LD }, + { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 }, + { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13 }, + { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13 }, + { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 }, + { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH }, + { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB }, + { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 }, + { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR }, + { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR }, + { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS }, + { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST }, + { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_ST }, + { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_ST }, + { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 }, + { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13 }, + { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13 }, + { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 }, + { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H }, + { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B }, + { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 }, + { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR }, + { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR }, + { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS }, + { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV }, + { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR }, + { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS }, + { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR }, + { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS }, + { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP }, + { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP }, + { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR }, + { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR }, + { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL }, + { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL }, + { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET }, + { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET }, + { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT }, + { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE }, + { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI }, + { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD }, + { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD }, + { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD }, + { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD }, + { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD }, + { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD }, + { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD }, + { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD }, + { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD }, + { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD }, + { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD }, + { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD }, + { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND }, + { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND }, + { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND }, + { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND }, + { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD }, + { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD }, + { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD }, + { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD }, + { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD }, + { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD }, + { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD }, + { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD }, + { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED }, + { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED }, + { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED }, + { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED }, + { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD }, + { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD }, + { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD }, + { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD }, + { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 }, + { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H }, + { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B }, + { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI }, + { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH }, + { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB }, + { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI }, + { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 }, + { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H }, + { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B }, + { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI }, + { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH }, + { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB }, + { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD }, + { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES }, + { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES }, + { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP }, + { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP }, + { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP }, + { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP }, + { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD }, + { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR }, + { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR }, + { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM }, + { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP }, + { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB }, + { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB }, + { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH }, + { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH }, + { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 }, + { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 }, + { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 }, + { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 }, + { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER }, + { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE }, + { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB }, }; -static const struct insn_sem fr30bf_insn_sem_invalid = -{ - VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) +static const struct insn_sem fr30bf_insn_sem_invalid = { + VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY }; -#undef FMT -#undef FULL -#undef FAST -#undef IDX -#undef TYPE - /* Initialize an IDESC from the compile-time computable parts. */ static INLINE void @@ -255,6 +225,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; id->num = t->index; + id->sfmt = t->sfmt; if ((int) t->type <= 0) id->idata = & cgen_virtual_insn_table[- (int) t->type]; else @@ -262,12 +233,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) id->attrs = CGEN_INSN_ATTRS (id->idata); /* Oh my god, a magic number. */ id->length = CGEN_INSN_BITSIZE (id->idata) / 8; -#if ! WITH_SEM_SWITCH_FULL - id->sem_full = t->sem_full; -#endif -#if WITH_FAST && ! WITH_SEM_SWITCH_FAST - id->sem_fast = t->sem_fast; -#endif + #if WITH_PROFILE_MODEL_P id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; { @@ -275,6 +241,8 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) SIM_ASSERT (t->index == id->timing->num); } #endif + + /* Semantic pointers are initialized elsewhere. */ } /* Initialize the instruction descriptor table. */ @@ -322,60 +290,60 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (255 << 0))); switch (val) { - case 0 : itype = FR30BF_INSN_LDR13; goto extract_fmt_ldr13; - case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_fmt_ldr13; - case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_fmt_ldr13; - case 3 : itype = FR30BF_INSN_LDR15; goto extract_fmt_ldr15; - case 4 : itype = FR30BF_INSN_LD; goto extract_fmt_ld; - case 5 : itype = FR30BF_INSN_LDUH; goto extract_fmt_ld; - case 6 : itype = FR30BF_INSN_LDUB; goto extract_fmt_ld; + case 0 : itype = FR30BF_INSN_LDR13; goto extract_sfmt_ldr13; + case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_sfmt_ldr13; + case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_sfmt_ldr13; + case 3 : itype = FR30BF_INSN_LDR15; goto extract_sfmt_ldr15; + case 4 : itype = FR30BF_INSN_LD; goto extract_sfmt_ld; + case 5 : itype = FR30BF_INSN_LDUH; goto extract_sfmt_ld; + case 6 : itype = FR30BF_INSN_LDUB; goto extract_sfmt_ld; case 7 : { unsigned int val = (((insn >> 4) & (15 << 0))); switch (val) { - case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_fmt_ldr15gr; - case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_fmt_mov2ps; - case 8 : itype = FR30BF_INSN_LDR15DR; goto extract_fmt_ldr15dr; - case 9 : itype = FR30BF_INSN_LDR15PS; goto extract_fmt_ldr15ps; - default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_sfmt_ldr15gr; + case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_sfmt_mov2ps; + case 8 : itype = FR30BF_INSN_LDR15DR; goto extract_sfmt_ldr15dr; + case 9 : itype = FR30BF_INSN_LDR15PS; goto extract_sfmt_ldr15ps; + default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_fmt_dmov2r13; - case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_fmt_dmov2r13h; - case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_fmt_dmov2r13b; - case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_fmt_dmov2r15pd; - case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_fmt_dmov2r13pi; - case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_fmt_dmov2r13pih; - case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_fmt_dmov2r13pib; - case 15 : itype = FR30BF_INSN_ENTER; goto extract_fmt_enter; - case 16 : itype = FR30BF_INSN_STR13; goto extract_fmt_str13; - case 17 : itype = FR30BF_INSN_STR13H; goto extract_fmt_str13; - case 18 : itype = FR30BF_INSN_STR13B; goto extract_fmt_str13; - case 19 : itype = FR30BF_INSN_STR15; goto extract_fmt_str15; - case 20 : itype = FR30BF_INSN_ST; goto extract_fmt_st; - case 21 : itype = FR30BF_INSN_STH; goto extract_fmt_st; - case 22 : itype = FR30BF_INSN_STB; goto extract_fmt_st; + case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_sfmt_dmov2r13; + case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_sfmt_dmov2r13h; + case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_sfmt_dmov2r13b; + case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_sfmt_dmov2r15pd; + case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_sfmt_dmov2r13pi; + case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_sfmt_dmov2r13pih; + case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_sfmt_dmov2r13pib; + case 15 : itype = FR30BF_INSN_ENTER; goto extract_sfmt_enter; + case 16 : itype = FR30BF_INSN_STR13; goto extract_sfmt_str13; + case 17 : itype = FR30BF_INSN_STR13H; goto extract_sfmt_str13; + case 18 : itype = FR30BF_INSN_STR13B; goto extract_sfmt_str13; + case 19 : itype = FR30BF_INSN_STR15; goto extract_sfmt_str15; + case 20 : itype = FR30BF_INSN_ST; goto extract_sfmt_st; + case 21 : itype = FR30BF_INSN_STH; goto extract_sfmt_st; + case 22 : itype = FR30BF_INSN_STB; goto extract_sfmt_st; case 23 : { unsigned int val = (((insn >> 4) & (15 << 0))); switch (val) { - case 0 : itype = FR30BF_INSN_STR15GR; goto extract_fmt_str15gr; - case 1 : itype = FR30BF_INSN_MOVPS; goto extract_fmt_movps; - case 8 : itype = FR30BF_INSN_STR15DR; goto extract_fmt_str15dr; - case 9 : itype = FR30BF_INSN_STR15PS; goto extract_fmt_str15ps; - default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = FR30BF_INSN_STR15GR; goto extract_sfmt_str15gr; + case 1 : itype = FR30BF_INSN_MOVPS; goto extract_sfmt_movps; + case 8 : itype = FR30BF_INSN_STR15DR; goto extract_sfmt_str15dr; + case 9 : itype = FR30BF_INSN_STR15PS; goto extract_sfmt_str15ps; + default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_fmt_dmovr13; - case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_fmt_dmovr13h; - case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_fmt_dmovr13b; - case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_fmt_dmovr15pi; - case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_fmt_dmovr13pi; - case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_fmt_dmovr13pih; - case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_fmt_dmovr13pib; - case 31 : itype = FR30BF_INSN_INT; goto extract_fmt_int; + case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_sfmt_dmovr13; + case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_sfmt_dmovr13h; + case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_sfmt_dmovr13b; + case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_sfmt_dmovr15pi; + case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_sfmt_dmovr13pi; + case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_sfmt_dmovr13pih; + case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_sfmt_dmovr13pib; + case 31 : itype = FR30BF_INSN_INT; goto extract_sfmt_int; case 32 : /* fall through */ case 33 : /* fall through */ case 34 : /* fall through */ @@ -391,7 +359,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 44 : /* fall through */ case 45 : /* fall through */ case 46 : /* fall through */ - case 47 : itype = FR30BF_INSN_LDR14; goto extract_fmt_ldr14; + case 47 : itype = FR30BF_INSN_LDR14; goto extract_sfmt_ldr14; case 48 : /* fall through */ case 49 : /* fall through */ case 50 : /* fall through */ @@ -407,7 +375,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 60 : /* fall through */ case 61 : /* fall through */ case 62 : /* fall through */ - case 63 : itype = FR30BF_INSN_STR14; goto extract_fmt_str14; + case 63 : itype = FR30BF_INSN_STR14; goto extract_sfmt_str14; case 64 : /* fall through */ case 65 : /* fall through */ case 66 : /* fall through */ @@ -423,7 +391,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 76 : /* fall through */ case 77 : /* fall through */ case 78 : /* fall through */ - case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_fmt_ldr14uh; + case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_sfmt_ldr14uh; case 80 : /* fall through */ case 81 : /* fall through */ case 82 : /* fall through */ @@ -439,7 +407,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 92 : /* fall through */ case 93 : /* fall through */ case 94 : /* fall through */ - case 95 : itype = FR30BF_INSN_STR14H; goto extract_fmt_str14h; + case 95 : itype = FR30BF_INSN_STR14H; goto extract_sfmt_str14h; case 96 : /* fall through */ case 97 : /* fall through */ case 98 : /* fall through */ @@ -455,7 +423,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 108 : /* fall through */ case 109 : /* fall through */ case 110 : /* fall through */ - case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_fmt_ldr14ub; + case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_sfmt_ldr14ub; case 112 : /* fall through */ case 113 : /* fall through */ case 114 : /* fall through */ @@ -471,109 +439,109 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 124 : /* fall through */ case 125 : /* fall through */ case 126 : /* fall through */ - case 127 : itype = FR30BF_INSN_STR14B; goto extract_fmt_str14b; - case 128 : itype = FR30BF_INSN_BANDL; goto extract_fmt_bandl; - case 129 : itype = FR30BF_INSN_BANDH; goto extract_fmt_bandl; - case 130 : itype = FR30BF_INSN_AND; goto extract_fmt_and; - case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_fmt_andccr; - case 132 : itype = FR30BF_INSN_ANDM; goto extract_fmt_andm; - case 133 : itype = FR30BF_INSN_ANDH; goto extract_fmt_andh; - case 134 : itype = FR30BF_INSN_ANDB; goto extract_fmt_andb; - case 135 : itype = FR30BF_INSN_STILM; goto extract_fmt_stilm; - case 136 : itype = FR30BF_INSN_BTSTL; goto extract_fmt_btstl; - case 137 : itype = FR30BF_INSN_BTSTH; goto extract_fmt_btstl; - case 138 : itype = FR30BF_INSN_XCHB; goto extract_fmt_xchb; - case 139 : itype = FR30BF_INSN_MOV; goto extract_fmt_mov; - case 140 : itype = FR30BF_INSN_LDM0; goto extract_fmt_ldm0; - case 141 : itype = FR30BF_INSN_LDM1; goto extract_fmt_ldm1; - case 142 : itype = FR30BF_INSN_STM0; goto extract_fmt_stm0; - case 143 : itype = FR30BF_INSN_STM1; goto extract_fmt_stm1; - case 144 : itype = FR30BF_INSN_BORL; goto extract_fmt_bandl; - case 145 : itype = FR30BF_INSN_BORH; goto extract_fmt_bandl; - case 146 : itype = FR30BF_INSN_OR; goto extract_fmt_and; - case 147 : itype = FR30BF_INSN_ORCCR; goto extract_fmt_andccr; - case 148 : itype = FR30BF_INSN_ORM; goto extract_fmt_andm; - case 149 : itype = FR30BF_INSN_ORH; goto extract_fmt_andh; - case 150 : itype = FR30BF_INSN_ORB; goto extract_fmt_andb; + case 127 : itype = FR30BF_INSN_STR14B; goto extract_sfmt_str14b; + case 128 : itype = FR30BF_INSN_BANDL; goto extract_sfmt_bandl; + case 129 : itype = FR30BF_INSN_BANDH; goto extract_sfmt_bandl; + case 130 : itype = FR30BF_INSN_AND; goto extract_sfmt_and; + case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_sfmt_andccr; + case 132 : itype = FR30BF_INSN_ANDM; goto extract_sfmt_andm; + case 133 : itype = FR30BF_INSN_ANDH; goto extract_sfmt_andh; + case 134 : itype = FR30BF_INSN_ANDB; goto extract_sfmt_andb; + case 135 : itype = FR30BF_INSN_STILM; goto extract_sfmt_stilm; + case 136 : itype = FR30BF_INSN_BTSTL; goto extract_sfmt_btstl; + case 137 : itype = FR30BF_INSN_BTSTH; goto extract_sfmt_btstl; + case 138 : itype = FR30BF_INSN_XCHB; goto extract_sfmt_xchb; + case 139 : itype = FR30BF_INSN_MOV; goto extract_sfmt_mov; + case 140 : itype = FR30BF_INSN_LDM0; goto extract_sfmt_ldm0; + case 141 : itype = FR30BF_INSN_LDM1; goto extract_sfmt_ldm1; + case 142 : itype = FR30BF_INSN_STM0; goto extract_sfmt_stm0; + case 143 : itype = FR30BF_INSN_STM1; goto extract_sfmt_stm1; + case 144 : itype = FR30BF_INSN_BORL; goto extract_sfmt_bandl; + case 145 : itype = FR30BF_INSN_BORH; goto extract_sfmt_bandl; + case 146 : itype = FR30BF_INSN_OR; goto extract_sfmt_and; + case 147 : itype = FR30BF_INSN_ORCCR; goto extract_sfmt_andccr; + case 148 : itype = FR30BF_INSN_ORM; goto extract_sfmt_andm; + case 149 : itype = FR30BF_INSN_ORH; goto extract_sfmt_andh; + case 150 : itype = FR30BF_INSN_ORB; goto extract_sfmt_andb; case 151 : { unsigned int val = (((insn >> 4) & (15 << 0))); switch (val) { - case 0 : itype = FR30BF_INSN_JMP; goto extract_fmt_jmp; - case 1 : itype = FR30BF_INSN_CALLR; goto extract_fmt_callr; - case 2 : itype = FR30BF_INSN_RET; goto extract_fmt_ret; - case 3 : itype = FR30BF_INSN_RETI; goto extract_fmt_reti; - case 4 : itype = FR30BF_INSN_DIV0S; goto extract_fmt_div0s; - case 5 : itype = FR30BF_INSN_DIV0U; goto extract_fmt_div0u; - case 6 : itype = FR30BF_INSN_DIV1; goto extract_fmt_div1; - case 7 : itype = FR30BF_INSN_DIV2; goto extract_fmt_div2; - case 8 : itype = FR30BF_INSN_EXTSB; goto extract_fmt_extsb; - case 9 : itype = FR30BF_INSN_EXTUB; goto extract_fmt_extub; - case 10 : itype = FR30BF_INSN_EXTSH; goto extract_fmt_extsh; - case 11 : itype = FR30BF_INSN_EXTUH; goto extract_fmt_extuh; - default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = FR30BF_INSN_JMP; goto extract_sfmt_jmp; + case 1 : itype = FR30BF_INSN_CALLR; goto extract_sfmt_callr; + case 2 : itype = FR30BF_INSN_RET; goto extract_sfmt_ret; + case 3 : itype = FR30BF_INSN_RETI; goto extract_sfmt_reti; + case 4 : itype = FR30BF_INSN_DIV0S; goto extract_sfmt_div0s; + case 5 : itype = FR30BF_INSN_DIV0U; goto extract_sfmt_div0u; + case 6 : itype = FR30BF_INSN_DIV1; goto extract_sfmt_div1; + case 7 : itype = FR30BF_INSN_DIV2; goto extract_sfmt_div2; + case 8 : itype = FR30BF_INSN_EXTSB; goto extract_sfmt_extsb; + case 9 : itype = FR30BF_INSN_EXTUB; goto extract_sfmt_extub; + case 10 : itype = FR30BF_INSN_EXTSH; goto extract_sfmt_extsh; + case 11 : itype = FR30BF_INSN_EXTUH; goto extract_sfmt_extuh; + default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 152 : itype = FR30BF_INSN_BEORL; goto extract_fmt_bandl; - case 153 : itype = FR30BF_INSN_BEORH; goto extract_fmt_bandl; - case 154 : itype = FR30BF_INSN_EOR; goto extract_fmt_and; - case 155 : itype = FR30BF_INSN_LDI20; goto extract_fmt_ldi20; - case 156 : itype = FR30BF_INSN_EORM; goto extract_fmt_andm; - case 157 : itype = FR30BF_INSN_EORH; goto extract_fmt_andh; - case 158 : itype = FR30BF_INSN_EORB; goto extract_fmt_andb; + case 152 : itype = FR30BF_INSN_BEORL; goto extract_sfmt_bandl; + case 153 : itype = FR30BF_INSN_BEORH; goto extract_sfmt_bandl; + case 154 : itype = FR30BF_INSN_EOR; goto extract_sfmt_and; + case 155 : itype = FR30BF_INSN_LDI20; goto extract_sfmt_ldi20; + case 156 : itype = FR30BF_INSN_EORM; goto extract_sfmt_andm; + case 157 : itype = FR30BF_INSN_EORH; goto extract_sfmt_andh; + case 158 : itype = FR30BF_INSN_EORB; goto extract_sfmt_andb; case 159 : { unsigned int val = (((insn >> 4) & (15 << 0))); switch (val) { - case 0 : itype = FR30BF_INSN_JMPD; goto extract_fmt_jmp; - case 1 : itype = FR30BF_INSN_CALLRD; goto extract_fmt_callr; - case 2 : itype = FR30BF_INSN_RET_D; goto extract_fmt_ret; - case 3 : itype = FR30BF_INSN_INTE; goto extract_fmt_inte; - case 6 : itype = FR30BF_INSN_DIV3; goto extract_fmt_div3; - case 7 : itype = FR30BF_INSN_DIV4S; goto extract_fmt_div4s; - case 8 : itype = FR30BF_INSN_LDI32; goto extract_fmt_ldi32; - case 9 : itype = FR30BF_INSN_LEAVE; goto extract_fmt_leave; - case 10 : itype = FR30BF_INSN_NOP; goto extract_fmt_bnod; - case 12 : itype = FR30BF_INSN_COPOP; goto extract_fmt_copop; - case 13 : itype = FR30BF_INSN_COPLD; goto extract_fmt_copop; - case 14 : itype = FR30BF_INSN_COPST; goto extract_fmt_copop; - case 15 : itype = FR30BF_INSN_COPSV; goto extract_fmt_copop; - default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = FR30BF_INSN_JMPD; goto extract_sfmt_jmp; + case 1 : itype = FR30BF_INSN_CALLRD; goto extract_sfmt_callr; + case 2 : itype = FR30BF_INSN_RET_D; goto extract_sfmt_ret; + case 3 : itype = FR30BF_INSN_INTE; goto extract_sfmt_inte; + case 6 : itype = FR30BF_INSN_DIV3; goto extract_sfmt_div3; + case 7 : itype = FR30BF_INSN_DIV4S; goto extract_sfmt_div4s; + case 8 : itype = FR30BF_INSN_LDI32; goto extract_sfmt_ldi32; + case 9 : itype = FR30BF_INSN_LEAVE; goto extract_sfmt_leave; + case 10 : itype = FR30BF_INSN_NOP; goto extract_sfmt_bnod; + case 12 : itype = FR30BF_INSN_COPOP; goto extract_sfmt_copop; + case 13 : itype = FR30BF_INSN_COPLD; goto extract_sfmt_copop; + case 14 : itype = FR30BF_INSN_COPST; goto extract_sfmt_copop; + case 15 : itype = FR30BF_INSN_COPSV; goto extract_sfmt_copop; + default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 160 : itype = FR30BF_INSN_ADDNI; goto extract_fmt_addni; - case 161 : itype = FR30BF_INSN_ADDN2; goto extract_fmt_addn2; - case 162 : itype = FR30BF_INSN_ADDN; goto extract_fmt_addn; - case 163 : itype = FR30BF_INSN_ADDSP; goto extract_fmt_addsp; - case 164 : itype = FR30BF_INSN_ADDI; goto extract_fmt_addi; - case 165 : itype = FR30BF_INSN_ADD2; goto extract_fmt_add2; - case 166 : itype = FR30BF_INSN_ADD; goto extract_fmt_add; - case 167 : itype = FR30BF_INSN_ADDC; goto extract_fmt_addc; - case 168 : itype = FR30BF_INSN_CMPI; goto extract_fmt_cmpi; - case 169 : itype = FR30BF_INSN_CMP2; goto extract_fmt_cmp2; - case 170 : itype = FR30BF_INSN_CMP; goto extract_fmt_cmp; - case 171 : itype = FR30BF_INSN_MULU; goto extract_fmt_mulu; - case 172 : itype = FR30BF_INSN_SUB; goto extract_fmt_add; - case 173 : itype = FR30BF_INSN_SUBC; goto extract_fmt_addc; - case 174 : itype = FR30BF_INSN_SUBN; goto extract_fmt_addn; - case 175 : itype = FR30BF_INSN_MUL; goto extract_fmt_mul; - case 176 : itype = FR30BF_INSN_LSRI; goto extract_fmt_lsli; - case 177 : itype = FR30BF_INSN_LSR2; goto extract_fmt_lsli; - case 178 : itype = FR30BF_INSN_LSR; goto extract_fmt_lsl; - case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_fmt_mov2dr; - case 180 : itype = FR30BF_INSN_LSLI; goto extract_fmt_lsli; - case 181 : itype = FR30BF_INSN_LSL2; goto extract_fmt_lsli; - case 182 : itype = FR30BF_INSN_LSL; goto extract_fmt_lsl; - case 183 : itype = FR30BF_INSN_MOVDR; goto extract_fmt_movdr; - case 184 : itype = FR30BF_INSN_ASRI; goto extract_fmt_lsli; - case 185 : itype = FR30BF_INSN_ASR2; goto extract_fmt_lsli; - case 186 : itype = FR30BF_INSN_ASR; goto extract_fmt_lsl; - case 187 : itype = FR30BF_INSN_MULUH; goto extract_fmt_mulh; - case 188 : itype = FR30BF_INSN_LDRES; goto extract_fmt_ldres; - case 189 : itype = FR30BF_INSN_STRES; goto extract_fmt_ldres; - case 191 : itype = FR30BF_INSN_MULH; goto extract_fmt_mulh; + case 160 : itype = FR30BF_INSN_ADDNI; goto extract_sfmt_addni; + case 161 : itype = FR30BF_INSN_ADDN2; goto extract_sfmt_addn2; + case 162 : itype = FR30BF_INSN_ADDN; goto extract_sfmt_addn; + case 163 : itype = FR30BF_INSN_ADDSP; goto extract_sfmt_addsp; + case 164 : itype = FR30BF_INSN_ADDI; goto extract_sfmt_addi; + case 165 : itype = FR30BF_INSN_ADD2; goto extract_sfmt_add2; + case 166 : itype = FR30BF_INSN_ADD; goto extract_sfmt_add; + case 167 : itype = FR30BF_INSN_ADDC; goto extract_sfmt_addc; + case 168 : itype = FR30BF_INSN_CMPI; goto extract_sfmt_cmpi; + case 169 : itype = FR30BF_INSN_CMP2; goto extract_sfmt_cmp2; + case 170 : itype = FR30BF_INSN_CMP; goto extract_sfmt_cmp; + case 171 : itype = FR30BF_INSN_MULU; goto extract_sfmt_mulu; + case 172 : itype = FR30BF_INSN_SUB; goto extract_sfmt_add; + case 173 : itype = FR30BF_INSN_SUBC; goto extract_sfmt_addc; + case 174 : itype = FR30BF_INSN_SUBN; goto extract_sfmt_addn; + case 175 : itype = FR30BF_INSN_MUL; goto extract_sfmt_mul; + case 176 : itype = FR30BF_INSN_LSRI; goto extract_sfmt_lsli; + case 177 : itype = FR30BF_INSN_LSR2; goto extract_sfmt_lsli; + case 178 : itype = FR30BF_INSN_LSR; goto extract_sfmt_lsl; + case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_sfmt_mov2dr; + case 180 : itype = FR30BF_INSN_LSLI; goto extract_sfmt_lsli; + case 181 : itype = FR30BF_INSN_LSL2; goto extract_sfmt_lsli; + case 182 : itype = FR30BF_INSN_LSL; goto extract_sfmt_lsl; + case 183 : itype = FR30BF_INSN_MOVDR; goto extract_sfmt_movdr; + case 184 : itype = FR30BF_INSN_ASRI; goto extract_sfmt_lsli; + case 185 : itype = FR30BF_INSN_ASR2; goto extract_sfmt_lsli; + case 186 : itype = FR30BF_INSN_ASR; goto extract_sfmt_lsl; + case 187 : itype = FR30BF_INSN_MULUH; goto extract_sfmt_mulh; + case 188 : itype = FR30BF_INSN_LDRES; goto extract_sfmt_ldres; + case 189 : itype = FR30BF_INSN_STRES; goto extract_sfmt_ldres; + case 191 : itype = FR30BF_INSN_MULH; goto extract_sfmt_mulh; case 192 : /* fall through */ case 193 : /* fall through */ case 194 : /* fall through */ @@ -589,7 +557,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 204 : /* fall through */ case 205 : /* fall through */ case 206 : /* fall through */ - case 207 : itype = FR30BF_INSN_LDI8; goto extract_fmt_ldi8; + case 207 : itype = FR30BF_INSN_LDI8; goto extract_sfmt_ldi8; case 208 : /* fall through */ case 209 : /* fall through */ case 210 : /* fall through */ @@ -597,7 +565,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 212 : /* fall through */ case 213 : /* fall through */ case 214 : /* fall through */ - case 215 : itype = FR30BF_INSN_CALL; goto extract_fmt_call; + case 215 : itype = FR30BF_INSN_CALL; goto extract_sfmt_call; case 216 : /* fall through */ case 217 : /* fall through */ case 218 : /* fall through */ @@ -605,47 +573,47 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, case 220 : /* fall through */ case 221 : /* fall through */ case 222 : /* fall through */ - case 223 : itype = FR30BF_INSN_CALLD; goto extract_fmt_call; - case 224 : itype = FR30BF_INSN_BRA; goto extract_fmt_brad; - case 225 : itype = FR30BF_INSN_BNO; goto extract_fmt_bnod; - case 226 : itype = FR30BF_INSN_BEQ; goto extract_fmt_beqd; - case 227 : itype = FR30BF_INSN_BNE; goto extract_fmt_beqd; - case 228 : itype = FR30BF_INSN_BC; goto extract_fmt_bcd; - case 229 : itype = FR30BF_INSN_BNC; goto extract_fmt_bcd; - case 230 : itype = FR30BF_INSN_BN; goto extract_fmt_bnd; - case 231 : itype = FR30BF_INSN_BP; goto extract_fmt_bnd; - case 232 : itype = FR30BF_INSN_BV; goto extract_fmt_bvd; - case 233 : itype = FR30BF_INSN_BNV; goto extract_fmt_bvd; - case 234 : itype = FR30BF_INSN_BLT; goto extract_fmt_bltd; - case 235 : itype = FR30BF_INSN_BGE; goto extract_fmt_bltd; - case 236 : itype = FR30BF_INSN_BLE; goto extract_fmt_bled; - case 237 : itype = FR30BF_INSN_BGT; goto extract_fmt_bled; - case 238 : itype = FR30BF_INSN_BLS; goto extract_fmt_blsd; - case 239 : itype = FR30BF_INSN_BHI; goto extract_fmt_blsd; - case 240 : itype = FR30BF_INSN_BRAD; goto extract_fmt_brad; - case 241 : itype = FR30BF_INSN_BNOD; goto extract_fmt_bnod; - case 242 : itype = FR30BF_INSN_BEQD; goto extract_fmt_beqd; - case 243 : itype = FR30BF_INSN_BNED; goto extract_fmt_beqd; - case 244 : itype = FR30BF_INSN_BCD; goto extract_fmt_bcd; - case 245 : itype = FR30BF_INSN_BNCD; goto extract_fmt_bcd; - case 246 : itype = FR30BF_INSN_BND; goto extract_fmt_bnd; - case 247 : itype = FR30BF_INSN_BPD; goto extract_fmt_bnd; - case 248 : itype = FR30BF_INSN_BVD; goto extract_fmt_bvd; - case 249 : itype = FR30BF_INSN_BNVD; goto extract_fmt_bvd; - case 250 : itype = FR30BF_INSN_BLTD; goto extract_fmt_bltd; - case 251 : itype = FR30BF_INSN_BGED; goto extract_fmt_bltd; - case 252 : itype = FR30BF_INSN_BLED; goto extract_fmt_bled; - case 253 : itype = FR30BF_INSN_BGTD; goto extract_fmt_bled; - case 254 : itype = FR30BF_INSN_BLSD; goto extract_fmt_blsd; - case 255 : itype = FR30BF_INSN_BHID; goto extract_fmt_blsd; - default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty; + case 223 : itype = FR30BF_INSN_CALLD; goto extract_sfmt_call; + case 224 : itype = FR30BF_INSN_BRA; goto extract_sfmt_brad; + case 225 : itype = FR30BF_INSN_BNO; goto extract_sfmt_bnod; + case 226 : itype = FR30BF_INSN_BEQ; goto extract_sfmt_beqd; + case 227 : itype = FR30BF_INSN_BNE; goto extract_sfmt_beqd; + case 228 : itype = FR30BF_INSN_BC; goto extract_sfmt_bcd; + case 229 : itype = FR30BF_INSN_BNC; goto extract_sfmt_bcd; + case 230 : itype = FR30BF_INSN_BN; goto extract_sfmt_bnd; + case 231 : itype = FR30BF_INSN_BP; goto extract_sfmt_bnd; + case 232 : itype = FR30BF_INSN_BV; goto extract_sfmt_bvd; + case 233 : itype = FR30BF_INSN_BNV; goto extract_sfmt_bvd; + case 234 : itype = FR30BF_INSN_BLT; goto extract_sfmt_bltd; + case 235 : itype = FR30BF_INSN_BGE; goto extract_sfmt_bltd; + case 236 : itype = FR30BF_INSN_BLE; goto extract_sfmt_bled; + case 237 : itype = FR30BF_INSN_BGT; goto extract_sfmt_bled; + case 238 : itype = FR30BF_INSN_BLS; goto extract_sfmt_blsd; + case 239 : itype = FR30BF_INSN_BHI; goto extract_sfmt_blsd; + case 240 : itype = FR30BF_INSN_BRAD; goto extract_sfmt_brad; + case 241 : itype = FR30BF_INSN_BNOD; goto extract_sfmt_bnod; + case 242 : itype = FR30BF_INSN_BEQD; goto extract_sfmt_beqd; + case 243 : itype = FR30BF_INSN_BNED; goto extract_sfmt_beqd; + case 244 : itype = FR30BF_INSN_BCD; goto extract_sfmt_bcd; + case 245 : itype = FR30BF_INSN_BNCD; goto extract_sfmt_bcd; + case 246 : itype = FR30BF_INSN_BND; goto extract_sfmt_bnd; + case 247 : itype = FR30BF_INSN_BPD; goto extract_sfmt_bnd; + case 248 : itype = FR30BF_INSN_BVD; goto extract_sfmt_bvd; + case 249 : itype = FR30BF_INSN_BNVD; goto extract_sfmt_bvd; + case 250 : itype = FR30BF_INSN_BLTD; goto extract_sfmt_bltd; + case 251 : itype = FR30BF_INSN_BGED; goto extract_sfmt_bltd; + case 252 : itype = FR30BF_INSN_BLED; goto extract_sfmt_bled; + case 253 : itype = FR30BF_INSN_BGTD; goto extract_sfmt_bled; + case 254 : itype = FR30BF_INSN_BLSD; goto extract_sfmt_blsd; + case 255 : itype = FR30BF_INSN_BHID; goto extract_sfmt_blsd; + default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; } } } /* The instruction has been decoded, now extract the fields. */ - extract_fmt_empty: + extract_sfmt_empty: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; @@ -653,17 +621,17 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; } - extract_fmt_add: + extract_sfmt_add: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -673,7 +641,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -688,11 +656,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addi: + extract_sfmt_addi: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -702,7 +670,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -716,11 +684,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_add2: + extract_sfmt_add2: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_add2.f +#define FLD(f) abuf->fields.sfmt_add2.f SI f_m4; UINT f_Ri; @@ -730,7 +698,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_m4) = f_m4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -744,11 +712,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addc: + extract_sfmt_addc: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -758,7 +726,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addc", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -773,11 +741,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addn: + extract_sfmt_addn: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -787,7 +755,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addn", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -802,11 +770,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addni: + extract_sfmt_addni: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addni.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -816,7 +784,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addni", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -830,11 +798,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addn2: + extract_sfmt_addn2: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addn2.f +#define FLD(f) abuf->fields.sfmt_add2.f SI f_m4; UINT f_Ri; @@ -844,7 +812,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_m4) = f_m4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addn2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -858,11 +826,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmp: + extract_sfmt_cmp: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -872,7 +840,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmp", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -886,11 +854,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi: + extract_sfmt_cmpi: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -900,7 +868,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -913,11 +881,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmp2: + extract_sfmt_cmp2: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmp2.f +#define FLD(f) abuf->fields.sfmt_add2.f SI f_m4; UINT f_Ri; @@ -927,7 +895,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_m4) = f_m4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmp2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -940,11 +908,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_and: + extract_sfmt_and: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -954,7 +922,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_and", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -969,11 +937,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_andm: + extract_sfmt_andm: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -983,7 +951,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andm", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -997,11 +965,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_andh: + extract_sfmt_andh: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1011,7 +979,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1025,11 +993,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_andb: + extract_sfmt_andb: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1039,7 +1007,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1053,11 +1021,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bandl: + extract_sfmt_bandl: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -1067,7 +1035,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bandl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1080,11 +1048,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_btstl: + extract_sfmt_btstl: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -1094,7 +1062,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_btstl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1107,11 +1075,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mul: + extract_sfmt_mul: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mul.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1121,7 +1089,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mul", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1135,11 +1103,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulu: + extract_sfmt_mulu: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulu.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1149,7 +1117,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulu", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1163,11 +1131,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulh: + extract_sfmt_mulh: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1177,7 +1145,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1191,18 +1159,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_div0s: + extract_sfmt_div0s: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div0s.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div0s", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1215,32 +1183,32 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_div0u: + extract_sfmt_div0u: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div0u.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div0u", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0)); #undef FLD return idesc; } - extract_fmt_div1: + extract_sfmt_div1: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div1.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div1", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1253,18 +1221,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_div2: + extract_sfmt_div2: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div2.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div2", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1277,39 +1245,39 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_div3: + extract_sfmt_div3: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div3.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div3", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0)); #undef FLD return idesc; } - extract_fmt_div4s: + extract_sfmt_div4s: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_div4s.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div4s", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0)); #undef FLD return idesc; } - extract_fmt_lsl: + extract_sfmt_lsl: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -1319,7 +1287,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lsl", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1334,11 +1302,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_lsli: + extract_sfmt_lsli: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f UINT f_u4; UINT f_Ri; @@ -1348,7 +1316,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_u4) = f_u4; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lsli", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1362,11 +1330,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldi8: + extract_sfmt_ldi8: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_ldi8.f UINT f_i8; UINT f_Ri; @@ -1376,7 +1344,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_i8) = f_i8; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi8", "f_i8 0x%x", 'x', f_i8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1389,11 +1357,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldi20: + extract_sfmt_ldi20: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldi20.f +#define FLD(f) abuf->fields.sfmt_ldi20.f UINT f_i20_16; UINT f_i20_4; UINT f_Ri; @@ -1412,7 +1380,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_i20) = f_i20; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi20", "f_i20 0x%x", 'x', f_i20, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1425,11 +1393,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldi32: + extract_sfmt_ldi32: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldi32.f +#define FLD(f) abuf->fields.sfmt_ldi32.f UINT f_i32; UINT f_Ri; /* Contents of trailing part of insn. */ @@ -1444,7 +1412,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_i32) = f_i32; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi32", "f_i32 0x%x", 'x', f_i32, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1457,11 +1425,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ld: + extract_sfmt_ld: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f UINT f_Rj; UINT f_Ri; @@ -1471,7 +1439,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Rj) = & CPU (h_gr)[f_Rj]; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1485,11 +1453,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr13: + extract_sfmt_ldr13: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f UINT f_Rj; UINT f_Ri; @@ -1499,7 +1467,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Rj) = & CPU (h_gr)[f_Rj]; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr13", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1514,11 +1482,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr14: + extract_sfmt_ldr14: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr14.f +#define FLD(f) abuf->fields.sfmt_ldr14.f SI f_disp10; UINT f_Ri; @@ -1528,7 +1496,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp10) = f_disp10; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1542,11 +1510,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr14uh: + extract_sfmt_ldr14uh: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr14uh.f +#define FLD(f) abuf->fields.sfmt_ldr14uh.f SI f_disp9; UINT f_Ri; @@ -1556,7 +1524,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp9) = f_disp9; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1570,11 +1538,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr14ub: + extract_sfmt_ldr14ub: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr14ub.f +#define FLD(f) abuf->fields.sfmt_ldr14ub.f INT f_disp8; UINT f_Ri; @@ -1584,7 +1552,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp8) = f_disp8; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1598,11 +1566,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr15: + extract_sfmt_ldr15: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr15.f +#define FLD(f) abuf->fields.sfmt_ldr15.f USI f_udisp6; UINT f_Ri; @@ -1612,7 +1580,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_udisp6) = f_udisp6; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1626,11 +1594,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr15gr: + extract_sfmt_ldr15gr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr15gr.f +#define FLD(f) abuf->fields.sfmt_ldr15gr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); @@ -1638,7 +1606,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_Ri) = f_Ri; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1653,18 +1621,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr15dr: + extract_sfmt_ldr15dr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f UINT f_Rs2; f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1678,15 +1646,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldr15ps: + extract_sfmt_ldr15ps: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldr15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15ps", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1700,11 +1668,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st: + extract_sfmt_st: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1714,7 +1682,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1728,11 +1696,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str13: + extract_sfmt_str13: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f UINT f_Rj; UINT f_Ri; @@ -1742,7 +1710,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str13", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1757,11 +1725,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str14: + extract_sfmt_str14: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str14.f +#define FLD(f) abuf->fields.sfmt_str14.f SI f_disp10; UINT f_Ri; @@ -1771,7 +1739,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp10) = f_disp10; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1785,11 +1753,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str14h: + extract_sfmt_str14h: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str14h.f +#define FLD(f) abuf->fields.sfmt_str14h.f SI f_disp9; UINT f_Ri; @@ -1799,7 +1767,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp9) = f_disp9; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14h", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1813,11 +1781,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str14b: + extract_sfmt_str14b: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str14b.f +#define FLD(f) abuf->fields.sfmt_str14b.f INT f_disp8; UINT f_Ri; @@ -1827,7 +1795,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_disp8) = f_disp8; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14b", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1841,11 +1809,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str15: + extract_sfmt_str15: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str15.f +#define FLD(f) abuf->fields.sfmt_str15.f USI f_udisp6; UINT f_Ri; @@ -1855,7 +1823,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_udisp6) = f_udisp6; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1869,18 +1837,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str15gr: + extract_sfmt_str15gr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str15gr.f +#define FLD(f) abuf->fields.sfmt_str15gr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15gr", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1895,18 +1863,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str15dr: + extract_sfmt_str15dr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f UINT f_Rs2; f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1920,15 +1888,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_str15ps: + extract_sfmt_str15ps: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_str15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15ps", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1942,11 +1910,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mov: + extract_sfmt_mov: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mov.f +#define FLD(f) abuf->fields.sfmt_ldr13.f UINT f_Rj; UINT f_Ri; @@ -1956,7 +1924,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Rj) = & CPU (h_gr)[f_Rj]; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1970,11 +1938,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movdr: + extract_sfmt_movdr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movdr.f +#define FLD(f) abuf->fields.sfmt_movdr.f UINT f_Rs1; UINT f_Ri; @@ -1984,7 +1952,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_Rs1) = f_Rs1; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1997,18 +1965,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movps: + extract_sfmt_movps: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movps.f +#define FLD(f) abuf->fields.sfmt_movdr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movps", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2021,11 +1989,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mov2dr: + extract_sfmt_mov2dr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mov2dr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Rs1; UINT f_Ri; @@ -2035,7 +2003,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (f_Rs1) = f_Rs1; FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov2dr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2048,18 +2016,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mov2ps: + extract_sfmt_mov2ps: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mov2ps.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov2ps", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2072,19 +2040,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_jmp: + extract_sfmt_jmp: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_jmp", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2097,19 +2064,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_callr: + extract_sfmt_callr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callr", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2122,19 +2088,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_call: + extract_sfmt_call: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f SI f_rel12; f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label12) = f_rel12; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2146,16 +2111,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ret: + extract_sfmt_ret: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ret", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2167,19 +2131,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_int: + extract_sfmt_int: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_int.f +#define FLD(f) abuf->fields.sfmt_int.f UINT f_u8; f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_u8) = f_u8; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2191,16 +2154,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_inte: + extract_sfmt_inte: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_inte.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_inte", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2212,16 +2174,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_reti: + extract_sfmt_reti: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_reti.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_reti", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2233,19 +2194,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_brad: + extract_sfmt_brad: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2257,33 +2217,32 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bnod: + extract_sfmt_bnod: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bnod", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0)); #undef FLD return idesc; } - extract_fmt_beqd: + extract_sfmt_beqd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2295,19 +2254,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bcd: + extract_sfmt_bcd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2319,19 +2277,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bnd: + extract_sfmt_bnd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2343,19 +2300,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bvd: + extract_sfmt_bvd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2367,19 +2323,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bltd: + extract_sfmt_bltd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2391,19 +2346,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bled: + extract_sfmt_bled: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2415,19 +2369,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_blsd: + extract_sfmt_blsd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f SI f_rel9; f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); /* Record the fields for the semantic handler. */ FLD (i_label9) = f_rel9; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2439,18 +2392,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13: + extract_sfmt_dmovr13: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2463,18 +2416,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13h: + extract_sfmt_dmovr13h: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f USI f_dir9; f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); /* Record the fields for the semantic handler. */ FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2487,18 +2440,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13b: + extract_sfmt_dmovr13b: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f UINT f_dir8; f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2511,18 +2464,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13pi: + extract_sfmt_dmovr13pi: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2536,18 +2489,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13pih: + extract_sfmt_dmovr13pih: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f USI f_dir9; f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); /* Record the fields for the semantic handler. */ FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2561,18 +2514,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr13pib: + extract_sfmt_dmovr13pib: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f UINT f_dir8; f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2586,18 +2539,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmovr15pi: + extract_sfmt_dmovr15pi: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmovr15pi.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2611,18 +2564,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13: + extract_sfmt_dmov2r13: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2635,18 +2588,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13h: + extract_sfmt_dmov2r13h: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f USI f_dir9; f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); /* Record the fields for the semantic handler. */ FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2659,18 +2612,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13b: + extract_sfmt_dmov2r13b: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f UINT f_dir8; f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2683,18 +2636,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13pi: + extract_sfmt_dmov2r13pi: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2708,18 +2661,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13pih: + extract_sfmt_dmov2r13pih: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f USI f_dir9; f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); /* Record the fields for the semantic handler. */ FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2733,18 +2686,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r13pib: + extract_sfmt_dmov2r13pib: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f UINT f_dir8; f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2758,18 +2711,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_dmov2r15pd: + extract_sfmt_dmov2r15pd: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_dmov2r15pd.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f USI f_dir10; f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2783,18 +2736,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldres: + extract_sfmt_ldres: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldres", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2808,69 +2761,69 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_copop: + extract_sfmt_copop: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f /* Contents of trailing part of insn. */ UINT word_1; word_1 = GETIMEMUHI (current_cpu, pc + 2); /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_copop", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0)); #undef FLD return idesc; } - extract_fmt_andccr: + extract_sfmt_andccr: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f UINT f_u8; f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0)); #undef FLD return idesc; } - extract_fmt_stilm: + extract_sfmt_stilm: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stilm.f +#define FLD(f) abuf->fields.sfmt_int.f UINT f_u8; f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0)); #undef FLD return idesc; } - extract_fmt_addsp: + extract_sfmt_addsp: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_addsp.f +#define FLD(f) abuf->fields.sfmt_addsp.f SI f_s10; f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_s10) = f_s10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2884,18 +2837,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_extsb: + extract_sfmt_extsb: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_extsb.f +#define FLD(f) abuf->fields.sfmt_add2.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extsb", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2909,18 +2862,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_extub: + extract_sfmt_extub: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_extub.f +#define FLD(f) abuf->fields.sfmt_add2.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extub", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2934,18 +2887,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_extsh: + extract_sfmt_extsh: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_extsh.f +#define FLD(f) abuf->fields.sfmt_add2.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extsh", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2959,18 +2912,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_extuh: + extract_sfmt_extuh: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_extuh.f +#define FLD(f) abuf->fields.sfmt_add2.f UINT f_Ri; f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extuh", "Ri 0x%x", 'x', f_Ri, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "Ri 0x%x", 'x', f_Ri, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2984,18 +2937,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldm0: + extract_sfmt_ldm0: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldm0.f +#define FLD(f) abuf->fields.sfmt_ldm0.f UINT f_reglist_low_ld; f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_reglist_low_ld) = f_reglist_low_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3017,18 +2970,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldm1: + extract_sfmt_ldm1: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldm1.f +#define FLD(f) abuf->fields.sfmt_ldm1.f UINT f_reglist_hi_ld; f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_reglist_hi_ld) = f_reglist_hi_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3049,18 +3002,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stm0: + extract_sfmt_stm0: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stm0.f +#define FLD(f) abuf->fields.sfmt_stm0.f UINT f_reglist_low_st; f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_reglist_low_st) = f_reglist_low_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3082,18 +3035,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stm1: + extract_sfmt_stm1: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stm1.f +#define FLD(f) abuf->fields.sfmt_stm1.f UINT f_reglist_hi_st; f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_reglist_hi_st) = f_reglist_hi_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3114,18 +3067,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_enter: + extract_sfmt_enter: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_enter.f +#define FLD(f) abuf->fields.sfmt_enter.f USI f_u10; f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); /* Record the fields for the semantic handler. */ FLD (f_u10) = f_u10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3141,15 +3094,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_leave: + extract_sfmt_leave: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_leave.f +#define FLD(f) abuf->fields.sfmt_enter.f /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_leave", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3165,11 +3118,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_xchb: + extract_sfmt_xchb: { const IDESC *idesc = &fr30bf_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_xchb.f +#define FLD(f) abuf->fields.sfmt_add.f UINT f_Rj; UINT f_Ri; @@ -3179,7 +3132,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, /* Record the fields for the semantic handler. */ FLD (i_Ri) = & CPU (h_gr)[f_Ri]; FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_xchb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ diff --git a/sim/fr30/decode.h b/sim/fr30/decode.h index 4bc943ee95b..eda9c55139b 100644 --- a/sim/fr30/decode.h +++ b/sim/fr30/decode.h @@ -29,6 +29,8 @@ extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR, CGEN_INSN_INT, ARGBUF *); extern void fr30bf_init_idesc_table (SIM_CPU *); +extern void fr30bf_sem_init_idesc_table (SIM_CPU *); +extern void fr30bf_semf_init_idesc_table (SIM_CPU *); /* Enum declaration for instructions in cpu family fr30bf. */ typedef enum fr30bf_insn_type { @@ -77,200 +79,34 @@ typedef enum fr30bf_insn_type { , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX } FR30BF_INSN_TYPE; -#if ! WITH_SEM_SWITCH_FULL -#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,fn); -#else -#define SEMFULL(fn) -#endif - -#if ! WITH_SEM_SWITCH_FAST -#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_semf_,fn); -#else -#define SEMFAST(fn) -#endif - -#define SEM(fn) SEMFULL (fn) SEMFAST (fn) - -/* The function version of the before/after handlers is always needed, - so we always want the SEMFULL declaration of them. */ -extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_before); -extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_after); - -SEM (x_invalid) -SEM (x_after) -SEM (x_before) -SEM (x_cti_chain) -SEM (x_chain) -SEM (x_begin) -SEM (add) -SEM (addi) -SEM (add2) -SEM (addc) -SEM (addn) -SEM (addni) -SEM (addn2) -SEM (sub) -SEM (subc) -SEM (subn) -SEM (cmp) -SEM (cmpi) -SEM (cmp2) -SEM (and) -SEM (or) -SEM (eor) -SEM (andm) -SEM (andh) -SEM (andb) -SEM (orm) -SEM (orh) -SEM (orb) -SEM (eorm) -SEM (eorh) -SEM (eorb) -SEM (bandl) -SEM (borl) -SEM (beorl) -SEM (bandh) -SEM (borh) -SEM (beorh) -SEM (btstl) -SEM (btsth) -SEM (mul) -SEM (mulu) -SEM (mulh) -SEM (muluh) -SEM (div0s) -SEM (div0u) -SEM (div1) -SEM (div2) -SEM (div3) -SEM (div4s) -SEM (lsl) -SEM (lsli) -SEM (lsl2) -SEM (lsr) -SEM (lsri) -SEM (lsr2) -SEM (asr) -SEM (asri) -SEM (asr2) -SEM (ldi8) -SEM (ldi20) -SEM (ldi32) -SEM (ld) -SEM (lduh) -SEM (ldub) -SEM (ldr13) -SEM (ldr13uh) -SEM (ldr13ub) -SEM (ldr14) -SEM (ldr14uh) -SEM (ldr14ub) -SEM (ldr15) -SEM (ldr15gr) -SEM (ldr15dr) -SEM (ldr15ps) -SEM (st) -SEM (sth) -SEM (stb) -SEM (str13) -SEM (str13h) -SEM (str13b) -SEM (str14) -SEM (str14h) -SEM (str14b) -SEM (str15) -SEM (str15gr) -SEM (str15dr) -SEM (str15ps) -SEM (mov) -SEM (movdr) -SEM (movps) -SEM (mov2dr) -SEM (mov2ps) -SEM (jmp) -SEM (jmpd) -SEM (callr) -SEM (callrd) -SEM (call) -SEM (calld) -SEM (ret) -SEM (ret_d) -SEM (int) -SEM (inte) -SEM (reti) -SEM (brad) -SEM (bra) -SEM (bnod) -SEM (bno) -SEM (beqd) -SEM (beq) -SEM (bned) -SEM (bne) -SEM (bcd) -SEM (bc) -SEM (bncd) -SEM (bnc) -SEM (bnd) -SEM (bn) -SEM (bpd) -SEM (bp) -SEM (bvd) -SEM (bv) -SEM (bnvd) -SEM (bnv) -SEM (bltd) -SEM (blt) -SEM (bged) -SEM (bge) -SEM (bled) -SEM (ble) -SEM (bgtd) -SEM (bgt) -SEM (blsd) -SEM (bls) -SEM (bhid) -SEM (bhi) -SEM (dmovr13) -SEM (dmovr13h) -SEM (dmovr13b) -SEM (dmovr13pi) -SEM (dmovr13pih) -SEM (dmovr13pib) -SEM (dmovr15pi) -SEM (dmov2r13) -SEM (dmov2r13h) -SEM (dmov2r13b) -SEM (dmov2r13pi) -SEM (dmov2r13pih) -SEM (dmov2r13pib) -SEM (dmov2r15pd) -SEM (ldres) -SEM (stres) -SEM (copop) -SEM (copld) -SEM (copst) -SEM (copsv) -SEM (nop) -SEM (andccr) -SEM (orccr) -SEM (stilm) -SEM (addsp) -SEM (extsb) -SEM (extub) -SEM (extsh) -SEM (extuh) -SEM (ldm0) -SEM (ldm1) -SEM (stm0) -SEM (stm1) -SEM (enter) -SEM (leave) -SEM (xchb) - -#undef SEMFULL -#undef SEMFAST -#undef SEM +/* Enum declaration for semantic formats in cpu family fr30bf. */ +typedef enum fr30bf_sfmt_type { + FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2 + , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2 + , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND + , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL + , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH + , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2 + , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI + , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD + , FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB + , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS + , FR30BF_SFMT_ST, FR30BF_SFMT_STR13, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H + , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR + , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS + , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR + , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE + , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD + , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD + , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H + , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB + , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B + , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD + , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM + , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH + , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0 + , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB +} FR30BF_SFMT_TYPE; /* Function unit handlers (user written). */ diff --git a/sim/fr30/model.c b/sim/fr30/model.c index 9dd6612d889..59e69012cb5 100644 --- a/sim/fr30/model.c +++ b/sim/fr30/model.c @@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc., static int model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -62,7 +62,7 @@ model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -85,7 +85,7 @@ model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add2.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -108,7 +108,7 @@ model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -133,7 +133,7 @@ model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -158,7 +158,7 @@ model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addni.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -181,7 +181,7 @@ model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addn2.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -204,7 +204,7 @@ model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -229,7 +229,7 @@ model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -254,7 +254,7 @@ model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -279,7 +279,7 @@ model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -302,7 +302,7 @@ model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -323,7 +323,7 @@ model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp2.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -344,7 +344,7 @@ model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -369,7 +369,7 @@ model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -394,7 +394,7 @@ model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -419,7 +419,7 @@ model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -462,7 +462,7 @@ model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -505,7 +505,7 @@ model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -548,7 +548,7 @@ model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -591,7 +591,7 @@ model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -634,7 +634,7 @@ model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -677,7 +677,7 @@ model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -720,7 +720,7 @@ model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -763,7 +763,7 @@ model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -806,7 +806,7 @@ model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -843,7 +843,7 @@ model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -880,7 +880,7 @@ model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -917,7 +917,7 @@ model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -954,7 +954,7 @@ model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -991,7 +991,7 @@ model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1028,7 +1028,7 @@ model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1056,7 +1056,7 @@ model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1084,7 +1084,7 @@ model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mul.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1107,7 +1107,7 @@ model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulu.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1130,7 +1130,7 @@ model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1153,7 +1153,7 @@ model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1176,7 +1176,7 @@ model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div0s.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1197,7 +1197,7 @@ model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div0u.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1216,7 +1216,7 @@ model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div1.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1237,7 +1237,7 @@ model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div2.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1258,7 +1258,7 @@ model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div3.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1277,7 +1277,7 @@ model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div4s.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1296,7 +1296,7 @@ model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1321,7 +1321,7 @@ model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1344,7 +1344,7 @@ model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1367,7 +1367,7 @@ model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1392,7 +1392,7 @@ model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1415,7 +1415,7 @@ model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1438,7 +1438,7 @@ model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1463,7 +1463,7 @@ model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1486,7 +1486,7 @@ model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1509,7 +1509,7 @@ model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_ldi8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1530,7 +1530,7 @@ model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi20.f +#define FLD(f) abuf->fields.sfmt_ldi20.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1551,7 +1551,7 @@ model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi32.f +#define FLD(f) abuf->fields.sfmt_ldi32.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1572,7 +1572,7 @@ model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1594,7 +1594,7 @@ model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1616,7 +1616,7 @@ model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1638,7 +1638,7 @@ model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1660,7 +1660,7 @@ model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1682,7 +1682,7 @@ model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1704,7 +1704,7 @@ model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14.f +#define FLD(f) abuf->fields.sfmt_ldr14.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1724,7 +1724,7 @@ model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14uh.f +#define FLD(f) abuf->fields.sfmt_ldr14uh.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1744,7 +1744,7 @@ model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14ub.f +#define FLD(f) abuf->fields.sfmt_ldr14ub.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1764,7 +1764,7 @@ model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15.f +#define FLD(f) abuf->fields.sfmt_ldr15.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1784,7 +1784,7 @@ model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15gr.f +#define FLD(f) abuf->fields.sfmt_ldr15gr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1804,7 +1804,7 @@ model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1822,7 +1822,7 @@ model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1840,7 +1840,7 @@ model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1862,7 +1862,7 @@ model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1884,7 +1884,7 @@ model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1906,7 +1906,7 @@ model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1928,7 +1928,7 @@ model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1950,7 +1950,7 @@ model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1972,7 +1972,7 @@ model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str14.f +#define FLD(f) abuf->fields.sfmt_str14.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1992,7 +1992,7 @@ model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str14h.f +#define FLD(f) abuf->fields.sfmt_str14h.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2012,7 +2012,7 @@ model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str14b.f +#define FLD(f) abuf->fields.sfmt_str14b.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2032,7 +2032,7 @@ model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str15.f +#define FLD(f) abuf->fields.sfmt_str15.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2052,7 +2052,7 @@ model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str15gr.f +#define FLD(f) abuf->fields.sfmt_str15gr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2072,7 +2072,7 @@ model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2090,7 +2090,7 @@ model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_str15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2108,7 +2108,7 @@ model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mov.f +#define FLD(f) abuf->fields.sfmt_ldr13.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2131,7 +2131,7 @@ model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movdr.f +#define FLD(f) abuf->fields.sfmt_movdr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2152,7 +2152,7 @@ model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movps.f +#define FLD(f) abuf->fields.sfmt_movdr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2173,7 +2173,7 @@ model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mov2dr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2194,7 +2194,7 @@ model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mov2ps.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2215,7 +2215,7 @@ model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2235,7 +2235,7 @@ model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2255,7 +2255,7 @@ model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2275,7 +2275,7 @@ model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2295,7 +2295,7 @@ model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2313,7 +2313,7 @@ model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2331,7 +2331,7 @@ model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2349,7 +2349,7 @@ model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2367,7 +2367,7 @@ model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_int.f +#define FLD(f) abuf->fields.sfmt_int.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2386,7 +2386,7 @@ model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_inte.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2405,7 +2405,7 @@ model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_reti.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2424,7 +2424,7 @@ model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2442,7 +2442,7 @@ model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2460,7 +2460,7 @@ model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2477,7 +2477,7 @@ model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2494,7 +2494,7 @@ model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2512,7 +2512,7 @@ model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2530,7 +2530,7 @@ model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2548,7 +2548,7 @@ model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2566,7 +2566,7 @@ model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2584,7 +2584,7 @@ model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2602,7 +2602,7 @@ model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2620,7 +2620,7 @@ model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2638,7 +2638,7 @@ model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2656,7 +2656,7 @@ model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2674,7 +2674,7 @@ model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2692,7 +2692,7 @@ model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2710,7 +2710,7 @@ model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2728,7 +2728,7 @@ model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2746,7 +2746,7 @@ model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2764,7 +2764,7 @@ model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2782,7 +2782,7 @@ model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2800,7 +2800,7 @@ model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2818,7 +2818,7 @@ model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2836,7 +2836,7 @@ model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2854,7 +2854,7 @@ model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2872,7 +2872,7 @@ model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2890,7 +2890,7 @@ model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2908,7 +2908,7 @@ model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2926,7 +2926,7 @@ model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2944,7 +2944,7 @@ model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2962,7 +2962,7 @@ model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2980,7 +2980,7 @@ model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2998,7 +2998,7 @@ model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3016,7 +3016,7 @@ model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3034,7 +3034,7 @@ model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3052,7 +3052,7 @@ model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3077,7 +3077,7 @@ model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3102,7 +3102,7 @@ model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3127,7 +3127,7 @@ model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr15pi.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3152,7 +3152,7 @@ model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3170,7 +3170,7 @@ model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3188,7 +3188,7 @@ model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3206,7 +3206,7 @@ model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3231,7 +3231,7 @@ model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3256,7 +3256,7 @@ model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3281,7 +3281,7 @@ model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r15pd.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3306,7 +3306,7 @@ model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3329,7 +3329,7 @@ model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3352,7 +3352,7 @@ model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3371,7 +3371,7 @@ model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3390,7 +3390,7 @@ model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3409,7 +3409,7 @@ model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3428,7 +3428,7 @@ model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3447,7 +3447,7 @@ model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3466,7 +3466,7 @@ model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3485,7 +3485,7 @@ model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stilm.f +#define FLD(f) abuf->fields.sfmt_int.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3504,7 +3504,7 @@ model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addsp.f +#define FLD(f) abuf->fields.sfmt_addsp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3523,7 +3523,7 @@ model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_extsb.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3546,7 +3546,7 @@ model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_extub.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3569,7 +3569,7 @@ model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_extsh.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3592,7 +3592,7 @@ model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_extuh.f +#define FLD(f) abuf->fields.sfmt_add2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3615,7 +3615,7 @@ model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldm0.f +#define FLD(f) abuf->fields.sfmt_ldm0.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3632,7 +3632,7 @@ model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldm1.f +#define FLD(f) abuf->fields.sfmt_ldm1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3649,7 +3649,7 @@ model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stm0.f +#define FLD(f) abuf->fields.sfmt_stm0.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3666,7 +3666,7 @@ model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stm1.f +#define FLD(f) abuf->fields.sfmt_stm1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3683,7 +3683,7 @@ model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_enter.f +#define FLD(f) abuf->fields.sfmt_enter.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3702,7 +3702,7 @@ model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_leave.f +#define FLD(f) abuf->fields.sfmt_enter.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3721,7 +3721,7 @@ model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg) static int model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_xchb.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c index 2f8827e9045..f73f11a7058 100644 --- a/sim/fr30/sem-switch.c +++ b/sim/fr30/sem-switch.c @@ -208,11 +208,13 @@ with this program; if not, write to the Free Software Foundation, Inc., int i; for (i = 0; labels[i].label != 0; ++i) + { #if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; #else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; #endif + } #undef DEFINE_LABELS #endif /* DEFINE_LABELS */ @@ -332,12 +334,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) #if WITH_SCACHE_PBB_FR30BF #ifdef DEFINE_SWITCH vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -398,7 +400,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -441,7 +443,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -484,7 +486,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add2.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -527,7 +529,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -572,7 +574,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -591,7 +593,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addni.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -610,7 +612,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addn2.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -629,7 +631,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -672,7 +674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -717,7 +719,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -736,7 +738,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -776,7 +778,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -816,7 +818,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmp2.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -856,7 +858,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -889,7 +891,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -922,7 +924,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -955,7 +957,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -990,7 +992,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1025,7 +1027,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1060,7 +1062,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1095,7 +1097,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1130,7 +1132,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1165,7 +1167,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1200,7 +1202,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1235,7 +1237,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1270,7 +1272,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1289,7 +1291,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1308,7 +1310,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1327,7 +1329,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1346,7 +1348,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1365,7 +1367,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1384,7 +1386,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1412,7 +1414,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1440,7 +1442,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mul.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1483,7 +1485,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulu.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1526,7 +1528,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1557,7 +1559,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1588,7 +1590,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div0s.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1630,7 +1632,7 @@ if (NEBI (CPU (h_d0bit), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div0u.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1661,7 +1663,7 @@ if (NEBI (CPU (h_d0bit), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div1.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1736,7 +1738,7 @@ if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div2.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1798,7 +1800,7 @@ if (EQSI (tmp_tmp, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div3.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1821,7 +1823,7 @@ if (EQBI (CPU (h_zbit), 1)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div4s.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1844,7 +1846,7 @@ if (EQBI (CPU (h_d1bit), 1)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1896,7 +1898,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1948,7 +1950,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2000,7 +2002,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2052,7 +2054,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2104,7 +2106,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2156,7 +2158,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2208,7 +2210,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2260,7 +2262,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2312,7 +2314,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_ldi8.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2331,7 +2333,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldi20.f +#define FLD(f) abuf->fields.sfmt_ldi20.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2350,7 +2352,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldi32.f +#define FLD(f) abuf->fields.sfmt_ldi32.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 6); @@ -2369,7 +2371,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2388,7 +2390,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2407,7 +2409,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2426,7 +2428,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2445,7 +2447,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2464,7 +2466,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2483,7 +2485,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr14.f +#define FLD(f) abuf->fields.sfmt_ldr14.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2502,7 +2504,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr14uh.f +#define FLD(f) abuf->fields.sfmt_ldr14uh.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2521,7 +2523,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr14ub.f +#define FLD(f) abuf->fields.sfmt_ldr14ub.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2540,7 +2542,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr15.f +#define FLD(f) abuf->fields.sfmt_ldr15.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2559,7 +2561,7 @@ if (NESI (tmp_shift, 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr15gr.f +#define FLD(f) abuf->fields.sfmt_ldr15gr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2589,7 +2591,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2617,7 +2619,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldr15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2643,7 +2645,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2662,7 +2664,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2681,7 +2683,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2700,7 +2702,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2719,7 +2721,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2738,7 +2740,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2757,7 +2759,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str14.f +#define FLD(f) abuf->fields.sfmt_str14.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2776,7 +2778,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str14h.f +#define FLD(f) abuf->fields.sfmt_str14h.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2795,7 +2797,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str14b.f +#define FLD(f) abuf->fields.sfmt_str14b.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2814,7 +2816,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str15.f +#define FLD(f) abuf->fields.sfmt_str15.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2833,7 +2835,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str15gr.f +#define FLD(f) abuf->fields.sfmt_str15gr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2861,7 +2863,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2889,7 +2891,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_str15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2915,7 +2917,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mov.f +#define FLD(f) abuf->fields.sfmt_ldr13.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2934,7 +2936,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movdr.f +#define FLD(f) abuf->fields.sfmt_movdr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2953,7 +2955,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movps.f +#define FLD(f) abuf->fields.sfmt_movdr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2972,7 +2974,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mov2dr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2991,7 +2993,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mov2ps.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -3010,7 +3012,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3031,7 +3033,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3054,7 +3056,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3082,7 +3084,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3112,7 +3114,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3126,7 +3128,7 @@ if (NESI (FLD (f_Ri), 15)) { } { USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3140,7 +3142,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3155,7 +3157,7 @@ if (NESI (FLD (f_Ri), 15)) { } { USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3170,7 +3172,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3191,7 +3193,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3214,7 +3216,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_int.f +#define FLD(f) abuf->fields.sfmt_int.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3240,7 +3242,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_inte.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3266,7 +3268,7 @@ if (NESI (FLD (f_Ri), 15)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_reti.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3338,7 +3340,7 @@ if (EQBI (GET_H_SBIT (), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3347,7 +3349,7 @@ if (EQBI (GET_H_SBIT (), 0)) { { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3361,7 +3363,7 @@ if (EQBI (GET_H_SBIT (), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3369,7 +3371,7 @@ if (EQBI (GET_H_SBIT (), 0)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3382,7 +3384,7 @@ if (EQBI (GET_H_SBIT (), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -3399,7 +3401,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -3414,7 +3416,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3424,7 +3426,7 @@ do { } while (0); /*nop*/ if (CPU (h_zbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3441,7 +3443,7 @@ if (CPU (h_zbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3450,7 +3452,7 @@ if (CPU (h_zbit)) { if (CPU (h_zbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3466,7 +3468,7 @@ if (CPU (h_zbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3476,7 +3478,7 @@ if (CPU (h_zbit)) { if (NOTBI (CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3493,7 +3495,7 @@ if (NOTBI (CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3502,7 +3504,7 @@ if (NOTBI (CPU (h_zbit))) { if (NOTBI (CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3518,7 +3520,7 @@ if (NOTBI (CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3528,7 +3530,7 @@ if (NOTBI (CPU (h_zbit))) { if (CPU (h_cbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3545,7 +3547,7 @@ if (CPU (h_cbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3554,7 +3556,7 @@ if (CPU (h_cbit)) { if (CPU (h_cbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3570,7 +3572,7 @@ if (CPU (h_cbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3580,7 +3582,7 @@ if (CPU (h_cbit)) { if (NOTBI (CPU (h_cbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3597,7 +3599,7 @@ if (NOTBI (CPU (h_cbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3606,7 +3608,7 @@ if (NOTBI (CPU (h_cbit))) { if (NOTBI (CPU (h_cbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3622,7 +3624,7 @@ if (NOTBI (CPU (h_cbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3632,7 +3634,7 @@ if (NOTBI (CPU (h_cbit))) { if (CPU (h_nbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3649,7 +3651,7 @@ if (CPU (h_nbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3658,7 +3660,7 @@ if (CPU (h_nbit)) { if (CPU (h_nbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3674,7 +3676,7 @@ if (CPU (h_nbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3684,7 +3686,7 @@ if (CPU (h_nbit)) { if (NOTBI (CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3701,7 +3703,7 @@ if (NOTBI (CPU (h_nbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3710,7 +3712,7 @@ if (NOTBI (CPU (h_nbit))) { if (NOTBI (CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3726,7 +3728,7 @@ if (NOTBI (CPU (h_nbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3736,7 +3738,7 @@ if (NOTBI (CPU (h_nbit))) { if (CPU (h_vbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3753,7 +3755,7 @@ if (CPU (h_vbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3762,7 +3764,7 @@ if (CPU (h_vbit)) { if (CPU (h_vbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3778,7 +3780,7 @@ if (CPU (h_vbit)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3788,7 +3790,7 @@ if (CPU (h_vbit)) { if (NOTBI (CPU (h_vbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3805,7 +3807,7 @@ if (NOTBI (CPU (h_vbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3814,7 +3816,7 @@ if (NOTBI (CPU (h_vbit))) { if (NOTBI (CPU (h_vbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3830,7 +3832,7 @@ if (NOTBI (CPU (h_vbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3840,7 +3842,7 @@ if (NOTBI (CPU (h_vbit))) { if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3857,7 +3859,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3866,7 +3868,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3882,7 +3884,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3892,7 +3894,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3909,7 +3911,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3918,7 +3920,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3934,7 +3936,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3944,7 +3946,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3961,7 +3963,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3970,7 +3972,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3986,7 +3988,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -3996,7 +3998,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4013,7 +4015,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -4022,7 +4024,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4038,7 +4040,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -4048,7 +4050,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4065,7 +4067,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -4074,7 +4076,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4090,7 +4092,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -4100,7 +4102,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4117,7 +4119,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -4126,7 +4128,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4142,7 +4144,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4161,7 +4163,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4180,7 +4182,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4199,7 +4201,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4225,7 +4227,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4251,7 +4253,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4277,7 +4279,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmovr15pi.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4303,7 +4305,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4322,7 +4324,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4341,7 +4343,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4360,7 +4362,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4386,7 +4388,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4412,7 +4414,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4438,7 +4440,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_dmov2r15pd.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4464,7 +4466,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4483,7 +4485,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4502,7 +4504,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4517,7 +4519,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4532,7 +4534,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4547,7 +4549,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4562,7 +4564,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4577,7 +4579,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4596,7 +4598,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4615,7 +4617,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stilm.f +#define FLD(f) abuf->fields.sfmt_int.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4634,7 +4636,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addsp.f +#define FLD(f) abuf->fields.sfmt_addsp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4653,7 +4655,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_extsb.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4672,7 +4674,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_extub.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4691,7 +4693,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_extsh.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4710,7 +4712,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_extuh.f +#define FLD(f) abuf->fields.sfmt_add2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4729,7 +4731,7 @@ do { } while (0); /*nop*/ { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldm0.f +#define FLD(f) abuf->fields.sfmt_ldm0.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -4874,7 +4876,7 @@ if (ANDSI (FLD (f_reglist_low_ld), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldm1.f +#define FLD(f) abuf->fields.sfmt_ldm1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -5011,7 +5013,7 @@ if (ANDSI (FLD (f_reglist_hi_ld), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stm0.f +#define FLD(f) abuf->fields.sfmt_stm0.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -5156,7 +5158,7 @@ if (ANDSI (FLD (f_reglist_low_st), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stm1.f +#define FLD(f) abuf->fields.sfmt_stm1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -5303,7 +5305,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_enter.f +#define FLD(f) abuf->fields.sfmt_enter.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -5336,7 +5338,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_leave.f +#define FLD(f) abuf->fields.sfmt_enter.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -5362,7 +5364,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_xchb.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c index 40c19366ef2..9d05ecd2b1f 100644 --- a/sim/fr30/sem.c +++ b/sim/fr30/sem.c @@ -32,9 +32,20 @@ with this program; if not, write to the Free Software Foundation, Inc., #undef GET_ATTR #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) +/* This is used so that we can compile two copies of the semantic code, + one with full feature support and one without that runs fast(er). + FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ +#if FAST_P +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) +#undef TRACE_RESULT +#define TRACE_RESULT(cpu, abuf, name, type, val) +#else +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) +#endif + /* x-invalid: --invalid-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -59,7 +70,7 @@ SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-after: --after-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -80,7 +91,7 @@ SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-before: --before-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -101,7 +112,7 @@ SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-cti-chain: --cti-chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -114,12 +125,12 @@ SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) #if WITH_SCACHE_PBB_FR30BF #ifdef DEFINE_SWITCH vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -131,7 +142,7 @@ SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-chain: --chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -155,7 +166,7 @@ SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-begin: --begin-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -182,10 +193,10 @@ SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* add: add $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -227,10 +238,10 @@ SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addi: add $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -272,10 +283,10 @@ SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* add2: add2 $m4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add2.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -317,10 +328,10 @@ SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addc: addc $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -364,10 +375,10 @@ SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addn: addn $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -385,10 +396,10 @@ SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addni: addn $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addni.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -406,10 +417,10 @@ SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addn2: addn2 $m4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addn2.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -427,10 +438,10 @@ SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sub: sub $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -472,10 +483,10 @@ SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subc: subc $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addc.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -519,10 +530,10 @@ SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subn: subn $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addn.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -540,10 +551,10 @@ SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmp: cmp $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -582,10 +593,10 @@ SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpi: cmp $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -624,10 +635,10 @@ SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmp2: cmp2 $m4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp2.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -666,10 +677,10 @@ SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and: and $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -701,10 +712,10 @@ SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or: or $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -736,10 +747,10 @@ SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* eor: eor $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_and.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -771,10 +782,10 @@ SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andm: and $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -808,10 +819,10 @@ SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andh: andh $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -845,10 +856,10 @@ SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andb: andb $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -882,10 +893,10 @@ SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* orm: or $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -919,10 +930,10 @@ SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* orh: orh $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -956,10 +967,10 @@ SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* orb: orb $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -993,10 +1004,10 @@ SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* eorm: eor $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andm.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1030,10 +1041,10 @@ SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* eorh: eorh $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andh.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1067,10 +1078,10 @@ SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* eorb: eorb $Rj,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andb.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1104,10 +1115,10 @@ SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bandl: bandl $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1125,10 +1136,10 @@ SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* borl: borl $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1146,10 +1157,10 @@ SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* beorl: beorl $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1167,10 +1178,10 @@ SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bandh: bandh $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1188,10 +1199,10 @@ SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* borh: borh $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1209,10 +1220,10 @@ SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* beorh: beorh $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bandl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1230,10 +1241,10 @@ SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* btstl: btstl $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1260,10 +1271,10 @@ SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* btsth: btsth $u4,@$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_btstl.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1290,10 +1301,10 @@ SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mul: mul $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mul.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1335,10 +1346,10 @@ SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulu: mulu $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulu.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1380,10 +1391,10 @@ SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulh: mulh $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1413,10 +1424,10 @@ SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* muluh: muluh $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulh.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1446,10 +1457,10 @@ SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* div0s: div0s $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div0s.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1490,10 +1501,10 @@ if (NEBI (CPU (h_d0bit), 0)) { /* div0u: div0u $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div0u.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1523,10 +1534,10 @@ SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* div1: div1 $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div1.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1600,10 +1611,10 @@ if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { /* div2: div2 $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div2.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1664,10 +1675,10 @@ if (EQSI (tmp_tmp, 0)) { /* div3: div3 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div3.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1689,10 +1700,10 @@ if (EQBI (CPU (h_zbit), 1)) { /* div4s: div4s */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div4s.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1714,10 +1725,10 @@ if (EQBI (CPU (h_d1bit), 1)) { /* lsl: lsl $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1768,10 +1779,10 @@ if (NESI (tmp_shift, 0)) { /* lsli: lsl $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1822,10 +1833,10 @@ if (NESI (tmp_shift, 0)) { /* lsl2: lsl2 $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1876,10 +1887,10 @@ if (NESI (tmp_shift, 0)) { /* lsr: lsr $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1930,10 +1941,10 @@ if (NESI (tmp_shift, 0)) { /* lsri: lsr $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1984,10 +1995,10 @@ if (NESI (tmp_shift, 0)) { /* lsr2: lsr2 $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2038,10 +2049,10 @@ if (NESI (tmp_shift, 0)) { /* asr: asr $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsl.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2092,10 +2103,10 @@ if (NESI (tmp_shift, 0)) { /* asri: asr $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2146,10 +2157,10 @@ if (NESI (tmp_shift, 0)) { /* asr2: asr2 $u4,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lsli.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2200,10 +2211,10 @@ if (NESI (tmp_shift, 0)) { /* ldi8: ldi:8 $i8,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_ldi8.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2221,10 +2232,10 @@ SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldi20: ldi:20 $i20,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi20.f +#define FLD(f) abuf->fields.sfmt_ldi20.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2242,10 +2253,10 @@ SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldi32: ldi:32 $i32,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi32.f +#define FLD(f) abuf->fields.sfmt_ldi32.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2263,10 +2274,10 @@ SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld: ld @$Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2284,10 +2295,10 @@ SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lduh: lduh @$Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2305,10 +2316,10 @@ SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldub: ldub @$Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2326,10 +2337,10 @@ SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr13: ld @($R13,$Rj),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2347,10 +2358,10 @@ SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr13uh: lduh @($R13,$Rj),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2368,10 +2379,10 @@ SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr13ub: ldub @($R13,$Rj),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr13.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2389,10 +2400,10 @@ SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr14: ld @($R14,$disp10),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14.f +#define FLD(f) abuf->fields.sfmt_ldr14.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2410,10 +2421,10 @@ SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr14uh: lduh @($R14,$disp9),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14uh.f +#define FLD(f) abuf->fields.sfmt_ldr14uh.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2431,10 +2442,10 @@ SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr14ub: ldub @($R14,$disp8),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr14ub.f +#define FLD(f) abuf->fields.sfmt_ldr14ub.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2452,10 +2463,10 @@ SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr15: ld @($R15,$udisp6),$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15.f +#define FLD(f) abuf->fields.sfmt_ldr15.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2473,10 +2484,10 @@ SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr15gr: ld @$R15+,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15gr.f +#define FLD(f) abuf->fields.sfmt_ldr15gr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2505,10 +2516,10 @@ if (NESI (FLD (f_Ri), 15)) { /* ldr15dr: ld @$R15+,$Rs2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2535,10 +2546,10 @@ SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldr15ps: ld @$R15+,$ps */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldr15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2563,10 +2574,10 @@ SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st: st $Ri,@$Rj */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2584,10 +2595,10 @@ SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sth: sth $Ri,@$Rj */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2605,10 +2616,10 @@ SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stb: stb $Ri,@$Rj */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2626,10 +2637,10 @@ SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str13: st $Ri,@($R13,$Rj) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2647,10 +2658,10 @@ SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str13h: sth $Ri,@($R13,$Rj) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2668,10 +2679,10 @@ SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str13b: stb $Ri,@($R13,$Rj) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str13.f +#define FLD(f) abuf->fields.sfmt_str13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2689,10 +2700,10 @@ SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str14: st $Ri,@($R14,$disp10) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str14.f +#define FLD(f) abuf->fields.sfmt_str14.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2710,10 +2721,10 @@ SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str14h: sth $Ri,@($R14,$disp9) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str14h.f +#define FLD(f) abuf->fields.sfmt_str14h.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2731,10 +2742,10 @@ SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str14b: stb $Ri,@($R14,$disp8) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str14b.f +#define FLD(f) abuf->fields.sfmt_str14b.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2752,10 +2763,10 @@ SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str15: st $Ri,@($R15,$udisp6) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str15.f +#define FLD(f) abuf->fields.sfmt_str15.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2773,10 +2784,10 @@ SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str15gr: st $Ri,@-$R15 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str15gr.f +#define FLD(f) abuf->fields.sfmt_str15gr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2803,10 +2814,10 @@ SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str15dr: st $Rs2,@-$R15 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str15dr.f +#define FLD(f) abuf->fields.sfmt_ldr15dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2833,10 +2844,10 @@ SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* str15ps: st $ps,@-$R15 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_str15ps.f +#define FLD(f) abuf->fields.sfmt_addsp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2861,10 +2872,10 @@ SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mov: mov $Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mov.f +#define FLD(f) abuf->fields.sfmt_ldr13.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2882,10 +2893,10 @@ SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movdr: mov $Rs1,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movdr.f +#define FLD(f) abuf->fields.sfmt_movdr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2903,10 +2914,10 @@ SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movps: mov $ps,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movps.f +#define FLD(f) abuf->fields.sfmt_movdr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2924,10 +2935,10 @@ SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mov2dr: mov $Ri,$Rs1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mov2dr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2945,10 +2956,10 @@ SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mov2ps: mov $Ri,$ps */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mov2ps.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2966,10 +2977,10 @@ SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* jmp: jmp @$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2989,10 +3000,10 @@ SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* jmpd: jmp:d @$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3014,10 +3025,10 @@ SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* callr: call @$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3044,10 +3055,10 @@ SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* callrd: call:d @$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callr.f +#define FLD(f) abuf->fields.sfmt_mov2dr.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3076,10 +3087,10 @@ SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* call: call $label12 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3094,7 +3105,7 @@ SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) } { USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3106,10 +3117,10 @@ SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* calld: call:d $label12 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_call.f +#define FLD(f) abuf->fields.sfmt_call.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3125,7 +3136,7 @@ SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) } { USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3138,10 +3149,10 @@ SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ret: ret */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3161,10 +3172,10 @@ SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ret:d: ret:d */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3186,10 +3197,10 @@ SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* int: int $u8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_int.f +#define FLD(f) abuf->fields.sfmt_int.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3214,10 +3225,10 @@ SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* inte: inte */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_inte.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3242,10 +3253,10 @@ SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* reti: reti */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_reti.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3316,10 +3327,10 @@ if (EQBI (GET_H_SBIT (), 0)) { /* brad: bra:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3329,7 +3340,7 @@ SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -3341,10 +3352,10 @@ SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bra: bra $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_brad.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3353,7 +3364,7 @@ SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3364,10 +3375,10 @@ SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bnod: bno:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3383,10 +3394,10 @@ do { } while (0); /*nop*/ /* bno: bno $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3400,10 +3411,10 @@ do { } while (0); /*nop*/ /* beqd: beq:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3414,7 +3425,7 @@ SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_zbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3429,10 +3440,10 @@ if (CPU (h_zbit)) { /* beq: beq $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3442,7 +3453,7 @@ SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_zbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3456,10 +3467,10 @@ if (CPU (h_zbit)) { /* bned: bne:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3470,7 +3481,7 @@ SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3485,10 +3496,10 @@ if (NOTBI (CPU (h_zbit))) { /* bne: bne $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3498,7 +3509,7 @@ SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3512,10 +3523,10 @@ if (NOTBI (CPU (h_zbit))) { /* bcd: bc:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3526,7 +3537,7 @@ SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_cbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3541,10 +3552,10 @@ if (CPU (h_cbit)) { /* bc: bc $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3554,7 +3565,7 @@ SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_cbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3568,10 +3579,10 @@ if (CPU (h_cbit)) { /* bncd: bnc:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3582,7 +3593,7 @@ SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_cbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3597,10 +3608,10 @@ if (NOTBI (CPU (h_cbit))) { /* bnc: bnc $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3610,7 +3621,7 @@ SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_cbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3624,10 +3635,10 @@ if (NOTBI (CPU (h_cbit))) { /* bnd: bn:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3638,7 +3649,7 @@ SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_nbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3653,10 +3664,10 @@ if (CPU (h_nbit)) { /* bn: bn $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3666,7 +3677,7 @@ SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_nbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3680,10 +3691,10 @@ if (CPU (h_nbit)) { /* bpd: bp:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3694,7 +3705,7 @@ SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3709,10 +3720,10 @@ if (NOTBI (CPU (h_nbit))) { /* bp: bp $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3722,7 +3733,7 @@ SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3736,10 +3747,10 @@ if (NOTBI (CPU (h_nbit))) { /* bvd: bv:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3750,7 +3761,7 @@ SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_vbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3765,10 +3776,10 @@ if (CPU (h_vbit)) { /* bv: bv $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3778,7 +3789,7 @@ SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_vbit)) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3792,10 +3803,10 @@ if (CPU (h_vbit)) { /* bnvd: bnv:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3806,7 +3817,7 @@ SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_vbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3821,10 +3832,10 @@ if (NOTBI (CPU (h_vbit))) { /* bnv: bnv $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3834,7 +3845,7 @@ SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_vbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3848,10 +3859,10 @@ if (NOTBI (CPU (h_vbit))) { /* bltd: blt:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3862,7 +3873,7 @@ SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3877,10 +3888,10 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { /* blt: blt $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3890,7 +3901,7 @@ SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (XORBI (CPU (h_vbit), CPU (h_nbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3904,10 +3915,10 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) { /* bged: bge:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3918,7 +3929,7 @@ SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3933,10 +3944,10 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { /* bge: bge $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3946,7 +3957,7 @@ SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3960,10 +3971,10 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { /* bled: ble:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3974,7 +3985,7 @@ SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -3989,10 +4000,10 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { /* ble: ble $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4002,7 +4013,7 @@ SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4016,10 +4027,10 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { /* bgtd: bgt:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4030,7 +4041,7 @@ SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4045,10 +4056,10 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { /* bgt: bgt $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bled.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4058,7 +4069,7 @@ SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4072,10 +4083,10 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { /* blsd: bls:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4086,7 +4097,7 @@ SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4101,10 +4112,10 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { /* bls: bls $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4114,7 +4125,7 @@ SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (ORBI (CPU (h_cbit), CPU (h_zbit))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4128,10 +4139,10 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) { /* bhid: bhi:d $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4142,7 +4153,7 @@ SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4157,10 +4168,10 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { /* bhi: bhi $label9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f +#define FLD(f) abuf->fields.sfmt_brad.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4170,7 +4181,7 @@ SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { { USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -4184,10 +4195,10 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { /* dmovr13: dmov $R13,@$dir10 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4205,10 +4216,10 @@ SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr13h: dmovh $R13,@$dir9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4226,10 +4237,10 @@ SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr13b: dmovb $R13,@$dir8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4247,10 +4258,10 @@ SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr13pi: dmov @$R13+,@$dir10 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4275,10 +4286,10 @@ SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr13pih: dmovh @$R13+,@$dir9 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4303,10 +4314,10 @@ SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr13pib: dmovb @$R13+,@$dir8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4331,10 +4342,10 @@ SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmovr15pi: dmov @$R15+,@$dir10 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmovr15pi.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4359,10 +4370,10 @@ SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13: dmov @$dir10,$R13 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4380,10 +4391,10 @@ SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13h: dmovh @$dir9,$R13 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13h.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4401,10 +4412,10 @@ SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13b: dmovb @$dir8,$R13 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13b.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4422,10 +4433,10 @@ SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13pi: dmov @$dir10,@$R13+ */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pi.f +#define FLD(f) abuf->fields.sfmt_dmovr13pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4450,10 +4461,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13pih: dmovh @$dir9,@$R13+ */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pih.f +#define FLD(f) abuf->fields.sfmt_dmovr13pih.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4478,10 +4489,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r13pib: dmovb @$dir8,@$R13+ */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r13pib.f +#define FLD(f) abuf->fields.sfmt_dmovr13pib.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4506,10 +4517,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* dmov2r15pd: dmov @$dir10,@-$R15 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_dmov2r15pd.f +#define FLD(f) abuf->fields.sfmt_dmovr15pi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4534,10 +4545,10 @@ SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldres: ldres @$Ri+,$u4 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4555,10 +4566,10 @@ SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stres: stres $u4,@$Ri+ */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldres.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4576,10 +4587,10 @@ SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* copop: copop $u4c,$ccc,$CRj,$CRi */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4593,10 +4604,10 @@ do { } while (0); /*nop*/ /* copld: copld $u4c,$ccc,$Rjc,$CRi */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4610,10 +4621,10 @@ do { } while (0); /*nop*/ /* copst: copst $u4c,$ccc,$CRj,$Ric */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4627,10 +4638,10 @@ do { } while (0); /*nop*/ /* copsv: copsv $u4c,$ccc,$CRj,$Ric */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_copop.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4644,10 +4655,10 @@ do { } while (0); /*nop*/ /* nop: nop */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_bnod.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4661,10 +4672,10 @@ do { } while (0); /*nop*/ /* andccr: andccr $u8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4682,10 +4693,10 @@ SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* orccr: orccr $u8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_andccr.f +#define FLD(f) abuf->fields.sfmt_int.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4703,10 +4714,10 @@ SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stilm: stilm $u8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stilm.f +#define FLD(f) abuf->fields.sfmt_int.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4724,10 +4735,10 @@ SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addsp: addsp $s10 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addsp.f +#define FLD(f) abuf->fields.sfmt_addsp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4745,10 +4756,10 @@ SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* extsb: extsb $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_extsb.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4766,10 +4777,10 @@ SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* extub: extub $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_extub.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4787,10 +4798,10 @@ SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* extsh: extsh $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_extsh.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4808,10 +4819,10 @@ SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* extuh: extuh $Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_extuh.f +#define FLD(f) abuf->fields.sfmt_add2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4829,10 +4840,10 @@ SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldm0: ldm0 ($reglist_low_ld) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldm0.f +#define FLD(f) abuf->fields.sfmt_ldm0.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4976,10 +4987,10 @@ if (ANDSI (FLD (f_reglist_low_ld), 128)) { /* ldm1: ldm1 ($reglist_hi_ld) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldm1.f +#define FLD(f) abuf->fields.sfmt_ldm1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5115,10 +5126,10 @@ if (ANDSI (FLD (f_reglist_hi_ld), 128)) { /* stm0: stm0 ($reglist_low_st) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stm0.f +#define FLD(f) abuf->fields.sfmt_stm0.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5262,10 +5273,10 @@ if (ANDSI (FLD (f_reglist_low_st), 128)) { /* stm1: stm1 ($reglist_hi_st) */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stm1.f +#define FLD(f) abuf->fields.sfmt_stm1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5411,10 +5422,10 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) { /* enter: enter $u10 */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_enter.f +#define FLD(f) abuf->fields.sfmt_enter.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5446,10 +5457,10 @@ SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* leave: leave */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_leave.f +#define FLD(f) abuf->fields.sfmt_enter.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5474,10 +5485,10 @@ SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xchb: xchb @$Rj,$Ri */ -SEM_PC +static SEM_PC SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_xchb.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5502,3 +5513,198 @@ SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) #undef FLD } +/* Table of all semantic fns. */ + +static const struct sem_fn_desc sem_fns[] = { + { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) }, + { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) }, + { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) }, + { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) }, + { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) }, + { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) }, + { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) }, + { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) }, + { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) }, + { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) }, + { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) }, + { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) }, + { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) }, + { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) }, + { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) }, + { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) }, + { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) }, + { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) }, + { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) }, + { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) }, + { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) }, + { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) }, + { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) }, + { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) }, + { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) }, + { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) }, + { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) }, + { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) }, + { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) }, + { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) }, + { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) }, + { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) }, + { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) }, + { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) }, + { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) }, + { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) }, + { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) }, + { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) }, + { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) }, + { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) }, + { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) }, + { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) }, + { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) }, + { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) }, + { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) }, + { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) }, + { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) }, + { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) }, + { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) }, + { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) }, + { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) }, + { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) }, + { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) }, + { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) }, + { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) }, + { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) }, + { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) }, + { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) }, + { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) }, + { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) }, + { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) }, + { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) }, + { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) }, + { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) }, + { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) }, + { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) }, + { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) }, + { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) }, + { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) }, + { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) }, + { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) }, + { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) }, + { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) }, + { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) }, + { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) }, + { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) }, + { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) }, + { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) }, + { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) }, + { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) }, + { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) }, + { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) }, + { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) }, + { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) }, + { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) }, + { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) }, + { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) }, + { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) }, + { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) }, + { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) }, + { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) }, + { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) }, + { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) }, + { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) }, + { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) }, + { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) }, + { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) }, + { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) }, + { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) }, + { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) }, + { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) }, + { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) }, + { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) }, + { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) }, + { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) }, + { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) }, + { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) }, + { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) }, + { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) }, + { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) }, + { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) }, + { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) }, + { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) }, + { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) }, + { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) }, + { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) }, + { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) }, + { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) }, + { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) }, + { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) }, + { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) }, + { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) }, + { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) }, + { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) }, + { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) }, + { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) }, + { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) }, + { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) }, + { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) }, + { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) }, + { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) }, + { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) }, + { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) }, + { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) }, + { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) }, + { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) }, + { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) }, + { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) }, + { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) }, + { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) }, + { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) }, + { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) }, + { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) }, + { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) }, + { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) }, + { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) }, + { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) }, + { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) }, + { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) }, + { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) }, + { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) }, + { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) }, + { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) }, + { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) }, + { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) }, + { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) }, + { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) }, + { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) }, + { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) }, + { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) }, + { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) }, + { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) }, + { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) }, + { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) }, + { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) }, + { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) }, + { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) }, + { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) }, + { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) }, + { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) }, + { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) }, + { 0, 0 } +}; + +/* Add the semantic fns to IDESC_TABLE. */ + +void +SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu) +{ + IDESC *idesc_table = CPU_IDESC (current_cpu); + const struct sem_fn_desc *sf; + + for (sf = &sem_fns[0]; sf->fn != 0; ++sf) + { +#if FAST_P + idesc_table[sf->index].sem_fast = sf->fn; +#else + idesc_table[sf->index].sem_full = sf->fn; +#endif + } +} + diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog index 4978b8b3998..f6582fc6606 100644 --- a/sim/i960/ChangeLog +++ b/sim/i960/ChangeLog @@ -1,3 +1,12 @@ +1999-08-09 Doug Evans <devans@casey.cygnus.com> + + * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. + +1999-08-04 Doug Evans <devans@casey.cygnus.com> + + * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. + * i960-desc.h: Rebuild. + 1999-05-08 Felix Lee <flee@cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/i960/cpu.h b/sim/i960/cpu.h index 98879067e0e..17701d3a37a 100644 --- a/sim/i960/cpu.h +++ b/sim/i960/cpu.h @@ -72,1485 +72,208 @@ typedef struct { int empty; } MODEL_I960CA_DATA; +/* Instruction argument buffer. */ + union sem_fields { - struct { /* empty sformat for unspecified field list */ - int empty; - } fmt_empty; - struct { /* e.g. mulo $src1, $src2, $dst */ - SI * i_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_dst; - } fmt_mulo; - struct { /* e.g. mulo $lit1, $src2, $dst */ - UINT f_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src2; - unsigned char out_dst; - } fmt_mulo1; - struct { /* e.g. mulo $src1, $lit2, $dst */ - UINT f_src2; - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - } fmt_mulo2; - struct { /* e.g. mulo $lit1, $lit2, $dst */ - UINT f_src1; - UINT f_src2; - SI * i_dst; - unsigned char out_dst; - } fmt_mulo3; - struct { /* e.g. notbit $src1, $src2, $dst */ - SI * i_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_dst; - } fmt_notbit; - struct { /* e.g. notbit $lit1, $src2, $dst */ - UINT f_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src2; - unsigned char out_dst; - } fmt_notbit1; - struct { /* e.g. notbit $src1, $lit2, $dst */ - UINT f_src2; - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - } fmt_notbit2; - struct { /* e.g. notbit $lit1, $lit2, $dst */ - UINT f_src1; - UINT f_src2; - SI * i_dst; - unsigned char out_dst; - } fmt_notbit3; - struct { /* e.g. not $src1, $src2, $dst */ - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - } fmt_not; - struct { /* e.g. not $lit1, $src2, $dst */ - UINT f_src1; - SI * i_dst; - unsigned char out_dst; - } fmt_not1; - struct { /* e.g. not $src1, $lit2, $dst */ - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - } fmt_not2; - struct { /* e.g. not $lit1, $lit2, $dst */ - UINT f_src1; - SI * i_dst; - unsigned char out_dst; - } fmt_not3; - struct { /* e.g. shlo $src1, $src2, $dst */ - SI * i_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_dst; - } fmt_shlo; - struct { /* e.g. shlo $lit1, $src2, $dst */ - UINT f_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src2; - unsigned char out_dst; - } fmt_shlo1; - struct { /* e.g. shlo $src1, $lit2, $dst */ - UINT f_src2; - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - } fmt_shlo2; - struct { /* e.g. shlo $lit1, $lit2, $dst */ - UINT f_src1; - UINT f_src2; - SI * i_dst; - unsigned char out_dst; - } fmt_shlo3; - struct { /* e.g. emul $src1, $src2, $dst */ - UINT f_srcdst; - SI * i_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_emul; - struct { /* e.g. emul $lit1, $src2, $dst */ - UINT f_srcdst; - UINT f_src1; - SI * i_src2; - SI * i_dst; - unsigned char in_src2; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_emul1; - struct { /* e.g. emul $src1, $lit2, $dst */ - UINT f_srcdst; - UINT f_src2; - SI * i_src1; - SI * i_dst; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_emul2; - struct { /* e.g. emul $lit1, $lit2, $dst */ - UINT f_srcdst; - UINT f_src1; - UINT f_src2; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_emul3; - struct { /* e.g. movl $src1, $dst */ - UINT f_src1; - UINT f_srcdst; - SI * i_src1; - SI * i_dst; - unsigned char in_h_gr_add__VM_index_of_src1_1; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_movl; - struct { /* e.g. movl $lit1, $dst */ - UINT f_srcdst; - UINT f_src1; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_movl1; - struct { /* e.g. movt $src1, $dst */ - UINT f_src1; - UINT f_srcdst; - SI * i_src1; - SI * i_dst; - unsigned char in_h_gr_add__VM_index_of_src1_1; - unsigned char in_h_gr_add__VM_index_of_src1_2; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_movt; - struct { /* e.g. movt $lit1, $dst */ - UINT f_srcdst; - UINT f_src1; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_movt1; - struct { /* e.g. movq $src1, $dst */ - UINT f_src1; - UINT f_srcdst; - SI * i_src1; - SI * i_dst; - unsigned char in_h_gr_add__VM_index_of_src1_1; - unsigned char in_h_gr_add__VM_index_of_src1_2; - unsigned char in_h_gr_add__VM_index_of_src1_3; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_movq; - struct { /* e.g. movq $lit1, $dst */ - UINT f_srcdst; - UINT f_src1; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_movq1; - struct { /* e.g. modpc $src1, $src2, $dst */ - SI * i_src2; - SI * i_dst; - unsigned char in_src2; - unsigned char out_dst; - } fmt_modpc; - struct { /* e.g. lda $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_lda_offset; - struct { /* e.g. lda $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_lda_indirect_offset; - struct { /* e.g. lda ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_lda_indirect; - struct { /* e.g. lda ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_lda_indirect_index; - struct { /* e.g. lda $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_lda_disp; - struct { /* e.g. lda $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_lda_indirect_disp; - struct { /* e.g. lda $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_lda_index_disp; - struct { /* e.g. lda $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_lda_indirect_index_disp; - struct { /* e.g. ld $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_ld_offset; - struct { /* e.g. ld $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ld_indirect_offset; - struct { /* e.g. ld ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ld_indirect; - struct { /* e.g. ld ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ld_indirect_index; - struct { /* e.g. ld $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_ld_disp; - struct { /* e.g. ld $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ld_indirect_disp; - struct { /* e.g. ld $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_ld_index_disp; - struct { /* e.g. ld $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ld_indirect_index_disp; - struct { /* e.g. ldob $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_ldob_offset; - struct { /* e.g. ldob $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldob_indirect_offset; - struct { /* e.g. ldob ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldob_indirect; - struct { /* e.g. ldob ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldob_indirect_index; - struct { /* e.g. ldob $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_ldob_disp; - struct { /* e.g. ldob $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldob_indirect_disp; - struct { /* e.g. ldob $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldob_index_disp; - struct { /* e.g. ldob $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldob_indirect_index_disp; - struct { /* e.g. ldos $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_ldos_offset; - struct { /* e.g. ldos $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldos_indirect_offset; - struct { /* e.g. ldos ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldos_indirect; - struct { /* e.g. ldos ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldos_indirect_index; - struct { /* e.g. ldos $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_ldos_disp; - struct { /* e.g. ldos $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldos_indirect_disp; - struct { /* e.g. ldos $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldos_index_disp; - struct { /* e.g. ldos $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldos_indirect_index_disp; - struct { /* e.g. ldib $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_ldib_offset; - struct { /* e.g. ldib $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldib_indirect_offset; - struct { /* e.g. ldib ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldib_indirect; - struct { /* e.g. ldib ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldib_indirect_index; - struct { /* e.g. ldib $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_ldib_disp; - struct { /* e.g. ldib $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldib_indirect_disp; - struct { /* e.g. ldib $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldib_index_disp; - struct { /* e.g. ldib $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldib_indirect_index_disp; - struct { /* e.g. ldis $offset, $dst */ - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - } fmt_ldis_offset; - struct { /* e.g. ldis $offset($abase), $dst */ - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldis_indirect_offset; - struct { /* e.g. ldis ($abase), $dst */ - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldis_indirect; - struct { /* e.g. ldis ($abase)[$index*S$scale], $dst */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldis_indirect_index; - struct { /* e.g. ldis $optdisp, $dst */ - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - } fmt_ldis_disp; - struct { /* e.g. ldis $optdisp($abase), $dst */ - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - } fmt_ldis_indirect_disp; - struct { /* e.g. ldis $optdisp[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldis_index_disp; - struct { /* e.g. ldis $optdisp($abase)[$index*S$scale], $dst */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - } fmt_ldis_indirect_index_disp; - struct { /* e.g. ldl $offset, $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_offset; - struct { /* e.g. ldl $offset($abase), $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_indirect_offset; - struct { /* e.g. ldl ($abase), $dst */ - UINT f_srcdst; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_indirect; - struct { /* e.g. ldl ($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_indirect_index; - struct { /* e.g. ldl $optdisp, $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_disp; - struct { /* e.g. ldl $optdisp($abase), $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_indirect_disp; - struct { /* e.g. ldl $optdisp[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_index_disp; - struct { /* e.g. ldl $optdisp($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - } fmt_ldl_indirect_index_disp; - struct { /* e.g. ldt $offset, $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_offset; - struct { /* e.g. ldt $offset($abase), $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_indirect_offset; - struct { /* e.g. ldt ($abase), $dst */ - UINT f_srcdst; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_indirect; - struct { /* e.g. ldt ($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_indirect_index; - struct { /* e.g. ldt $optdisp, $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_disp; - struct { /* e.g. ldt $optdisp($abase), $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_indirect_disp; - struct { /* e.g. ldt $optdisp[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_index_disp; - struct { /* e.g. ldt $optdisp($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - } fmt_ldt_indirect_index_disp; - struct { /* e.g. ldq $offset, $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_offset; - struct { /* e.g. ldq $offset($abase), $dst */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_indirect_offset; - struct { /* e.g. ldq ($abase), $dst */ - UINT f_srcdst; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_indirect; - struct { /* e.g. ldq ($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_indirect_index; - struct { /* e.g. ldq $optdisp, $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_dst; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_disp; - struct { /* e.g. ldq $optdisp($abase), $dst */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_dst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_indirect_disp; - struct { /* e.g. ldq $optdisp[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_dst; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_index_disp; - struct { /* e.g. ldq $optdisp($abase)[$index*S$scale], $dst */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_dst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__VM_index_of_dst_1; - unsigned char out_h_gr_add__VM_index_of_dst_2; - unsigned char out_h_gr_add__VM_index_of_dst_3; - } fmt_ldq_indirect_index_disp; - struct { /* e.g. st $st_src, $offset */ - UINT f_offset; - SI * i_st_src; - unsigned char in_st_src; - } fmt_st_offset; - struct { /* e.g. st $st_src, $offset($abase) */ - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_st_indirect_offset; - struct { /* e.g. st $st_src, ($abase) */ - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_st_indirect; - struct { /* e.g. st $st_src, ($abase)[$index*S$scale] */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_st_indirect_index; - struct { /* e.g. st $st_src, $optdisp */ - UINT f_optdisp; - SI * i_st_src; - unsigned char in_st_src; - } fmt_st_disp; - struct { /* e.g. st $st_src, $optdisp($abase) */ - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_st_indirect_disp; - struct { /* e.g. st $st_src, $optdisp[$index*S$scale */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_index; - unsigned char in_st_src; - } fmt_st_index_disp; - struct { /* e.g. st $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_st_indirect_index_disp; - struct { /* e.g. stob $st_src, $offset */ - UINT f_offset; - SI * i_st_src; - unsigned char in_st_src; - } fmt_stob_offset; - struct { /* e.g. stob $st_src, $offset($abase) */ - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stob_indirect_offset; - struct { /* e.g. stob $st_src, ($abase) */ - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stob_indirect; - struct { /* e.g. stob $st_src, ($abase)[$index*S$scale] */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stob_indirect_index; - struct { /* e.g. stob $st_src, $optdisp */ - UINT f_optdisp; - SI * i_st_src; - unsigned char in_st_src; - } fmt_stob_disp; - struct { /* e.g. stob $st_src, $optdisp($abase) */ - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stob_indirect_disp; - struct { /* e.g. stob $st_src, $optdisp[$index*S$scale */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stob_index_disp; - struct { /* e.g. stob $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stob_indirect_index_disp; - struct { /* e.g. stos $st_src, $offset */ - UINT f_offset; - SI * i_st_src; - unsigned char in_st_src; - } fmt_stos_offset; - struct { /* e.g. stos $st_src, $offset($abase) */ - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stos_indirect_offset; - struct { /* e.g. stos $st_src, ($abase) */ - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stos_indirect; - struct { /* e.g. stos $st_src, ($abase)[$index*S$scale] */ - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stos_indirect_index; - struct { /* e.g. stos $st_src, $optdisp */ - UINT f_optdisp; - SI * i_st_src; - unsigned char in_st_src; - } fmt_stos_disp; - struct { /* e.g. stos $st_src, $optdisp($abase) */ - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_st_src; - } fmt_stos_indirect_disp; - struct { /* e.g. stos $st_src, $optdisp[$index*S$scale */ - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stos_index_disp; - struct { /* e.g. stos $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stos_indirect_index_disp; - struct { /* e.g. stl $st_src, $offset */ - UINT f_srcdst; - UINT f_offset; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_st_src; - } fmt_stl_offset; - struct { /* e.g. stl $st_src, $offset($abase) */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_st_src; - } fmt_stl_indirect_offset; - struct { /* e.g. stl $st_src, ($abase) */ - UINT f_srcdst; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_st_src; - } fmt_stl_indirect; - struct { /* e.g. stl $st_src, ($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stl_indirect_index; - struct { /* e.g. stl $st_src, $optdisp */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_st_src; - } fmt_stl_disp; - struct { /* e.g. stl $st_src, $optdisp($abase) */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_st_src; - } fmt_stl_indirect_disp; - struct { /* e.g. stl $st_src, $optdisp[$index*S$scale */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stl_index_disp; - struct { /* e.g. stl $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stl_indirect_index_disp; - struct { /* e.g. stt $st_src, $offset */ - UINT f_srcdst; - UINT f_offset; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_st_src; - } fmt_stt_offset; - struct { /* e.g. stt $st_src, $offset($abase) */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_st_src; - } fmt_stt_indirect_offset; - struct { /* e.g. stt $st_src, ($abase) */ - UINT f_srcdst; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_st_src; - } fmt_stt_indirect; - struct { /* e.g. stt $st_src, ($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stt_indirect_index; - struct { /* e.g. stt $st_src, $optdisp */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_st_src; - } fmt_stt_disp; - struct { /* e.g. stt $st_src, $optdisp($abase) */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_st_src; - } fmt_stt_indirect_disp; - struct { /* e.g. stt $st_src, $optdisp[$index*S$scale */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stt_index_disp; - struct { /* e.g. stt $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stt_indirect_index_disp; - struct { /* e.g. stq $st_src, $offset */ - UINT f_srcdst; - UINT f_offset; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_st_src; - } fmt_stq_offset; - struct { /* e.g. stq $st_src, $offset($abase) */ - UINT f_srcdst; - UINT f_offset; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_st_src; - } fmt_stq_indirect_offset; - struct { /* e.g. stq $st_src, ($abase) */ - UINT f_srcdst; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_st_src; - } fmt_stq_indirect; - struct { /* e.g. stq $st_src, ($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stq_indirect_index; - struct { /* e.g. stq $st_src, $optdisp */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_st_src; - } fmt_stq_disp; - struct { /* e.g. stq $st_src, $optdisp($abase) */ - UINT f_srcdst; - UINT f_optdisp; - SI * i_abase; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_st_src; - } fmt_stq_indirect_disp; - struct { /* e.g. stq $st_src, $optdisp[$index*S$scale */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_index; - SI * i_st_src; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stq_index_disp; - struct { /* e.g. stq $st_src, $optdisp($abase)[$index*S$scale] */ - UINT f_srcdst; - UINT f_optdisp; - UINT f_scale; - SI * i_abase; - SI * i_index; - SI * i_st_src; - unsigned char in_abase; - unsigned char in_h_gr_add__VM_index_of_st_src_1; - unsigned char in_h_gr_add__VM_index_of_st_src_2; - unsigned char in_h_gr_add__VM_index_of_st_src_3; - unsigned char in_index; - unsigned char in_st_src; - } fmt_stq_indirect_index_disp; - struct { /* e.g. cmpi $src1, $src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_cmpi; - struct { /* e.g. cmpi $lit1, $src2 */ - UINT f_src1; - SI * i_src2; - unsigned char in_src2; - } fmt_cmpi1; - struct { /* e.g. cmpi $src1, $lit2 */ - UINT f_src2; - SI * i_src1; - unsigned char in_src1; - } fmt_cmpi2; - struct { /* e.g. cmpi $lit1, $lit2 */ - UINT f_src1; - UINT f_src2; - } fmt_cmpi3; - struct { /* e.g. cmpo $src1, $src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_cmpo; - struct { /* e.g. cmpo $lit1, $src2 */ - UINT f_src1; - SI * i_src2; - unsigned char in_src2; - } fmt_cmpo1; - struct { /* e.g. cmpo $src1, $lit2 */ - UINT f_src2; - SI * i_src1; - unsigned char in_src1; - } fmt_cmpo2; - struct { /* e.g. cmpo $lit1, $lit2 */ - UINT f_src1; - UINT f_src2; - } fmt_cmpo3; - struct { /* e.g. testno $br_src1 */ - SI * i_br_src1; - unsigned char out_br_src1; - } fmt_testno_reg; - struct { /* e.g. flushreg */ - int empty; - } fmt_flushreg; - /* cti insns, kept separately so addr_cache is in fixed place */ - struct { - union { - struct { /* e.g. cmpobe $br_src1, $br_src2, $br_disp */ - IADDR i_br_disp; - SI * i_br_src1; - SI * i_br_src2; - unsigned char in_br_src1; - unsigned char in_br_src2; - } fmt_cmpobe_reg; - struct { /* e.g. cmpobe $br_lit1, $br_src2, $br_disp */ - UINT f_br_src1; - IADDR i_br_disp; - SI * i_br_src2; - unsigned char in_br_src2; - } fmt_cmpobe_lit; - struct { /* e.g. cmpobl $br_src1, $br_src2, $br_disp */ - IADDR i_br_disp; - SI * i_br_src1; - SI * i_br_src2; - unsigned char in_br_src1; - unsigned char in_br_src2; - } fmt_cmpobl_reg; - struct { /* e.g. cmpobl $br_lit1, $br_src2, $br_disp */ - UINT f_br_src1; - IADDR i_br_disp; - SI * i_br_src2; - unsigned char in_br_src2; - } fmt_cmpobl_lit; - struct { /* e.g. bbc $br_src1, $br_src2, $br_disp */ - IADDR i_br_disp; - SI * i_br_src1; - SI * i_br_src2; - unsigned char in_br_src1; - unsigned char in_br_src2; - } fmt_bbc_reg; - struct { /* e.g. bbc $br_lit1, $br_src2, $br_disp */ - UINT f_br_src1; - IADDR i_br_disp; - SI * i_br_src2; - unsigned char in_br_src2; - } fmt_bbc_lit; - struct { /* e.g. bno $ctrl_disp */ - IADDR i_ctrl_disp; - } fmt_bno; - struct { /* e.g. b $ctrl_disp */ - IADDR i_ctrl_disp; - } fmt_b; - struct { /* e.g. bx $offset($abase) */ - UINT f_offset; - SI * i_abase; - unsigned char in_abase; - } fmt_bx_indirect_offset; - struct { /* e.g. bx ($abase) */ - SI * i_abase; - unsigned char in_abase; - } fmt_bx_indirect; - struct { /* e.g. bx ($abase)[$index*S$scale] */ - UINT f_scale; - SI * i_abase; - SI * i_index; - unsigned char in_abase; - unsigned char in_index; - } fmt_bx_indirect_index; - struct { /* e.g. bx $optdisp */ - UINT f_optdisp; - } fmt_bx_disp; - struct { /* e.g. bx $optdisp($abase) */ - UINT f_optdisp; - SI * i_abase; - unsigned char in_abase; - } fmt_bx_indirect_disp; - struct { /* e.g. callx $optdisp */ - UINT f_optdisp; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_31; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } fmt_callx_disp; - struct { /* e.g. callx ($abase) */ - SI * i_abase; - unsigned char in_abase; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_31; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } fmt_callx_indirect; - struct { /* e.g. callx $offset($abase) */ - UINT f_offset; - SI * i_abase; - unsigned char in_abase; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_31; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } fmt_callx_indirect_offset; - struct { /* e.g. ret */ - int empty; - unsigned char in_h_gr_0; - unsigned char in_h_gr_2; - unsigned char in_h_gr_31; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } fmt_ret; - struct { /* e.g. calls $src1 */ - SI * i_src1; - unsigned char in_src1; - } fmt_calls; - struct { /* e.g. fmark */ - int empty; - } fmt_fmark; - } fields; -#if WITH_SCACHE_PBB - SEM_PC addr_cache; -#endif - } cti; + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + IADDR i_ctrl_disp; + } sfmt_bno; + struct { /* */ + SI* i_br_src1; + unsigned char out_br_src1; + } sfmt_testno_reg; + struct { /* */ + IADDR i_br_disp; + SI* i_br_src2; + UINT f_br_src1; + unsigned char in_br_src2; + } sfmt_cmpobe_lit; + struct { /* */ + IADDR i_br_disp; + SI* i_br_src1; + SI* i_br_src2; + unsigned char in_br_src1; + unsigned char in_br_src2; + } sfmt_cmpobe_reg; + struct { /* */ + SI* i_dst; + UINT f_src1; + UINT f_src2; + UINT f_srcdst; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + } sfmt_emul3; + struct { /* */ + SI* i_dst; + SI* i_src1; + UINT f_src2; + UINT f_srcdst; + unsigned char in_src1; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + } sfmt_emul2; + struct { /* */ + SI* i_dst; + SI* i_src2; + UINT f_src1; + UINT f_srcdst; + unsigned char in_src2; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + } sfmt_emul1; + struct { /* */ + SI* i_dst; + SI* i_src1; + SI* i_src2; + UINT f_srcdst; + unsigned char in_src1; + unsigned char in_src2; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + } sfmt_emul; + struct { /* */ + SI* i_abase; + SI* i_st_src; + UINT f_offset; + UINT f_srcdst; + unsigned char in_abase; + unsigned char in_h_gr_add__VM_index_of_st_src_1; + unsigned char in_h_gr_add__VM_index_of_st_src_2; + unsigned char in_h_gr_add__VM_index_of_st_src_3; + unsigned char in_st_src; + } sfmt_stq_indirect_offset; + struct { /* */ + SI* i_abase; + SI* i_dst; + UINT f_offset; + UINT f_srcdst; + unsigned char in_abase; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + unsigned char out_h_gr_add__VM_index_of_dst_2; + unsigned char out_h_gr_add__VM_index_of_dst_3; + } sfmt_ldq_indirect_offset; + struct { /* */ + SI* i_abase; + SI* i_index; + SI* i_st_src; + UINT f_optdisp; + UINT f_scale; + UINT f_srcdst; + unsigned char in_abase; + unsigned char in_h_gr_add__VM_index_of_st_src_1; + unsigned char in_h_gr_add__VM_index_of_st_src_2; + unsigned char in_h_gr_add__VM_index_of_st_src_3; + unsigned char in_index; + unsigned char in_st_src; + } sfmt_stq_indirect_index_disp; + struct { /* */ + SI* i_abase; + SI* i_dst; + SI* i_index; + UINT f_optdisp; + UINT f_scale; + UINT f_srcdst; + unsigned char in_abase; + unsigned char in_index; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + unsigned char out_h_gr_add__VM_index_of_dst_2; + unsigned char out_h_gr_add__VM_index_of_dst_3; + } sfmt_ldq_indirect_index_disp; + struct { /* */ + SI* i_dst; + SI* i_src1; + UINT f_src1; + UINT f_srcdst; + unsigned char in_h_gr_add__VM_index_of_src1_1; + unsigned char in_h_gr_add__VM_index_of_src1_2; + unsigned char in_h_gr_add__VM_index_of_src1_3; + unsigned char in_src1; + unsigned char out_dst; + unsigned char out_h_gr_add__VM_index_of_dst_1; + unsigned char out_h_gr_add__VM_index_of_dst_2; + unsigned char out_h_gr_add__VM_index_of_dst_3; + } sfmt_movq; + struct { /* */ + UINT f_optdisp; + unsigned char in_h_gr_0; + unsigned char in_h_gr_1; + unsigned char in_h_gr_10; + unsigned char in_h_gr_11; + unsigned char in_h_gr_12; + unsigned char in_h_gr_13; + unsigned char in_h_gr_14; + unsigned char in_h_gr_15; + unsigned char in_h_gr_2; + unsigned char in_h_gr_3; + unsigned char in_h_gr_31; + unsigned char in_h_gr_4; + unsigned char in_h_gr_5; + unsigned char in_h_gr_6; + unsigned char in_h_gr_7; + unsigned char in_h_gr_8; + unsigned char in_h_gr_9; + unsigned char out_h_gr_0; + unsigned char out_h_gr_1; + unsigned char out_h_gr_10; + unsigned char out_h_gr_11; + unsigned char out_h_gr_12; + unsigned char out_h_gr_13; + unsigned char out_h_gr_14; + unsigned char out_h_gr_15; + unsigned char out_h_gr_2; + unsigned char out_h_gr_3; + unsigned char out_h_gr_31; + unsigned char out_h_gr_4; + unsigned char out_h_gr_5; + unsigned char out_h_gr_6; + unsigned char out_h_gr_7; + unsigned char out_h_gr_8; + unsigned char out_h_gr_9; + } sfmt_callx_disp; + struct { /* */ + SI* i_abase; + UINT f_offset; + unsigned char in_abase; + unsigned char in_h_gr_0; + unsigned char in_h_gr_1; + unsigned char in_h_gr_10; + unsigned char in_h_gr_11; + unsigned char in_h_gr_12; + unsigned char in_h_gr_13; + unsigned char in_h_gr_14; + unsigned char in_h_gr_15; + unsigned char in_h_gr_2; + unsigned char in_h_gr_3; + unsigned char in_h_gr_31; + unsigned char in_h_gr_4; + unsigned char in_h_gr_5; + unsigned char in_h_gr_6; + unsigned char in_h_gr_7; + unsigned char in_h_gr_8; + unsigned char in_h_gr_9; + unsigned char out_h_gr_0; + unsigned char out_h_gr_1; + unsigned char out_h_gr_10; + unsigned char out_h_gr_11; + unsigned char out_h_gr_12; + unsigned char out_h_gr_13; + unsigned char out_h_gr_14; + unsigned char out_h_gr_15; + unsigned char out_h_gr_2; + unsigned char out_h_gr_3; + unsigned char out_h_gr_31; + unsigned char out_h_gr_4; + unsigned char out_h_gr_5; + unsigned char out_h_gr_6; + unsigned char out_h_gr_7; + unsigned char out_h_gr_8; + unsigned char out_h_gr_9; + } sfmt_callx_indirect_offset; #if WITH_SCACHE_PBB /* Writeback handler. */ struct { @@ -1572,6 +295,7 @@ union sem_fields { int insn_count; /* Next pbb to execute. */ SCACHE *next; + SCACHE *branch_target; } chain; #endif }; @@ -1583,6 +307,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ union sem semantic; int written; @@ -1603,13 +330,11 @@ struct scache { These define and assign the local vars that contain the insn's fields. */ #define EXTRACT_IFMT_EMPTY_VARS \ - /* Instruction fields. */ \ unsigned int length; #define EXTRACT_IFMT_EMPTY_CODE \ length = 0; \ #define EXTRACT_IFMT_MULO_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_src2; \ @@ -1622,18 +347,17 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MULO_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ + f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ + f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_MULO1_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_src2; \ @@ -1646,18 +370,17 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MULO1_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ + f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ + f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_MULO2_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_src2; \ @@ -1670,18 +393,17 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MULO2_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ + f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ + f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_MULO3_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_src2; \ @@ -1694,18 +416,17 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MULO3_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ + f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ + f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_LDA_OFFSET_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_abase; \ @@ -1715,15 +436,14 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_LDA_OFFSET_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modea = EXTRACT_UINT (insn, 32, 18, 1); \ - f_zeroa = EXTRACT_UINT (insn, 32, 19, 1); \ - f_offset = EXTRACT_UINT (insn, 32, 20, 12); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \ #define EXTRACT_IFMT_LDA_INDIRECT_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_abase; \ @@ -1734,16 +454,15 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_LDA_INDIRECT_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ + f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_LDA_DISP_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_optdisp; \ UINT f_srcdst; \ @@ -1758,17 +477,16 @@ struct scache { #define EXTRACT_IFMT_LDA_DISP_CODE \ length = 8; \ word_1 = GETIMEMUSI (current_cpu, pc + 4); \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_optdisp = (0|(EXTRACT_UINT (word_1, 32, 0, 32) << 0)); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ + f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_ST_OFFSET_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_abase; \ @@ -1778,15 +496,14 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ST_OFFSET_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modea = EXTRACT_UINT (insn, 32, 18, 1); \ - f_zeroa = EXTRACT_UINT (insn, 32, 19, 1); \ - f_offset = EXTRACT_UINT (insn, 32, 20, 12); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \ #define EXTRACT_IFMT_ST_INDIRECT_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_srcdst; \ UINT f_abase; \ @@ -1797,16 +514,15 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ST_INDIRECT_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ + f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_ST_DISP_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_optdisp; \ UINT f_srcdst; \ @@ -1821,17 +537,16 @@ struct scache { #define EXTRACT_IFMT_ST_DISP_CODE \ length = 8; \ word_1 = GETIMEMUSI (current_cpu, pc + 4); \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_optdisp = (0|(EXTRACT_UINT (word_1, 32, 0, 32) << 0)); \ - f_srcdst = EXTRACT_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_UINT (insn, 32, 27, 5); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \ + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ + f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ #define EXTRACT_IFMT_CMPOBE_REG_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_br_src1; \ UINT f_br_src2; \ @@ -1841,15 +556,14 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_CMPOBE_REG_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_br_src1 = EXTRACT_UINT (insn, 32, 8, 5); \ - f_br_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_br_m1 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_br_disp = ((((EXTRACT_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ - f_br_zero = EXTRACT_UINT (insn, 32, 30, 2); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ + f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ #define EXTRACT_IFMT_CMPOBE_LIT_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ UINT f_br_src1; \ UINT f_br_src2; \ @@ -1859,24 +573,23 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_CMPOBE_LIT_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_br_src1 = EXTRACT_UINT (insn, 32, 8, 5); \ - f_br_src2 = EXTRACT_UINT (insn, 32, 13, 5); \ - f_br_m1 = EXTRACT_UINT (insn, 32, 18, 1); \ - f_br_disp = ((((EXTRACT_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ - f_br_zero = EXTRACT_UINT (insn, 32, 30, 2); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ + f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ + f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ #define EXTRACT_IFMT_BNO_VARS \ - /* Instruction fields. */ \ UINT f_opcode; \ SI f_ctrl_disp; \ UINT f_ctrl_zero; \ unsigned int length; #define EXTRACT_IFMT_BNO_CODE \ length = 4; \ - f_opcode = EXTRACT_UINT (insn, 32, 0, 8); \ - f_ctrl_disp = ((((EXTRACT_INT (insn, 32, 8, 22)) << (2))) + (pc)); \ - f_ctrl_zero = EXTRACT_UINT (insn, 32, 30, 2); \ + f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ + f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); \ + f_ctrl_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ /* Collection of various things for the trace handler to use. */ diff --git a/sim/i960/cpuall.h b/sim/i960/cpuall.h index a22e55932b9..772cd9f37a3 100644 --- a/sim/i960/cpuall.h +++ b/sim/i960/cpuall.h @@ -45,6 +45,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ }; #endif diff --git a/sim/i960/decode.c b/sim/i960/decode.c index a3ac52347f2..a0f1526e44d 100644 --- a/sim/i960/decode.c +++ b/sim/i960/decode.c @@ -28,29 +28,6 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "sim-main.h" #include "sim-assert.h" -/* FIXME: Need to review choices for the following. */ - -#if WITH_SEM_SWITCH_FULL -#define FULL(fn) -#else -#define FULL(fn) CONCAT3 (i960base,_sem_,fn) , -#endif - -#if WITH_FAST -#if WITH_SEM_SWITCH_FAST -#define FAST(fn) -#else -#define FAST(fn) CONCAT3 (i960base,_semf_,fn) , /* f for fast */ -#endif -#else -#define FAST(fn) -#endif - -/* The INSN_ prefix is not here and is instead part of the `insn' argument - to avoid collisions with header files (e.g. `AND' in ansidecl.h). */ -#define IDX(insn) CONCAT2 (I960BASE_,insn) -#define TYPE(insn) CONCAT2 (I960_,insn) - /* The instruction descriptor array. This is computed at runtime. Space for it is not malloc'd to save a teensy bit of cpu in the decoder. Moving it to malloc space is trivial @@ -63,316 +40,309 @@ static IDESC i960base_insn_data[I960BASE_INSN_MAX]; static const struct insn_sem i960base_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) }, - { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) }, - { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) }, - { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) }, - { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) }, - { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) }, - { TYPE (INSN_MULO), IDX (INSN_MULO), FULL (mulo) FAST (mulo) }, - { TYPE (INSN_MULO1), IDX (INSN_MULO1), FULL (mulo1) FAST (mulo1) }, - { TYPE (INSN_MULO2), IDX (INSN_MULO2), FULL (mulo2) FAST (mulo2) }, - { TYPE (INSN_MULO3), IDX (INSN_MULO3), FULL (mulo3) FAST (mulo3) }, - { TYPE (INSN_REMO), IDX (INSN_REMO), FULL (remo) FAST (remo) }, - { TYPE (INSN_REMO1), IDX (INSN_REMO1), FULL (remo1) FAST (remo1) }, - { TYPE (INSN_REMO2), IDX (INSN_REMO2), FULL (remo2) FAST (remo2) }, - { TYPE (INSN_REMO3), IDX (INSN_REMO3), FULL (remo3) FAST (remo3) }, - { TYPE (INSN_DIVO), IDX (INSN_DIVO), FULL (divo) FAST (divo) }, - { TYPE (INSN_DIVO1), IDX (INSN_DIVO1), FULL (divo1) FAST (divo1) }, - { TYPE (INSN_DIVO2), IDX (INSN_DIVO2), FULL (divo2) FAST (divo2) }, - { TYPE (INSN_DIVO3), IDX (INSN_DIVO3), FULL (divo3) FAST (divo3) }, - { TYPE (INSN_REMI), IDX (INSN_REMI), FULL (remi) FAST (remi) }, - { TYPE (INSN_REMI1), IDX (INSN_REMI1), FULL (remi1) FAST (remi1) }, - { TYPE (INSN_REMI2), IDX (INSN_REMI2), FULL (remi2) FAST (remi2) }, - { TYPE (INSN_REMI3), IDX (INSN_REMI3), FULL (remi3) FAST (remi3) }, - { TYPE (INSN_DIVI), IDX (INSN_DIVI), FULL (divi) FAST (divi) }, - { TYPE (INSN_DIVI1), IDX (INSN_DIVI1), FULL (divi1) FAST (divi1) }, - { TYPE (INSN_DIVI2), IDX (INSN_DIVI2), FULL (divi2) FAST (divi2) }, - { TYPE (INSN_DIVI3), IDX (INSN_DIVI3), FULL (divi3) FAST (divi3) }, - { TYPE (INSN_ADDO), IDX (INSN_ADDO), FULL (addo) FAST (addo) }, - { TYPE (INSN_ADDO1), IDX (INSN_ADDO1), FULL (addo1) FAST (addo1) }, - { TYPE (INSN_ADDO2), IDX (INSN_ADDO2), FULL (addo2) FAST (addo2) }, - { TYPE (INSN_ADDO3), IDX (INSN_ADDO3), FULL (addo3) FAST (addo3) }, - { TYPE (INSN_SUBO), IDX (INSN_SUBO), FULL (subo) FAST (subo) }, - { TYPE (INSN_SUBO1), IDX (INSN_SUBO1), FULL (subo1) FAST (subo1) }, - { TYPE (INSN_SUBO2), IDX (INSN_SUBO2), FULL (subo2) FAST (subo2) }, - { TYPE (INSN_SUBO3), IDX (INSN_SUBO3), FULL (subo3) FAST (subo3) }, - { TYPE (INSN_NOTBIT), IDX (INSN_NOTBIT), FULL (notbit) FAST (notbit) }, - { TYPE (INSN_NOTBIT1), IDX (INSN_NOTBIT1), FULL (notbit1) FAST (notbit1) }, - { TYPE (INSN_NOTBIT2), IDX (INSN_NOTBIT2), FULL (notbit2) FAST (notbit2) }, - { TYPE (INSN_NOTBIT3), IDX (INSN_NOTBIT3), FULL (notbit3) FAST (notbit3) }, - { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) }, - { TYPE (INSN_AND1), IDX (INSN_AND1), FULL (and1) FAST (and1) }, - { TYPE (INSN_AND2), IDX (INSN_AND2), FULL (and2) FAST (and2) }, - { TYPE (INSN_AND3), IDX (INSN_AND3), FULL (and3) FAST (and3) }, - { TYPE (INSN_ANDNOT), IDX (INSN_ANDNOT), FULL (andnot) FAST (andnot) }, - { TYPE (INSN_ANDNOT1), IDX (INSN_ANDNOT1), FULL (andnot1) FAST (andnot1) }, - { TYPE (INSN_ANDNOT2), IDX (INSN_ANDNOT2), FULL (andnot2) FAST (andnot2) }, - { TYPE (INSN_ANDNOT3), IDX (INSN_ANDNOT3), FULL (andnot3) FAST (andnot3) }, - { TYPE (INSN_SETBIT), IDX (INSN_SETBIT), FULL (setbit) FAST (setbit) }, - { TYPE (INSN_SETBIT1), IDX (INSN_SETBIT1), FULL (setbit1) FAST (setbit1) }, - { TYPE (INSN_SETBIT2), IDX (INSN_SETBIT2), FULL (setbit2) FAST (setbit2) }, - { TYPE (INSN_SETBIT3), IDX (INSN_SETBIT3), FULL (setbit3) FAST (setbit3) }, - { TYPE (INSN_NOTAND), IDX (INSN_NOTAND), FULL (notand) FAST (notand) }, - { TYPE (INSN_NOTAND1), IDX (INSN_NOTAND1), FULL (notand1) FAST (notand1) }, - { TYPE (INSN_NOTAND2), IDX (INSN_NOTAND2), FULL (notand2) FAST (notand2) }, - { TYPE (INSN_NOTAND3), IDX (INSN_NOTAND3), FULL (notand3) FAST (notand3) }, - { TYPE (INSN_XOR), IDX (INSN_XOR), FULL (xor) FAST (xor) }, - { TYPE (INSN_XOR1), IDX (INSN_XOR1), FULL (xor1) FAST (xor1) }, - { TYPE (INSN_XOR2), IDX (INSN_XOR2), FULL (xor2) FAST (xor2) }, - { TYPE (INSN_XOR3), IDX (INSN_XOR3), FULL (xor3) FAST (xor3) }, - { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) }, - { TYPE (INSN_OR1), IDX (INSN_OR1), FULL (or1) FAST (or1) }, - { TYPE (INSN_OR2), IDX (INSN_OR2), FULL (or2) FAST (or2) }, - { TYPE (INSN_OR3), IDX (INSN_OR3), FULL (or3) FAST (or3) }, - { TYPE (INSN_NOR), IDX (INSN_NOR), FULL (nor) FAST (nor) }, - { TYPE (INSN_NOR1), IDX (INSN_NOR1), FULL (nor1) FAST (nor1) }, - { TYPE (INSN_NOR2), IDX (INSN_NOR2), FULL (nor2) FAST (nor2) }, - { TYPE (INSN_NOR3), IDX (INSN_NOR3), FULL (nor3) FAST (nor3) }, - { TYPE (INSN_XNOR), IDX (INSN_XNOR), FULL (xnor) FAST (xnor) }, - { TYPE (INSN_XNOR1), IDX (INSN_XNOR1), FULL (xnor1) FAST (xnor1) }, - { TYPE (INSN_XNOR2), IDX (INSN_XNOR2), FULL (xnor2) FAST (xnor2) }, - { TYPE (INSN_XNOR3), IDX (INSN_XNOR3), FULL (xnor3) FAST (xnor3) }, - { TYPE (INSN_NOT), IDX (INSN_NOT), FULL (not) FAST (not) }, - { TYPE (INSN_NOT1), IDX (INSN_NOT1), FULL (not1) FAST (not1) }, - { TYPE (INSN_NOT2), IDX (INSN_NOT2), FULL (not2) FAST (not2) }, - { TYPE (INSN_NOT3), IDX (INSN_NOT3), FULL (not3) FAST (not3) }, - { TYPE (INSN_ORNOT), IDX (INSN_ORNOT), FULL (ornot) FAST (ornot) }, - { TYPE (INSN_ORNOT1), IDX (INSN_ORNOT1), FULL (ornot1) FAST (ornot1) }, - { TYPE (INSN_ORNOT2), IDX (INSN_ORNOT2), FULL (ornot2) FAST (ornot2) }, - { TYPE (INSN_ORNOT3), IDX (INSN_ORNOT3), FULL (ornot3) FAST (ornot3) }, - { TYPE (INSN_CLRBIT), IDX (INSN_CLRBIT), FULL (clrbit) FAST (clrbit) }, - { TYPE (INSN_CLRBIT1), IDX (INSN_CLRBIT1), FULL (clrbit1) FAST (clrbit1) }, - { TYPE (INSN_CLRBIT2), IDX (INSN_CLRBIT2), FULL (clrbit2) FAST (clrbit2) }, - { TYPE (INSN_CLRBIT3), IDX (INSN_CLRBIT3), FULL (clrbit3) FAST (clrbit3) }, - { TYPE (INSN_SHLO), IDX (INSN_SHLO), FULL (shlo) FAST (shlo) }, - { TYPE (INSN_SHLO1), IDX (INSN_SHLO1), FULL (shlo1) FAST (shlo1) }, - { TYPE (INSN_SHLO2), IDX (INSN_SHLO2), FULL (shlo2) FAST (shlo2) }, - { TYPE (INSN_SHLO3), IDX (INSN_SHLO3), FULL (shlo3) FAST (shlo3) }, - { TYPE (INSN_SHRO), IDX (INSN_SHRO), FULL (shro) FAST (shro) }, - { TYPE (INSN_SHRO1), IDX (INSN_SHRO1), FULL (shro1) FAST (shro1) }, - { TYPE (INSN_SHRO2), IDX (INSN_SHRO2), FULL (shro2) FAST (shro2) }, - { TYPE (INSN_SHRO3), IDX (INSN_SHRO3), FULL (shro3) FAST (shro3) }, - { TYPE (INSN_SHLI), IDX (INSN_SHLI), FULL (shli) FAST (shli) }, - { TYPE (INSN_SHLI1), IDX (INSN_SHLI1), FULL (shli1) FAST (shli1) }, - { TYPE (INSN_SHLI2), IDX (INSN_SHLI2), FULL (shli2) FAST (shli2) }, - { TYPE (INSN_SHLI3), IDX (INSN_SHLI3), FULL (shli3) FAST (shli3) }, - { TYPE (INSN_SHRI), IDX (INSN_SHRI), FULL (shri) FAST (shri) }, - { TYPE (INSN_SHRI1), IDX (INSN_SHRI1), FULL (shri1) FAST (shri1) }, - { TYPE (INSN_SHRI2), IDX (INSN_SHRI2), FULL (shri2) FAST (shri2) }, - { TYPE (INSN_SHRI3), IDX (INSN_SHRI3), FULL (shri3) FAST (shri3) }, - { TYPE (INSN_EMUL), IDX (INSN_EMUL), FULL (emul) FAST (emul) }, - { TYPE (INSN_EMUL1), IDX (INSN_EMUL1), FULL (emul1) FAST (emul1) }, - { TYPE (INSN_EMUL2), IDX (INSN_EMUL2), FULL (emul2) FAST (emul2) }, - { TYPE (INSN_EMUL3), IDX (INSN_EMUL3), FULL (emul3) FAST (emul3) }, - { TYPE (INSN_MOV), IDX (INSN_MOV), FULL (mov) FAST (mov) }, - { TYPE (INSN_MOV1), IDX (INSN_MOV1), FULL (mov1) FAST (mov1) }, - { TYPE (INSN_MOVL), IDX (INSN_MOVL), FULL (movl) FAST (movl) }, - { TYPE (INSN_MOVL1), IDX (INSN_MOVL1), FULL (movl1) FAST (movl1) }, - { TYPE (INSN_MOVT), IDX (INSN_MOVT), FULL (movt) FAST (movt) }, - { TYPE (INSN_MOVT1), IDX (INSN_MOVT1), FULL (movt1) FAST (movt1) }, - { TYPE (INSN_MOVQ), IDX (INSN_MOVQ), FULL (movq) FAST (movq) }, - { TYPE (INSN_MOVQ1), IDX (INSN_MOVQ1), FULL (movq1) FAST (movq1) }, - { TYPE (INSN_MODPC), IDX (INSN_MODPC), FULL (modpc) FAST (modpc) }, - { TYPE (INSN_MODAC), IDX (INSN_MODAC), FULL (modac) FAST (modac) }, - { TYPE (INSN_LDA_OFFSET), IDX (INSN_LDA_OFFSET), FULL (lda_offset) FAST (lda_offset) }, - { TYPE (INSN_LDA_INDIRECT_OFFSET), IDX (INSN_LDA_INDIRECT_OFFSET), FULL (lda_indirect_offset) FAST (lda_indirect_offset) }, - { TYPE (INSN_LDA_INDIRECT), IDX (INSN_LDA_INDIRECT), FULL (lda_indirect) FAST (lda_indirect) }, - { TYPE (INSN_LDA_INDIRECT_INDEX), IDX (INSN_LDA_INDIRECT_INDEX), FULL (lda_indirect_index) FAST (lda_indirect_index) }, - { TYPE (INSN_LDA_DISP), IDX (INSN_LDA_DISP), FULL (lda_disp) FAST (lda_disp) }, - { TYPE (INSN_LDA_INDIRECT_DISP), IDX (INSN_LDA_INDIRECT_DISP), FULL (lda_indirect_disp) FAST (lda_indirect_disp) }, - { TYPE (INSN_LDA_INDEX_DISP), IDX (INSN_LDA_INDEX_DISP), FULL (lda_index_disp) FAST (lda_index_disp) }, - { TYPE (INSN_LDA_INDIRECT_INDEX_DISP), IDX (INSN_LDA_INDIRECT_INDEX_DISP), FULL (lda_indirect_index_disp) FAST (lda_indirect_index_disp) }, - { TYPE (INSN_LD_OFFSET), IDX (INSN_LD_OFFSET), FULL (ld_offset) FAST (ld_offset) }, - { TYPE (INSN_LD_INDIRECT_OFFSET), IDX (INSN_LD_INDIRECT_OFFSET), FULL (ld_indirect_offset) FAST (ld_indirect_offset) }, - { TYPE (INSN_LD_INDIRECT), IDX (INSN_LD_INDIRECT), FULL (ld_indirect) FAST (ld_indirect) }, - { TYPE (INSN_LD_INDIRECT_INDEX), IDX (INSN_LD_INDIRECT_INDEX), FULL (ld_indirect_index) FAST (ld_indirect_index) }, - { TYPE (INSN_LD_DISP), IDX (INSN_LD_DISP), FULL (ld_disp) FAST (ld_disp) }, - { TYPE (INSN_LD_INDIRECT_DISP), IDX (INSN_LD_INDIRECT_DISP), FULL (ld_indirect_disp) FAST (ld_indirect_disp) }, - { TYPE (INSN_LD_INDEX_DISP), IDX (INSN_LD_INDEX_DISP), FULL (ld_index_disp) FAST (ld_index_disp) }, - { TYPE (INSN_LD_INDIRECT_INDEX_DISP), IDX (INSN_LD_INDIRECT_INDEX_DISP), FULL (ld_indirect_index_disp) FAST (ld_indirect_index_disp) }, - { TYPE (INSN_LDOB_OFFSET), IDX (INSN_LDOB_OFFSET), FULL (ldob_offset) FAST (ldob_offset) }, - { TYPE (INSN_LDOB_INDIRECT_OFFSET), IDX (INSN_LDOB_INDIRECT_OFFSET), FULL (ldob_indirect_offset) FAST (ldob_indirect_offset) }, - { TYPE (INSN_LDOB_INDIRECT), IDX (INSN_LDOB_INDIRECT), FULL (ldob_indirect) FAST (ldob_indirect) }, - { TYPE (INSN_LDOB_INDIRECT_INDEX), IDX (INSN_LDOB_INDIRECT_INDEX), FULL (ldob_indirect_index) FAST (ldob_indirect_index) }, - { TYPE (INSN_LDOB_DISP), IDX (INSN_LDOB_DISP), FULL (ldob_disp) FAST (ldob_disp) }, - { TYPE (INSN_LDOB_INDIRECT_DISP), IDX (INSN_LDOB_INDIRECT_DISP), FULL (ldob_indirect_disp) FAST (ldob_indirect_disp) }, - { TYPE (INSN_LDOB_INDEX_DISP), IDX (INSN_LDOB_INDEX_DISP), FULL (ldob_index_disp) FAST (ldob_index_disp) }, - { TYPE (INSN_LDOB_INDIRECT_INDEX_DISP), IDX (INSN_LDOB_INDIRECT_INDEX_DISP), FULL (ldob_indirect_index_disp) FAST (ldob_indirect_index_disp) }, - { TYPE (INSN_LDOS_OFFSET), IDX (INSN_LDOS_OFFSET), FULL (ldos_offset) FAST (ldos_offset) }, - { TYPE (INSN_LDOS_INDIRECT_OFFSET), IDX (INSN_LDOS_INDIRECT_OFFSET), FULL (ldos_indirect_offset) FAST (ldos_indirect_offset) }, - { TYPE (INSN_LDOS_INDIRECT), IDX (INSN_LDOS_INDIRECT), FULL (ldos_indirect) FAST (ldos_indirect) }, - { TYPE (INSN_LDOS_INDIRECT_INDEX), IDX (INSN_LDOS_INDIRECT_INDEX), FULL (ldos_indirect_index) FAST (ldos_indirect_index) }, - { TYPE (INSN_LDOS_DISP), IDX (INSN_LDOS_DISP), FULL (ldos_disp) FAST (ldos_disp) }, - { TYPE (INSN_LDOS_INDIRECT_DISP), IDX (INSN_LDOS_INDIRECT_DISP), FULL (ldos_indirect_disp) FAST (ldos_indirect_disp) }, - { TYPE (INSN_LDOS_INDEX_DISP), IDX (INSN_LDOS_INDEX_DISP), FULL (ldos_index_disp) FAST (ldos_index_disp) }, - { TYPE (INSN_LDOS_INDIRECT_INDEX_DISP), IDX (INSN_LDOS_INDIRECT_INDEX_DISP), FULL (ldos_indirect_index_disp) FAST (ldos_indirect_index_disp) }, - { TYPE (INSN_LDIB_OFFSET), IDX (INSN_LDIB_OFFSET), FULL (ldib_offset) FAST (ldib_offset) }, - { TYPE (INSN_LDIB_INDIRECT_OFFSET), IDX (INSN_LDIB_INDIRECT_OFFSET), FULL (ldib_indirect_offset) FAST (ldib_indirect_offset) }, - { TYPE (INSN_LDIB_INDIRECT), IDX (INSN_LDIB_INDIRECT), FULL (ldib_indirect) FAST (ldib_indirect) }, - { TYPE (INSN_LDIB_INDIRECT_INDEX), IDX (INSN_LDIB_INDIRECT_INDEX), FULL (ldib_indirect_index) FAST (ldib_indirect_index) }, - { TYPE (INSN_LDIB_DISP), IDX (INSN_LDIB_DISP), FULL (ldib_disp) FAST (ldib_disp) }, - { TYPE (INSN_LDIB_INDIRECT_DISP), IDX (INSN_LDIB_INDIRECT_DISP), FULL (ldib_indirect_disp) FAST (ldib_indirect_disp) }, - { TYPE (INSN_LDIB_INDEX_DISP), IDX (INSN_LDIB_INDEX_DISP), FULL (ldib_index_disp) FAST (ldib_index_disp) }, - { TYPE (INSN_LDIB_INDIRECT_INDEX_DISP), IDX (INSN_LDIB_INDIRECT_INDEX_DISP), FULL (ldib_indirect_index_disp) FAST (ldib_indirect_index_disp) }, - { TYPE (INSN_LDIS_OFFSET), IDX (INSN_LDIS_OFFSET), FULL (ldis_offset) FAST (ldis_offset) }, - { TYPE (INSN_LDIS_INDIRECT_OFFSET), IDX (INSN_LDIS_INDIRECT_OFFSET), FULL (ldis_indirect_offset) FAST (ldis_indirect_offset) }, - { TYPE (INSN_LDIS_INDIRECT), IDX (INSN_LDIS_INDIRECT), FULL (ldis_indirect) FAST (ldis_indirect) }, - { TYPE (INSN_LDIS_INDIRECT_INDEX), IDX (INSN_LDIS_INDIRECT_INDEX), FULL (ldis_indirect_index) FAST (ldis_indirect_index) }, - { TYPE (INSN_LDIS_DISP), IDX (INSN_LDIS_DISP), FULL (ldis_disp) FAST (ldis_disp) }, - { TYPE (INSN_LDIS_INDIRECT_DISP), IDX (INSN_LDIS_INDIRECT_DISP), FULL (ldis_indirect_disp) FAST (ldis_indirect_disp) }, - { TYPE (INSN_LDIS_INDEX_DISP), IDX (INSN_LDIS_INDEX_DISP), FULL (ldis_index_disp) FAST (ldis_index_disp) }, - { TYPE (INSN_LDIS_INDIRECT_INDEX_DISP), IDX (INSN_LDIS_INDIRECT_INDEX_DISP), FULL (ldis_indirect_index_disp) FAST (ldis_indirect_index_disp) }, - { TYPE (INSN_LDL_OFFSET), IDX (INSN_LDL_OFFSET), FULL (ldl_offset) FAST (ldl_offset) }, - { TYPE (INSN_LDL_INDIRECT_OFFSET), IDX (INSN_LDL_INDIRECT_OFFSET), FULL (ldl_indirect_offset) FAST (ldl_indirect_offset) }, - { TYPE (INSN_LDL_INDIRECT), IDX (INSN_LDL_INDIRECT), FULL (ldl_indirect) FAST (ldl_indirect) }, - { TYPE (INSN_LDL_INDIRECT_INDEX), IDX (INSN_LDL_INDIRECT_INDEX), FULL (ldl_indirect_index) FAST (ldl_indirect_index) }, - { TYPE (INSN_LDL_DISP), IDX (INSN_LDL_DISP), FULL (ldl_disp) FAST (ldl_disp) }, - { TYPE (INSN_LDL_INDIRECT_DISP), IDX (INSN_LDL_INDIRECT_DISP), FULL (ldl_indirect_disp) FAST (ldl_indirect_disp) }, - { TYPE (INSN_LDL_INDEX_DISP), IDX (INSN_LDL_INDEX_DISP), FULL (ldl_index_disp) FAST (ldl_index_disp) }, - { TYPE (INSN_LDL_INDIRECT_INDEX_DISP), IDX (INSN_LDL_INDIRECT_INDEX_DISP), FULL (ldl_indirect_index_disp) FAST (ldl_indirect_index_disp) }, - { TYPE (INSN_LDT_OFFSET), IDX (INSN_LDT_OFFSET), FULL (ldt_offset) FAST (ldt_offset) }, - { TYPE (INSN_LDT_INDIRECT_OFFSET), IDX (INSN_LDT_INDIRECT_OFFSET), FULL (ldt_indirect_offset) FAST (ldt_indirect_offset) }, - { TYPE (INSN_LDT_INDIRECT), IDX (INSN_LDT_INDIRECT), FULL (ldt_indirect) FAST (ldt_indirect) }, - { TYPE (INSN_LDT_INDIRECT_INDEX), IDX (INSN_LDT_INDIRECT_INDEX), FULL (ldt_indirect_index) FAST (ldt_indirect_index) }, - { TYPE (INSN_LDT_DISP), IDX (INSN_LDT_DISP), FULL (ldt_disp) FAST (ldt_disp) }, - { TYPE (INSN_LDT_INDIRECT_DISP), IDX (INSN_LDT_INDIRECT_DISP), FULL (ldt_indirect_disp) FAST (ldt_indirect_disp) }, - { TYPE (INSN_LDT_INDEX_DISP), IDX (INSN_LDT_INDEX_DISP), FULL (ldt_index_disp) FAST (ldt_index_disp) }, - { TYPE (INSN_LDT_INDIRECT_INDEX_DISP), IDX (INSN_LDT_INDIRECT_INDEX_DISP), FULL (ldt_indirect_index_disp) FAST (ldt_indirect_index_disp) }, - { TYPE (INSN_LDQ_OFFSET), IDX (INSN_LDQ_OFFSET), FULL (ldq_offset) FAST (ldq_offset) }, - { TYPE (INSN_LDQ_INDIRECT_OFFSET), IDX (INSN_LDQ_INDIRECT_OFFSET), FULL (ldq_indirect_offset) FAST (ldq_indirect_offset) }, - { TYPE (INSN_LDQ_INDIRECT), IDX (INSN_LDQ_INDIRECT), FULL (ldq_indirect) FAST (ldq_indirect) }, - { TYPE (INSN_LDQ_INDIRECT_INDEX), IDX (INSN_LDQ_INDIRECT_INDEX), FULL (ldq_indirect_index) FAST (ldq_indirect_index) }, - { TYPE (INSN_LDQ_DISP), IDX (INSN_LDQ_DISP), FULL (ldq_disp) FAST (ldq_disp) }, - { TYPE (INSN_LDQ_INDIRECT_DISP), IDX (INSN_LDQ_INDIRECT_DISP), FULL (ldq_indirect_disp) FAST (ldq_indirect_disp) }, - { TYPE (INSN_LDQ_INDEX_DISP), IDX (INSN_LDQ_INDEX_DISP), FULL (ldq_index_disp) FAST (ldq_index_disp) }, - { TYPE (INSN_LDQ_INDIRECT_INDEX_DISP), IDX (INSN_LDQ_INDIRECT_INDEX_DISP), FULL (ldq_indirect_index_disp) FAST (ldq_indirect_index_disp) }, - { TYPE (INSN_ST_OFFSET), IDX (INSN_ST_OFFSET), FULL (st_offset) FAST (st_offset) }, - { TYPE (INSN_ST_INDIRECT_OFFSET), IDX (INSN_ST_INDIRECT_OFFSET), FULL (st_indirect_offset) FAST (st_indirect_offset) }, - { TYPE (INSN_ST_INDIRECT), IDX (INSN_ST_INDIRECT), FULL (st_indirect) FAST (st_indirect) }, - { TYPE (INSN_ST_INDIRECT_INDEX), IDX (INSN_ST_INDIRECT_INDEX), FULL (st_indirect_index) FAST (st_indirect_index) }, - { TYPE (INSN_ST_DISP), IDX (INSN_ST_DISP), FULL (st_disp) FAST (st_disp) }, - { TYPE (INSN_ST_INDIRECT_DISP), IDX (INSN_ST_INDIRECT_DISP), FULL (st_indirect_disp) FAST (st_indirect_disp) }, - { TYPE (INSN_ST_INDEX_DISP), IDX (INSN_ST_INDEX_DISP), FULL (st_index_disp) FAST (st_index_disp) }, - { TYPE (INSN_ST_INDIRECT_INDEX_DISP), IDX (INSN_ST_INDIRECT_INDEX_DISP), FULL (st_indirect_index_disp) FAST (st_indirect_index_disp) }, - { TYPE (INSN_STOB_OFFSET), IDX (INSN_STOB_OFFSET), FULL (stob_offset) FAST (stob_offset) }, - { TYPE (INSN_STOB_INDIRECT_OFFSET), IDX (INSN_STOB_INDIRECT_OFFSET), FULL (stob_indirect_offset) FAST (stob_indirect_offset) }, - { TYPE (INSN_STOB_INDIRECT), IDX (INSN_STOB_INDIRECT), FULL (stob_indirect) FAST (stob_indirect) }, - { TYPE (INSN_STOB_INDIRECT_INDEX), IDX (INSN_STOB_INDIRECT_INDEX), FULL (stob_indirect_index) FAST (stob_indirect_index) }, - { TYPE (INSN_STOB_DISP), IDX (INSN_STOB_DISP), FULL (stob_disp) FAST (stob_disp) }, - { TYPE (INSN_STOB_INDIRECT_DISP), IDX (INSN_STOB_INDIRECT_DISP), FULL (stob_indirect_disp) FAST (stob_indirect_disp) }, - { TYPE (INSN_STOB_INDEX_DISP), IDX (INSN_STOB_INDEX_DISP), FULL (stob_index_disp) FAST (stob_index_disp) }, - { TYPE (INSN_STOB_INDIRECT_INDEX_DISP), IDX (INSN_STOB_INDIRECT_INDEX_DISP), FULL (stob_indirect_index_disp) FAST (stob_indirect_index_disp) }, - { TYPE (INSN_STOS_OFFSET), IDX (INSN_STOS_OFFSET), FULL (stos_offset) FAST (stos_offset) }, - { TYPE (INSN_STOS_INDIRECT_OFFSET), IDX (INSN_STOS_INDIRECT_OFFSET), FULL (stos_indirect_offset) FAST (stos_indirect_offset) }, - { TYPE (INSN_STOS_INDIRECT), IDX (INSN_STOS_INDIRECT), FULL (stos_indirect) FAST (stos_indirect) }, - { TYPE (INSN_STOS_INDIRECT_INDEX), IDX (INSN_STOS_INDIRECT_INDEX), FULL (stos_indirect_index) FAST (stos_indirect_index) }, - { TYPE (INSN_STOS_DISP), IDX (INSN_STOS_DISP), FULL (stos_disp) FAST (stos_disp) }, - { TYPE (INSN_STOS_INDIRECT_DISP), IDX (INSN_STOS_INDIRECT_DISP), FULL (stos_indirect_disp) FAST (stos_indirect_disp) }, - { TYPE (INSN_STOS_INDEX_DISP), IDX (INSN_STOS_INDEX_DISP), FULL (stos_index_disp) FAST (stos_index_disp) }, - { TYPE (INSN_STOS_INDIRECT_INDEX_DISP), IDX (INSN_STOS_INDIRECT_INDEX_DISP), FULL (stos_indirect_index_disp) FAST (stos_indirect_index_disp) }, - { TYPE (INSN_STL_OFFSET), IDX (INSN_STL_OFFSET), FULL (stl_offset) FAST (stl_offset) }, - { TYPE (INSN_STL_INDIRECT_OFFSET), IDX (INSN_STL_INDIRECT_OFFSET), FULL (stl_indirect_offset) FAST (stl_indirect_offset) }, - { TYPE (INSN_STL_INDIRECT), IDX (INSN_STL_INDIRECT), FULL (stl_indirect) FAST (stl_indirect) }, - { TYPE (INSN_STL_INDIRECT_INDEX), IDX (INSN_STL_INDIRECT_INDEX), FULL (stl_indirect_index) FAST (stl_indirect_index) }, - { TYPE (INSN_STL_DISP), IDX (INSN_STL_DISP), FULL (stl_disp) FAST (stl_disp) }, - { TYPE (INSN_STL_INDIRECT_DISP), IDX (INSN_STL_INDIRECT_DISP), FULL (stl_indirect_disp) FAST (stl_indirect_disp) }, - { TYPE (INSN_STL_INDEX_DISP), IDX (INSN_STL_INDEX_DISP), FULL (stl_index_disp) FAST (stl_index_disp) }, - { TYPE (INSN_STL_INDIRECT_INDEX_DISP), IDX (INSN_STL_INDIRECT_INDEX_DISP), FULL (stl_indirect_index_disp) FAST (stl_indirect_index_disp) }, - { TYPE (INSN_STT_OFFSET), IDX (INSN_STT_OFFSET), FULL (stt_offset) FAST (stt_offset) }, - { TYPE (INSN_STT_INDIRECT_OFFSET), IDX (INSN_STT_INDIRECT_OFFSET), FULL (stt_indirect_offset) FAST (stt_indirect_offset) }, - { TYPE (INSN_STT_INDIRECT), IDX (INSN_STT_INDIRECT), FULL (stt_indirect) FAST (stt_indirect) }, - { TYPE (INSN_STT_INDIRECT_INDEX), IDX (INSN_STT_INDIRECT_INDEX), FULL (stt_indirect_index) FAST (stt_indirect_index) }, - { TYPE (INSN_STT_DISP), IDX (INSN_STT_DISP), FULL (stt_disp) FAST (stt_disp) }, - { TYPE (INSN_STT_INDIRECT_DISP), IDX (INSN_STT_INDIRECT_DISP), FULL (stt_indirect_disp) FAST (stt_indirect_disp) }, - { TYPE (INSN_STT_INDEX_DISP), IDX (INSN_STT_INDEX_DISP), FULL (stt_index_disp) FAST (stt_index_disp) }, - { TYPE (INSN_STT_INDIRECT_INDEX_DISP), IDX (INSN_STT_INDIRECT_INDEX_DISP), FULL (stt_indirect_index_disp) FAST (stt_indirect_index_disp) }, - { TYPE (INSN_STQ_OFFSET), IDX (INSN_STQ_OFFSET), FULL (stq_offset) FAST (stq_offset) }, - { TYPE (INSN_STQ_INDIRECT_OFFSET), IDX (INSN_STQ_INDIRECT_OFFSET), FULL (stq_indirect_offset) FAST (stq_indirect_offset) }, - { TYPE (INSN_STQ_INDIRECT), IDX (INSN_STQ_INDIRECT), FULL (stq_indirect) FAST (stq_indirect) }, - { TYPE (INSN_STQ_INDIRECT_INDEX), IDX (INSN_STQ_INDIRECT_INDEX), FULL (stq_indirect_index) FAST (stq_indirect_index) }, - { TYPE (INSN_STQ_DISP), IDX (INSN_STQ_DISP), FULL (stq_disp) FAST (stq_disp) }, - { TYPE (INSN_STQ_INDIRECT_DISP), IDX (INSN_STQ_INDIRECT_DISP), FULL (stq_indirect_disp) FAST (stq_indirect_disp) }, - { TYPE (INSN_STQ_INDEX_DISP), IDX (INSN_STQ_INDEX_DISP), FULL (stq_index_disp) FAST (stq_index_disp) }, - { TYPE (INSN_STQ_INDIRECT_INDEX_DISP), IDX (INSN_STQ_INDIRECT_INDEX_DISP), FULL (stq_indirect_index_disp) FAST (stq_indirect_index_disp) }, - { TYPE (INSN_CMPOBE_REG), IDX (INSN_CMPOBE_REG), FULL (cmpobe_reg) FAST (cmpobe_reg) }, - { TYPE (INSN_CMPOBE_LIT), IDX (INSN_CMPOBE_LIT), FULL (cmpobe_lit) FAST (cmpobe_lit) }, - { TYPE (INSN_CMPOBNE_REG), IDX (INSN_CMPOBNE_REG), FULL (cmpobne_reg) FAST (cmpobne_reg) }, - { TYPE (INSN_CMPOBNE_LIT), IDX (INSN_CMPOBNE_LIT), FULL (cmpobne_lit) FAST (cmpobne_lit) }, - { TYPE (INSN_CMPOBL_REG), IDX (INSN_CMPOBL_REG), FULL (cmpobl_reg) FAST (cmpobl_reg) }, - { TYPE (INSN_CMPOBL_LIT), IDX (INSN_CMPOBL_LIT), FULL (cmpobl_lit) FAST (cmpobl_lit) }, - { TYPE (INSN_CMPOBLE_REG), IDX (INSN_CMPOBLE_REG), FULL (cmpoble_reg) FAST (cmpoble_reg) }, - { TYPE (INSN_CMPOBLE_LIT), IDX (INSN_CMPOBLE_LIT), FULL (cmpoble_lit) FAST (cmpoble_lit) }, - { TYPE (INSN_CMPOBG_REG), IDX (INSN_CMPOBG_REG), FULL (cmpobg_reg) FAST (cmpobg_reg) }, - { TYPE (INSN_CMPOBG_LIT), IDX (INSN_CMPOBG_LIT), FULL (cmpobg_lit) FAST (cmpobg_lit) }, - { TYPE (INSN_CMPOBGE_REG), IDX (INSN_CMPOBGE_REG), FULL (cmpobge_reg) FAST (cmpobge_reg) }, - { TYPE (INSN_CMPOBGE_LIT), IDX (INSN_CMPOBGE_LIT), FULL (cmpobge_lit) FAST (cmpobge_lit) }, - { TYPE (INSN_CMPIBE_REG), IDX (INSN_CMPIBE_REG), FULL (cmpibe_reg) FAST (cmpibe_reg) }, - { TYPE (INSN_CMPIBE_LIT), IDX (INSN_CMPIBE_LIT), FULL (cmpibe_lit) FAST (cmpibe_lit) }, - { TYPE (INSN_CMPIBNE_REG), IDX (INSN_CMPIBNE_REG), FULL (cmpibne_reg) FAST (cmpibne_reg) }, - { TYPE (INSN_CMPIBNE_LIT), IDX (INSN_CMPIBNE_LIT), FULL (cmpibne_lit) FAST (cmpibne_lit) }, - { TYPE (INSN_CMPIBL_REG), IDX (INSN_CMPIBL_REG), FULL (cmpibl_reg) FAST (cmpibl_reg) }, - { TYPE (INSN_CMPIBL_LIT), IDX (INSN_CMPIBL_LIT), FULL (cmpibl_lit) FAST (cmpibl_lit) }, - { TYPE (INSN_CMPIBLE_REG), IDX (INSN_CMPIBLE_REG), FULL (cmpible_reg) FAST (cmpible_reg) }, - { TYPE (INSN_CMPIBLE_LIT), IDX (INSN_CMPIBLE_LIT), FULL (cmpible_lit) FAST (cmpible_lit) }, - { TYPE (INSN_CMPIBG_REG), IDX (INSN_CMPIBG_REG), FULL (cmpibg_reg) FAST (cmpibg_reg) }, - { TYPE (INSN_CMPIBG_LIT), IDX (INSN_CMPIBG_LIT), FULL (cmpibg_lit) FAST (cmpibg_lit) }, - { TYPE (INSN_CMPIBGE_REG), IDX (INSN_CMPIBGE_REG), FULL (cmpibge_reg) FAST (cmpibge_reg) }, - { TYPE (INSN_CMPIBGE_LIT), IDX (INSN_CMPIBGE_LIT), FULL (cmpibge_lit) FAST (cmpibge_lit) }, - { TYPE (INSN_BBC_REG), IDX (INSN_BBC_REG), FULL (bbc_reg) FAST (bbc_reg) }, - { TYPE (INSN_BBC_LIT), IDX (INSN_BBC_LIT), FULL (bbc_lit) FAST (bbc_lit) }, - { TYPE (INSN_BBS_REG), IDX (INSN_BBS_REG), FULL (bbs_reg) FAST (bbs_reg) }, - { TYPE (INSN_BBS_LIT), IDX (INSN_BBS_LIT), FULL (bbs_lit) FAST (bbs_lit) }, - { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) }, - { TYPE (INSN_CMPI1), IDX (INSN_CMPI1), FULL (cmpi1) FAST (cmpi1) }, - { TYPE (INSN_CMPI2), IDX (INSN_CMPI2), FULL (cmpi2) FAST (cmpi2) }, - { TYPE (INSN_CMPI3), IDX (INSN_CMPI3), FULL (cmpi3) FAST (cmpi3) }, - { TYPE (INSN_CMPO), IDX (INSN_CMPO), FULL (cmpo) FAST (cmpo) }, - { TYPE (INSN_CMPO1), IDX (INSN_CMPO1), FULL (cmpo1) FAST (cmpo1) }, - { TYPE (INSN_CMPO2), IDX (INSN_CMPO2), FULL (cmpo2) FAST (cmpo2) }, - { TYPE (INSN_CMPO3), IDX (INSN_CMPO3), FULL (cmpo3) FAST (cmpo3) }, - { TYPE (INSN_TESTNO_REG), IDX (INSN_TESTNO_REG), FULL (testno_reg) FAST (testno_reg) }, - { TYPE (INSN_TESTG_REG), IDX (INSN_TESTG_REG), FULL (testg_reg) FAST (testg_reg) }, - { TYPE (INSN_TESTE_REG), IDX (INSN_TESTE_REG), FULL (teste_reg) FAST (teste_reg) }, - { TYPE (INSN_TESTGE_REG), IDX (INSN_TESTGE_REG), FULL (testge_reg) FAST (testge_reg) }, - { TYPE (INSN_TESTL_REG), IDX (INSN_TESTL_REG), FULL (testl_reg) FAST (testl_reg) }, - { TYPE (INSN_TESTNE_REG), IDX (INSN_TESTNE_REG), FULL (testne_reg) FAST (testne_reg) }, - { TYPE (INSN_TESTLE_REG), IDX (INSN_TESTLE_REG), FULL (testle_reg) FAST (testle_reg) }, - { TYPE (INSN_TESTO_REG), IDX (INSN_TESTO_REG), FULL (testo_reg) FAST (testo_reg) }, - { TYPE (INSN_BNO), IDX (INSN_BNO), FULL (bno) FAST (bno) }, - { TYPE (INSN_BG), IDX (INSN_BG), FULL (bg) FAST (bg) }, - { TYPE (INSN_BE), IDX (INSN_BE), FULL (be) FAST (be) }, - { TYPE (INSN_BGE), IDX (INSN_BGE), FULL (bge) FAST (bge) }, - { TYPE (INSN_BL), IDX (INSN_BL), FULL (bl) FAST (bl) }, - { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) }, - { TYPE (INSN_BLE), IDX (INSN_BLE), FULL (ble) FAST (ble) }, - { TYPE (INSN_BO), IDX (INSN_BO), FULL (bo) FAST (bo) }, - { TYPE (INSN_B), IDX (INSN_B), FULL (b) FAST (b) }, - { TYPE (INSN_BX_INDIRECT_OFFSET), IDX (INSN_BX_INDIRECT_OFFSET), FULL (bx_indirect_offset) FAST (bx_indirect_offset) }, - { TYPE (INSN_BX_INDIRECT), IDX (INSN_BX_INDIRECT), FULL (bx_indirect) FAST (bx_indirect) }, - { TYPE (INSN_BX_INDIRECT_INDEX), IDX (INSN_BX_INDIRECT_INDEX), FULL (bx_indirect_index) FAST (bx_indirect_index) }, - { TYPE (INSN_BX_DISP), IDX (INSN_BX_DISP), FULL (bx_disp) FAST (bx_disp) }, - { TYPE (INSN_BX_INDIRECT_DISP), IDX (INSN_BX_INDIRECT_DISP), FULL (bx_indirect_disp) FAST (bx_indirect_disp) }, - { TYPE (INSN_CALLX_DISP), IDX (INSN_CALLX_DISP), FULL (callx_disp) FAST (callx_disp) }, - { TYPE (INSN_CALLX_INDIRECT), IDX (INSN_CALLX_INDIRECT), FULL (callx_indirect) FAST (callx_indirect) }, - { TYPE (INSN_CALLX_INDIRECT_OFFSET), IDX (INSN_CALLX_INDIRECT_OFFSET), FULL (callx_indirect_offset) FAST (callx_indirect_offset) }, - { TYPE (INSN_RET), IDX (INSN_RET), FULL (ret) FAST (ret) }, - { TYPE (INSN_CALLS), IDX (INSN_CALLS), FULL (calls) FAST (calls) }, - { TYPE (INSN_FMARK), IDX (INSN_FMARK), FULL (fmark) FAST (fmark) }, - { TYPE (INSN_FLUSHREG), IDX (INSN_FLUSHREG), FULL (flushreg) FAST (flushreg) }, + { VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY }, + { VIRTUAL_INSN_X_AFTER, I960BASE_INSN_X_AFTER, I960BASE_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEFORE, I960BASE_INSN_X_BEFORE, I960BASE_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CTI_CHAIN, I960BASE_INSN_X_CTI_CHAIN, I960BASE_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CHAIN, I960BASE_INSN_X_CHAIN, I960BASE_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEGIN, I960BASE_INSN_X_BEGIN, I960BASE_SFMT_EMPTY }, + { I960_INSN_MULO, I960BASE_INSN_MULO, I960BASE_SFMT_MULO }, + { I960_INSN_MULO1, I960BASE_INSN_MULO1, I960BASE_SFMT_MULO1 }, + { I960_INSN_MULO2, I960BASE_INSN_MULO2, I960BASE_SFMT_MULO2 }, + { I960_INSN_MULO3, I960BASE_INSN_MULO3, I960BASE_SFMT_MULO3 }, + { I960_INSN_REMO, I960BASE_INSN_REMO, I960BASE_SFMT_MULO }, + { I960_INSN_REMO1, I960BASE_INSN_REMO1, I960BASE_SFMT_MULO1 }, + { I960_INSN_REMO2, I960BASE_INSN_REMO2, I960BASE_SFMT_MULO2 }, + { I960_INSN_REMO3, I960BASE_INSN_REMO3, I960BASE_SFMT_MULO3 }, + { I960_INSN_DIVO, I960BASE_INSN_DIVO, I960BASE_SFMT_MULO }, + { I960_INSN_DIVO1, I960BASE_INSN_DIVO1, I960BASE_SFMT_MULO1 }, + { I960_INSN_DIVO2, I960BASE_INSN_DIVO2, I960BASE_SFMT_MULO2 }, + { I960_INSN_DIVO3, I960BASE_INSN_DIVO3, I960BASE_SFMT_MULO3 }, + { I960_INSN_REMI, I960BASE_INSN_REMI, I960BASE_SFMT_MULO }, + { I960_INSN_REMI1, I960BASE_INSN_REMI1, I960BASE_SFMT_MULO1 }, + { I960_INSN_REMI2, I960BASE_INSN_REMI2, I960BASE_SFMT_MULO2 }, + { I960_INSN_REMI3, I960BASE_INSN_REMI3, I960BASE_SFMT_MULO3 }, + { I960_INSN_DIVI, I960BASE_INSN_DIVI, I960BASE_SFMT_MULO }, + { I960_INSN_DIVI1, I960BASE_INSN_DIVI1, I960BASE_SFMT_MULO1 }, + { I960_INSN_DIVI2, I960BASE_INSN_DIVI2, I960BASE_SFMT_MULO2 }, + { I960_INSN_DIVI3, I960BASE_INSN_DIVI3, I960BASE_SFMT_MULO3 }, + { I960_INSN_ADDO, I960BASE_INSN_ADDO, I960BASE_SFMT_MULO }, + { I960_INSN_ADDO1, I960BASE_INSN_ADDO1, I960BASE_SFMT_MULO1 }, + { I960_INSN_ADDO2, I960BASE_INSN_ADDO2, I960BASE_SFMT_MULO2 }, + { I960_INSN_ADDO3, I960BASE_INSN_ADDO3, I960BASE_SFMT_MULO3 }, + { I960_INSN_SUBO, I960BASE_INSN_SUBO, I960BASE_SFMT_MULO }, + { I960_INSN_SUBO1, I960BASE_INSN_SUBO1, I960BASE_SFMT_MULO1 }, + { I960_INSN_SUBO2, I960BASE_INSN_SUBO2, I960BASE_SFMT_MULO2 }, + { I960_INSN_SUBO3, I960BASE_INSN_SUBO3, I960BASE_SFMT_MULO3 }, + { I960_INSN_NOTBIT, I960BASE_INSN_NOTBIT, I960BASE_SFMT_NOTBIT }, + { I960_INSN_NOTBIT1, I960BASE_INSN_NOTBIT1, I960BASE_SFMT_NOTBIT1 }, + { I960_INSN_NOTBIT2, I960BASE_INSN_NOTBIT2, I960BASE_SFMT_NOTBIT2 }, + { I960_INSN_NOTBIT3, I960BASE_INSN_NOTBIT3, I960BASE_SFMT_NOTBIT3 }, + { I960_INSN_AND, I960BASE_INSN_AND, I960BASE_SFMT_MULO }, + { I960_INSN_AND1, I960BASE_INSN_AND1, I960BASE_SFMT_MULO1 }, + { I960_INSN_AND2, I960BASE_INSN_AND2, I960BASE_SFMT_MULO2 }, + { I960_INSN_AND3, I960BASE_INSN_AND3, I960BASE_SFMT_MULO3 }, + { I960_INSN_ANDNOT, I960BASE_INSN_ANDNOT, I960BASE_SFMT_MULO }, + { I960_INSN_ANDNOT1, I960BASE_INSN_ANDNOT1, I960BASE_SFMT_MULO1 }, + { I960_INSN_ANDNOT2, I960BASE_INSN_ANDNOT2, I960BASE_SFMT_MULO2 }, + { I960_INSN_ANDNOT3, I960BASE_INSN_ANDNOT3, I960BASE_SFMT_MULO3 }, + { I960_INSN_SETBIT, I960BASE_INSN_SETBIT, I960BASE_SFMT_NOTBIT }, + { I960_INSN_SETBIT1, I960BASE_INSN_SETBIT1, I960BASE_SFMT_NOTBIT1 }, + { I960_INSN_SETBIT2, I960BASE_INSN_SETBIT2, I960BASE_SFMT_NOTBIT2 }, + { I960_INSN_SETBIT3, I960BASE_INSN_SETBIT3, I960BASE_SFMT_NOTBIT3 }, + { I960_INSN_NOTAND, I960BASE_INSN_NOTAND, I960BASE_SFMT_MULO }, + { I960_INSN_NOTAND1, I960BASE_INSN_NOTAND1, I960BASE_SFMT_MULO1 }, + { I960_INSN_NOTAND2, I960BASE_INSN_NOTAND2, I960BASE_SFMT_MULO2 }, + { I960_INSN_NOTAND3, I960BASE_INSN_NOTAND3, I960BASE_SFMT_MULO3 }, + { I960_INSN_XOR, I960BASE_INSN_XOR, I960BASE_SFMT_MULO }, + { I960_INSN_XOR1, I960BASE_INSN_XOR1, I960BASE_SFMT_MULO1 }, + { I960_INSN_XOR2, I960BASE_INSN_XOR2, I960BASE_SFMT_MULO2 }, + { I960_INSN_XOR3, I960BASE_INSN_XOR3, I960BASE_SFMT_MULO3 }, + { I960_INSN_OR, I960BASE_INSN_OR, I960BASE_SFMT_MULO }, + { I960_INSN_OR1, I960BASE_INSN_OR1, I960BASE_SFMT_MULO1 }, + { I960_INSN_OR2, I960BASE_INSN_OR2, I960BASE_SFMT_MULO2 }, + { I960_INSN_OR3, I960BASE_INSN_OR3, I960BASE_SFMT_MULO3 }, + { I960_INSN_NOR, I960BASE_INSN_NOR, I960BASE_SFMT_MULO }, + { I960_INSN_NOR1, I960BASE_INSN_NOR1, I960BASE_SFMT_MULO1 }, + { I960_INSN_NOR2, I960BASE_INSN_NOR2, I960BASE_SFMT_MULO2 }, + { I960_INSN_NOR3, I960BASE_INSN_NOR3, I960BASE_SFMT_MULO3 }, + { I960_INSN_XNOR, I960BASE_INSN_XNOR, I960BASE_SFMT_MULO }, + { I960_INSN_XNOR1, I960BASE_INSN_XNOR1, I960BASE_SFMT_MULO1 }, + { I960_INSN_XNOR2, I960BASE_INSN_XNOR2, I960BASE_SFMT_MULO2 }, + { I960_INSN_XNOR3, I960BASE_INSN_XNOR3, I960BASE_SFMT_MULO3 }, + { I960_INSN_NOT, I960BASE_INSN_NOT, I960BASE_SFMT_NOT }, + { I960_INSN_NOT1, I960BASE_INSN_NOT1, I960BASE_SFMT_NOT1 }, + { I960_INSN_NOT2, I960BASE_INSN_NOT2, I960BASE_SFMT_NOT }, + { I960_INSN_NOT3, I960BASE_INSN_NOT3, I960BASE_SFMT_NOT1 }, + { I960_INSN_ORNOT, I960BASE_INSN_ORNOT, I960BASE_SFMT_MULO }, + { I960_INSN_ORNOT1, I960BASE_INSN_ORNOT1, I960BASE_SFMT_MULO1 }, + { I960_INSN_ORNOT2, I960BASE_INSN_ORNOT2, I960BASE_SFMT_MULO2 }, + { I960_INSN_ORNOT3, I960BASE_INSN_ORNOT3, I960BASE_SFMT_MULO3 }, + { I960_INSN_CLRBIT, I960BASE_INSN_CLRBIT, I960BASE_SFMT_NOTBIT }, + { I960_INSN_CLRBIT1, I960BASE_INSN_CLRBIT1, I960BASE_SFMT_NOTBIT1 }, + { I960_INSN_CLRBIT2, I960BASE_INSN_CLRBIT2, I960BASE_SFMT_NOTBIT2 }, + { I960_INSN_CLRBIT3, I960BASE_INSN_CLRBIT3, I960BASE_SFMT_NOTBIT3 }, + { I960_INSN_SHLO, I960BASE_INSN_SHLO, I960BASE_SFMT_SHLO }, + { I960_INSN_SHLO1, I960BASE_INSN_SHLO1, I960BASE_SFMT_SHLO1 }, + { I960_INSN_SHLO2, I960BASE_INSN_SHLO2, I960BASE_SFMT_SHLO2 }, + { I960_INSN_SHLO3, I960BASE_INSN_SHLO3, I960BASE_SFMT_SHLO3 }, + { I960_INSN_SHRO, I960BASE_INSN_SHRO, I960BASE_SFMT_SHLO }, + { I960_INSN_SHRO1, I960BASE_INSN_SHRO1, I960BASE_SFMT_SHLO1 }, + { I960_INSN_SHRO2, I960BASE_INSN_SHRO2, I960BASE_SFMT_SHLO2 }, + { I960_INSN_SHRO3, I960BASE_INSN_SHRO3, I960BASE_SFMT_SHLO3 }, + { I960_INSN_SHLI, I960BASE_INSN_SHLI, I960BASE_SFMT_SHLO }, + { I960_INSN_SHLI1, I960BASE_INSN_SHLI1, I960BASE_SFMT_SHLO1 }, + { I960_INSN_SHLI2, I960BASE_INSN_SHLI2, I960BASE_SFMT_SHLO2 }, + { I960_INSN_SHLI3, I960BASE_INSN_SHLI3, I960BASE_SFMT_SHLO3 }, + { I960_INSN_SHRI, I960BASE_INSN_SHRI, I960BASE_SFMT_SHLO }, + { I960_INSN_SHRI1, I960BASE_INSN_SHRI1, I960BASE_SFMT_SHLO1 }, + { I960_INSN_SHRI2, I960BASE_INSN_SHRI2, I960BASE_SFMT_SHLO2 }, + { I960_INSN_SHRI3, I960BASE_INSN_SHRI3, I960BASE_SFMT_SHLO3 }, + { I960_INSN_EMUL, I960BASE_INSN_EMUL, I960BASE_SFMT_EMUL }, + { I960_INSN_EMUL1, I960BASE_INSN_EMUL1, I960BASE_SFMT_EMUL1 }, + { I960_INSN_EMUL2, I960BASE_INSN_EMUL2, I960BASE_SFMT_EMUL2 }, + { I960_INSN_EMUL3, I960BASE_INSN_EMUL3, I960BASE_SFMT_EMUL3 }, + { I960_INSN_MOV, I960BASE_INSN_MOV, I960BASE_SFMT_NOT }, + { I960_INSN_MOV1, I960BASE_INSN_MOV1, I960BASE_SFMT_NOT1 }, + { I960_INSN_MOVL, I960BASE_INSN_MOVL, I960BASE_SFMT_MOVL }, + { I960_INSN_MOVL1, I960BASE_INSN_MOVL1, I960BASE_SFMT_MOVL1 }, + { I960_INSN_MOVT, I960BASE_INSN_MOVT, I960BASE_SFMT_MOVT }, + { I960_INSN_MOVT1, I960BASE_INSN_MOVT1, I960BASE_SFMT_MOVT1 }, + { I960_INSN_MOVQ, I960BASE_INSN_MOVQ, I960BASE_SFMT_MOVQ }, + { I960_INSN_MOVQ1, I960BASE_INSN_MOVQ1, I960BASE_SFMT_MOVQ1 }, + { I960_INSN_MODPC, I960BASE_INSN_MODPC, I960BASE_SFMT_MODPC }, + { I960_INSN_MODAC, I960BASE_INSN_MODAC, I960BASE_SFMT_MODPC }, + { I960_INSN_LDA_OFFSET, I960BASE_INSN_LDA_OFFSET, I960BASE_SFMT_LDA_OFFSET }, + { I960_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET }, + { I960_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT }, + { I960_INSN_LDA_INDIRECT_INDEX, I960BASE_INSN_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_INDIRECT_INDEX }, + { I960_INSN_LDA_DISP, I960BASE_INSN_LDA_DISP, I960BASE_SFMT_LDA_DISP }, + { I960_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP }, + { I960_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDEX_DISP }, + { I960_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP }, + { I960_INSN_LD_OFFSET, I960BASE_INSN_LD_OFFSET, I960BASE_SFMT_LD_OFFSET }, + { I960_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, + { I960_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, + { I960_INSN_LD_INDIRECT_INDEX, I960BASE_INSN_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, + { I960_INSN_LD_DISP, I960BASE_INSN_LD_DISP, I960BASE_SFMT_LD_DISP }, + { I960_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, + { I960_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, + { I960_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, + { I960_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_OFFSET, I960BASE_SFMT_LD_OFFSET }, + { I960_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, + { I960_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, + { I960_INSN_LDOB_INDIRECT_INDEX, I960BASE_INSN_LDOB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, + { I960_INSN_LDOB_DISP, I960BASE_INSN_LDOB_DISP, I960BASE_SFMT_LD_DISP }, + { I960_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, + { I960_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, + { I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, + { I960_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_OFFSET, I960BASE_SFMT_LD_OFFSET }, + { I960_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, + { I960_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, + { I960_INSN_LDOS_INDIRECT_INDEX, I960BASE_INSN_LDOS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, + { I960_INSN_LDOS_DISP, I960BASE_INSN_LDOS_DISP, I960BASE_SFMT_LD_DISP }, + { I960_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, + { I960_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, + { I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, + { I960_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_OFFSET, I960BASE_SFMT_LD_OFFSET }, + { I960_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, + { I960_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, + { I960_INSN_LDIB_INDIRECT_INDEX, I960BASE_INSN_LDIB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, + { I960_INSN_LDIB_DISP, I960BASE_INSN_LDIB_DISP, I960BASE_SFMT_LD_DISP }, + { I960_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, + { I960_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, + { I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, + { I960_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_OFFSET, I960BASE_SFMT_LD_OFFSET }, + { I960_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, + { I960_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, + { I960_INSN_LDIS_INDIRECT_INDEX, I960BASE_INSN_LDIS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, + { I960_INSN_LDIS_DISP, I960BASE_INSN_LDIS_DISP, I960BASE_SFMT_LD_DISP }, + { I960_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, + { I960_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, + { I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, + { I960_INSN_LDL_OFFSET, I960BASE_INSN_LDL_OFFSET, I960BASE_SFMT_LDL_OFFSET }, + { I960_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET }, + { I960_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT }, + { I960_INSN_LDL_INDIRECT_INDEX, I960BASE_INSN_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_INDIRECT_INDEX }, + { I960_INSN_LDL_DISP, I960BASE_INSN_LDL_DISP, I960BASE_SFMT_LDL_DISP }, + { I960_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP }, + { I960_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDEX_DISP }, + { I960_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP }, + { I960_INSN_LDT_OFFSET, I960BASE_INSN_LDT_OFFSET, I960BASE_SFMT_LDT_OFFSET }, + { I960_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET }, + { I960_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT }, + { I960_INSN_LDT_INDIRECT_INDEX, I960BASE_INSN_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_INDIRECT_INDEX }, + { I960_INSN_LDT_DISP, I960BASE_INSN_LDT_DISP, I960BASE_SFMT_LDT_DISP }, + { I960_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP }, + { I960_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDEX_DISP }, + { I960_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP }, + { I960_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_OFFSET, I960BASE_SFMT_LDQ_OFFSET }, + { I960_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET }, + { I960_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT }, + { I960_INSN_LDQ_INDIRECT_INDEX, I960BASE_INSN_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_INDIRECT_INDEX }, + { I960_INSN_LDQ_DISP, I960BASE_INSN_LDQ_DISP, I960BASE_SFMT_LDQ_DISP }, + { I960_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP }, + { I960_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDEX_DISP }, + { I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP }, + { I960_INSN_ST_OFFSET, I960BASE_INSN_ST_OFFSET, I960BASE_SFMT_ST_OFFSET }, + { I960_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, + { I960_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, + { I960_INSN_ST_INDIRECT_INDEX, I960BASE_INSN_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, + { I960_INSN_ST_DISP, I960BASE_INSN_ST_DISP, I960BASE_SFMT_ST_DISP }, + { I960_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, + { I960_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, + { I960_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, + { I960_INSN_STOB_OFFSET, I960BASE_INSN_STOB_OFFSET, I960BASE_SFMT_ST_OFFSET }, + { I960_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, + { I960_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, + { I960_INSN_STOB_INDIRECT_INDEX, I960BASE_INSN_STOB_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, + { I960_INSN_STOB_DISP, I960BASE_INSN_STOB_DISP, I960BASE_SFMT_ST_DISP }, + { I960_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, + { I960_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, + { I960_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, + { I960_INSN_STOS_OFFSET, I960BASE_INSN_STOS_OFFSET, I960BASE_SFMT_ST_OFFSET }, + { I960_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, + { I960_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, + { I960_INSN_STOS_INDIRECT_INDEX, I960BASE_INSN_STOS_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, + { I960_INSN_STOS_DISP, I960BASE_INSN_STOS_DISP, I960BASE_SFMT_ST_DISP }, + { I960_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, + { I960_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, + { I960_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, + { I960_INSN_STL_OFFSET, I960BASE_INSN_STL_OFFSET, I960BASE_SFMT_STL_OFFSET }, + { I960_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET }, + { I960_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT }, + { I960_INSN_STL_INDIRECT_INDEX, I960BASE_INSN_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_INDIRECT_INDEX }, + { I960_INSN_STL_DISP, I960BASE_INSN_STL_DISP, I960BASE_SFMT_STL_DISP }, + { I960_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_SFMT_STL_INDIRECT_DISP }, + { I960_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_SFMT_STL_INDEX_DISP }, + { I960_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP }, + { I960_INSN_STT_OFFSET, I960BASE_INSN_STT_OFFSET, I960BASE_SFMT_STT_OFFSET }, + { I960_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET }, + { I960_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT }, + { I960_INSN_STT_INDIRECT_INDEX, I960BASE_INSN_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_INDIRECT_INDEX }, + { I960_INSN_STT_DISP, I960BASE_INSN_STT_DISP, I960BASE_SFMT_STT_DISP }, + { I960_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP }, + { I960_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_SFMT_STT_INDEX_DISP }, + { I960_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP }, + { I960_INSN_STQ_OFFSET, I960BASE_INSN_STQ_OFFSET, I960BASE_SFMT_STQ_OFFSET }, + { I960_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET }, + { I960_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT }, + { I960_INSN_STQ_INDIRECT_INDEX, I960BASE_INSN_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_INDIRECT_INDEX }, + { I960_INSN_STQ_DISP, I960BASE_INSN_STQ_DISP, I960BASE_SFMT_STQ_DISP }, + { I960_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP }, + { I960_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDEX_DISP }, + { I960_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP }, + { I960_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPOBNE_LIT, I960BASE_INSN_CMPOBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_REG, I960BASE_SFMT_CMPOBL_REG }, + { I960_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBL_LIT, I960BASE_SFMT_CMPOBL_LIT }, + { I960_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_REG, I960BASE_SFMT_CMPOBL_REG }, + { I960_INSN_CMPOBLE_LIT, I960BASE_INSN_CMPOBLE_LIT, I960BASE_SFMT_CMPOBL_LIT }, + { I960_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_REG, I960BASE_SFMT_CMPOBL_REG }, + { I960_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBG_LIT, I960BASE_SFMT_CMPOBL_LIT }, + { I960_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_REG, I960BASE_SFMT_CMPOBL_REG }, + { I960_INSN_CMPOBGE_LIT, I960BASE_INSN_CMPOBGE_LIT, I960BASE_SFMT_CMPOBL_LIT }, + { I960_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBNE_LIT, I960BASE_INSN_CMPIBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBL_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBLE_LIT, I960BASE_INSN_CMPIBLE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBG_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_REG, I960BASE_SFMT_CMPOBE_REG }, + { I960_INSN_CMPIBGE_LIT, I960BASE_INSN_CMPIBGE_LIT, I960BASE_SFMT_CMPOBE_LIT }, + { I960_INSN_BBC_REG, I960BASE_INSN_BBC_REG, I960BASE_SFMT_BBC_REG }, + { I960_INSN_BBC_LIT, I960BASE_INSN_BBC_LIT, I960BASE_SFMT_BBC_LIT }, + { I960_INSN_BBS_REG, I960BASE_INSN_BBS_REG, I960BASE_SFMT_BBC_REG }, + { I960_INSN_BBS_LIT, I960BASE_INSN_BBS_LIT, I960BASE_SFMT_BBC_LIT }, + { I960_INSN_CMPI, I960BASE_INSN_CMPI, I960BASE_SFMT_CMPI }, + { I960_INSN_CMPI1, I960BASE_INSN_CMPI1, I960BASE_SFMT_CMPI1 }, + { I960_INSN_CMPI2, I960BASE_INSN_CMPI2, I960BASE_SFMT_CMPI2 }, + { I960_INSN_CMPI3, I960BASE_INSN_CMPI3, I960BASE_SFMT_CMPI3 }, + { I960_INSN_CMPO, I960BASE_INSN_CMPO, I960BASE_SFMT_CMPO }, + { I960_INSN_CMPO1, I960BASE_INSN_CMPO1, I960BASE_SFMT_CMPO1 }, + { I960_INSN_CMPO2, I960BASE_INSN_CMPO2, I960BASE_SFMT_CMPO2 }, + { I960_INSN_CMPO3, I960BASE_INSN_CMPO3, I960BASE_SFMT_CMPO3 }, + { I960_INSN_TESTNO_REG, I960BASE_INSN_TESTNO_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTG_REG, I960BASE_INSN_TESTG_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTE_REG, I960BASE_INSN_TESTE_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTGE_REG, I960BASE_INSN_TESTGE_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTL_REG, I960BASE_INSN_TESTL_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTNE_REG, I960BASE_INSN_TESTNE_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTLE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_TESTO_REG, I960BASE_INSN_TESTO_REG, I960BASE_SFMT_TESTNO_REG }, + { I960_INSN_BNO, I960BASE_INSN_BNO, I960BASE_SFMT_BNO }, + { I960_INSN_BG, I960BASE_INSN_BG, I960BASE_SFMT_BNO }, + { I960_INSN_BE, I960BASE_INSN_BE, I960BASE_SFMT_BNO }, + { I960_INSN_BGE, I960BASE_INSN_BGE, I960BASE_SFMT_BNO }, + { I960_INSN_BL, I960BASE_INSN_BL, I960BASE_SFMT_BNO }, + { I960_INSN_BNE, I960BASE_INSN_BNE, I960BASE_SFMT_BNO }, + { I960_INSN_BLE, I960BASE_INSN_BLE, I960BASE_SFMT_BNO }, + { I960_INSN_BO, I960BASE_INSN_BO, I960BASE_SFMT_BNO }, + { I960_INSN_B, I960BASE_INSN_B, I960BASE_SFMT_B }, + { I960_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_SFMT_BX_INDIRECT_OFFSET }, + { I960_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT }, + { I960_INSN_BX_INDIRECT_INDEX, I960BASE_INSN_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_INDIRECT_INDEX }, + { I960_INSN_BX_DISP, I960BASE_INSN_BX_DISP, I960BASE_SFMT_BX_DISP }, + { I960_INSN_BX_INDIRECT_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_SFMT_BX_INDIRECT_DISP }, + { I960_INSN_CALLX_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_SFMT_CALLX_DISP }, + { I960_INSN_CALLX_INDIRECT, I960BASE_INSN_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT }, + { I960_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_CALLX_INDIRECT_OFFSET }, + { I960_INSN_RET, I960BASE_INSN_RET, I960BASE_SFMT_RET }, + { I960_INSN_CALLS, I960BASE_INSN_CALLS, I960BASE_SFMT_CALLS }, + { I960_INSN_FMARK, I960BASE_INSN_FMARK, I960BASE_SFMT_FMARK }, + { I960_INSN_FLUSHREG, I960BASE_INSN_FLUSHREG, I960BASE_SFMT_FLUSHREG }, }; -static const struct insn_sem i960base_insn_sem_invalid = -{ - VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) +static const struct insn_sem i960base_insn_sem_invalid = { + VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY }; -#undef FMT -#undef FULL -#undef FAST -#undef IDX -#undef TYPE - /* Initialize an IDESC from the compile-time computable parts. */ static INLINE void @@ -381,6 +351,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; id->num = t->index; + id->sfmt = t->sfmt; if ((int) t->type <= 0) id->idata = & cgen_virtual_insn_table[- (int) t->type]; else @@ -388,12 +359,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) id->attrs = CGEN_INSN_ATTRS (id->idata); /* Oh my god, a magic number. */ id->length = CGEN_INSN_BITSIZE (id->idata) / 8; -#if ! WITH_SEM_SWITCH_FULL - id->sem_full = t->sem_full; -#endif -#if WITH_FAST && ! WITH_SEM_SWITCH_FAST - id->sem_fast = t->sem_fast; -#endif + #if WITH_PROFILE_MODEL_P id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; { @@ -401,6 +367,8 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) SIM_ASSERT (t->index == id->timing->num); } #endif + + /* Semantic pointers are initialized elsewhere. */ } /* Initialize the instruction descriptor table. */ @@ -448,32 +416,32 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 24) & (255 << 0))); switch (val) { - case 8 : itype = I960BASE_INSN_B; goto extract_fmt_b; - case 10 : itype = I960BASE_INSN_RET; goto extract_fmt_ret; - case 16 : itype = I960BASE_INSN_BNO; goto extract_fmt_bno; - case 17 : itype = I960BASE_INSN_BG; goto extract_fmt_bno; - case 18 : itype = I960BASE_INSN_BE; goto extract_fmt_bno; - case 19 : itype = I960BASE_INSN_BGE; goto extract_fmt_bno; - case 20 : itype = I960BASE_INSN_BL; goto extract_fmt_bno; - case 21 : itype = I960BASE_INSN_BNE; goto extract_fmt_bno; - case 22 : itype = I960BASE_INSN_BLE; goto extract_fmt_bno; - case 23 : itype = I960BASE_INSN_BO; goto extract_fmt_bno; - case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_fmt_testno_reg; - case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_fmt_testno_reg; - case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_fmt_testno_reg; - case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_fmt_testno_reg; - case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_fmt_testno_reg; - case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_fmt_testno_reg; - case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_fmt_testno_reg; - case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_fmt_testno_reg; + case 8 : itype = I960BASE_INSN_B; goto extract_sfmt_b; + case 10 : itype = I960BASE_INSN_RET; goto extract_sfmt_ret; + case 16 : itype = I960BASE_INSN_BNO; goto extract_sfmt_bno; + case 17 : itype = I960BASE_INSN_BG; goto extract_sfmt_bno; + case 18 : itype = I960BASE_INSN_BE; goto extract_sfmt_bno; + case 19 : itype = I960BASE_INSN_BGE; goto extract_sfmt_bno; + case 20 : itype = I960BASE_INSN_BL; goto extract_sfmt_bno; + case 21 : itype = I960BASE_INSN_BNE; goto extract_sfmt_bno; + case 22 : itype = I960BASE_INSN_BLE; goto extract_sfmt_bno; + case 23 : itype = I960BASE_INSN_BO; goto extract_sfmt_bno; + case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_sfmt_testno_reg; + case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_sfmt_testno_reg; + case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_sfmt_testno_reg; + case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_sfmt_testno_reg; + case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_sfmt_testno_reg; + case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_sfmt_testno_reg; + case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_sfmt_testno_reg; + case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_sfmt_testno_reg; case 48 : { unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_fmt_bbc_reg; - case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_fmt_bbc_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_sfmt_bbc_reg; + case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_sfmt_bbc_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 49 : @@ -481,9 +449,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_fmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_fmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_sfmt_cmpobl_reg; + case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_sfmt_cmpobl_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 50 : @@ -491,9 +459,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 51 : @@ -501,9 +469,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_fmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_fmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_sfmt_cmpobl_reg; + case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_sfmt_cmpobl_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 52 : @@ -511,9 +479,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_fmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_fmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_sfmt_cmpobl_reg; + case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_sfmt_cmpobl_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 53 : @@ -521,9 +489,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 54 : @@ -531,9 +499,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_fmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_fmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_sfmt_cmpobl_reg; + case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_sfmt_cmpobl_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 55 : @@ -541,9 +509,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_fmt_bbc_reg; - case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_fmt_bbc_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_sfmt_bbc_reg; + case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_sfmt_bbc_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 57 : @@ -551,9 +519,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 58 : @@ -561,9 +529,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 59 : @@ -571,9 +539,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 60 : @@ -581,9 +549,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 61 : @@ -591,9 +559,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 62 : @@ -601,9 +569,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_fmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_fmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_sfmt_cmpobe_reg; + case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_sfmt_cmpobe_lit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 88 : @@ -616,14 +584,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_fmt_notbit; - case 2 : itype = I960BASE_INSN_AND; goto extract_fmt_mulo; - case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_fmt_mulo; - case 6 : itype = I960BASE_INSN_SETBIT; goto extract_fmt_notbit; - case 8 : itype = I960BASE_INSN_NOTAND; goto extract_fmt_mulo; - case 12 : itype = I960BASE_INSN_XOR; goto extract_fmt_mulo; - case 14 : itype = I960BASE_INSN_OR; goto extract_fmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_sfmt_notbit; + case 2 : itype = I960BASE_INSN_AND; goto extract_sfmt_mulo; + case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_sfmt_mulo; + case 6 : itype = I960BASE_INSN_SETBIT; goto extract_sfmt_notbit; + case 8 : itype = I960BASE_INSN_NOTAND; goto extract_sfmt_mulo; + case 12 : itype = I960BASE_INSN_XOR; goto extract_sfmt_mulo; + case 14 : itype = I960BASE_INSN_OR; goto extract_sfmt_mulo; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 1 : @@ -631,12 +599,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOR; goto extract_fmt_mulo; - case 2 : itype = I960BASE_INSN_XNOR; goto extract_fmt_mulo; - case 4 : itype = I960BASE_INSN_NOT; goto extract_fmt_not; - case 6 : itype = I960BASE_INSN_ORNOT; goto extract_fmt_mulo; - case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_fmt_notbit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOR; goto extract_sfmt_mulo; + case 2 : itype = I960BASE_INSN_XNOR; goto extract_sfmt_mulo; + case 4 : itype = I960BASE_INSN_NOT; goto extract_sfmt_not; + case 6 : itype = I960BASE_INSN_ORNOT; goto extract_sfmt_mulo; + case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_sfmt_notbit; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 2 : @@ -644,14 +612,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_fmt_notbit1; - case 2 : itype = I960BASE_INSN_AND1; goto extract_fmt_mulo1; - case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_fmt_mulo1; - case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_fmt_notbit1; - case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_fmt_mulo1; - case 12 : itype = I960BASE_INSN_XOR1; goto extract_fmt_mulo1; - case 14 : itype = I960BASE_INSN_OR1; goto extract_fmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_sfmt_notbit1; + case 2 : itype = I960BASE_INSN_AND1; goto extract_sfmt_mulo1; + case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_sfmt_mulo1; + case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_sfmt_notbit1; + case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_sfmt_mulo1; + case 12 : itype = I960BASE_INSN_XOR1; goto extract_sfmt_mulo1; + case 14 : itype = I960BASE_INSN_OR1; goto extract_sfmt_mulo1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 3 : @@ -659,12 +627,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOR1; goto extract_fmt_mulo1; - case 2 : itype = I960BASE_INSN_XNOR1; goto extract_fmt_mulo1; - case 4 : itype = I960BASE_INSN_NOT1; goto extract_fmt_not1; - case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_fmt_mulo1; - case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_fmt_notbit1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOR1; goto extract_sfmt_mulo1; + case 2 : itype = I960BASE_INSN_XNOR1; goto extract_sfmt_mulo1; + case 4 : itype = I960BASE_INSN_NOT1; goto extract_sfmt_not1; + case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_sfmt_mulo1; + case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_sfmt_notbit1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 4 : @@ -672,14 +640,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_fmt_notbit2; - case 2 : itype = I960BASE_INSN_AND2; goto extract_fmt_mulo2; - case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_fmt_mulo2; - case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_fmt_notbit2; - case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_fmt_mulo2; - case 12 : itype = I960BASE_INSN_XOR2; goto extract_fmt_mulo2; - case 14 : itype = I960BASE_INSN_OR2; goto extract_fmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_sfmt_notbit2; + case 2 : itype = I960BASE_INSN_AND2; goto extract_sfmt_mulo2; + case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_sfmt_mulo2; + case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_sfmt_notbit2; + case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_sfmt_mulo2; + case 12 : itype = I960BASE_INSN_XOR2; goto extract_sfmt_mulo2; + case 14 : itype = I960BASE_INSN_OR2; goto extract_sfmt_mulo2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 5 : @@ -687,12 +655,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOR2; goto extract_fmt_mulo2; - case 2 : itype = I960BASE_INSN_XNOR2; goto extract_fmt_mulo2; - case 4 : itype = I960BASE_INSN_NOT2; goto extract_fmt_not2; - case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_fmt_mulo2; - case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_fmt_notbit2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOR2; goto extract_sfmt_mulo2; + case 2 : itype = I960BASE_INSN_XNOR2; goto extract_sfmt_mulo2; + case 4 : itype = I960BASE_INSN_NOT2; goto extract_sfmt_not; + case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_sfmt_mulo2; + case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_sfmt_notbit2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 6 : @@ -700,14 +668,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_fmt_notbit3; - case 2 : itype = I960BASE_INSN_AND3; goto extract_fmt_mulo3; - case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_fmt_mulo3; - case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_fmt_notbit3; - case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_fmt_mulo3; - case 12 : itype = I960BASE_INSN_XOR3; goto extract_fmt_mulo3; - case 14 : itype = I960BASE_INSN_OR3; goto extract_fmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_sfmt_notbit3; + case 2 : itype = I960BASE_INSN_AND3; goto extract_sfmt_mulo3; + case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_sfmt_mulo3; + case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_sfmt_notbit3; + case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_sfmt_mulo3; + case 12 : itype = I960BASE_INSN_XOR3; goto extract_sfmt_mulo3; + case 14 : itype = I960BASE_INSN_OR3; goto extract_sfmt_mulo3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 7 : @@ -715,15 +683,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_NOR3; goto extract_fmt_mulo3; - case 2 : itype = I960BASE_INSN_XNOR3; goto extract_fmt_mulo3; - case 4 : itype = I960BASE_INSN_NOT3; goto extract_fmt_not3; - case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_fmt_mulo3; - case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_fmt_notbit3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_NOR3; goto extract_sfmt_mulo3; + case 2 : itype = I960BASE_INSN_XNOR3; goto extract_sfmt_mulo3; + case 4 : itype = I960BASE_INSN_NOT3; goto extract_sfmt_not1; + case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_sfmt_mulo3; + case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_sfmt_notbit3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 89 : @@ -736,9 +704,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_ADDO; goto extract_fmt_mulo; - case 4 : itype = I960BASE_INSN_SUBO; goto extract_fmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_ADDO; goto extract_sfmt_mulo; + case 4 : itype = I960BASE_INSN_SUBO; goto extract_sfmt_mulo; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 1 : @@ -746,11 +714,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_SHRO; goto extract_fmt_shlo; - case 6 : itype = I960BASE_INSN_SHRI; goto extract_fmt_shlo; - case 8 : itype = I960BASE_INSN_SHLO; goto extract_fmt_shlo; - case 12 : itype = I960BASE_INSN_SHLI; goto extract_fmt_shlo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_SHRO; goto extract_sfmt_shlo; + case 6 : itype = I960BASE_INSN_SHRI; goto extract_sfmt_shlo; + case 8 : itype = I960BASE_INSN_SHLO; goto extract_sfmt_shlo; + case 12 : itype = I960BASE_INSN_SHLI; goto extract_sfmt_shlo; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 2 : @@ -758,9 +726,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_ADDO1; goto extract_fmt_mulo1; - case 4 : itype = I960BASE_INSN_SUBO1; goto extract_fmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_ADDO1; goto extract_sfmt_mulo1; + case 4 : itype = I960BASE_INSN_SUBO1; goto extract_sfmt_mulo1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 3 : @@ -768,11 +736,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_SHRO1; goto extract_fmt_shlo1; - case 6 : itype = I960BASE_INSN_SHRI1; goto extract_fmt_shlo1; - case 8 : itype = I960BASE_INSN_SHLO1; goto extract_fmt_shlo1; - case 12 : itype = I960BASE_INSN_SHLI1; goto extract_fmt_shlo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_SHRO1; goto extract_sfmt_shlo1; + case 6 : itype = I960BASE_INSN_SHRI1; goto extract_sfmt_shlo1; + case 8 : itype = I960BASE_INSN_SHLO1; goto extract_sfmt_shlo1; + case 12 : itype = I960BASE_INSN_SHLI1; goto extract_sfmt_shlo1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 4 : @@ -780,9 +748,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_ADDO2; goto extract_fmt_mulo2; - case 4 : itype = I960BASE_INSN_SUBO2; goto extract_fmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_ADDO2; goto extract_sfmt_mulo2; + case 4 : itype = I960BASE_INSN_SUBO2; goto extract_sfmt_mulo2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 5 : @@ -790,11 +758,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_SHRO2; goto extract_fmt_shlo2; - case 6 : itype = I960BASE_INSN_SHRI2; goto extract_fmt_shlo2; - case 8 : itype = I960BASE_INSN_SHLO2; goto extract_fmt_shlo2; - case 12 : itype = I960BASE_INSN_SHLI2; goto extract_fmt_shlo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_SHRO2; goto extract_sfmt_shlo2; + case 6 : itype = I960BASE_INSN_SHRI2; goto extract_sfmt_shlo2; + case 8 : itype = I960BASE_INSN_SHLO2; goto extract_sfmt_shlo2; + case 12 : itype = I960BASE_INSN_SHLI2; goto extract_sfmt_shlo2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 6 : @@ -802,9 +770,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_ADDO3; goto extract_fmt_mulo3; - case 4 : itype = I960BASE_INSN_SUBO3; goto extract_fmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_ADDO3; goto extract_sfmt_mulo3; + case 4 : itype = I960BASE_INSN_SUBO3; goto extract_sfmt_mulo3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 7 : @@ -812,14 +780,14 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_SHRO3; goto extract_fmt_shlo3; - case 6 : itype = I960BASE_INSN_SHRI3; goto extract_fmt_shlo3; - case 8 : itype = I960BASE_INSN_SHLO3; goto extract_fmt_shlo3; - case 12 : itype = I960BASE_INSN_SHLI3; goto extract_fmt_shlo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_SHRO3; goto extract_sfmt_shlo3; + case 6 : itype = I960BASE_INSN_SHRI3; goto extract_sfmt_shlo3; + case 8 : itype = I960BASE_INSN_SHLO3; goto extract_sfmt_shlo3; + case 12 : itype = I960BASE_INSN_SHLI3; goto extract_sfmt_shlo3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 90 : @@ -832,9 +800,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPO; goto extract_fmt_cmpo; - case 2 : itype = I960BASE_INSN_CMPI; goto extract_fmt_cmpi; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPO; goto extract_sfmt_cmpo; + case 2 : itype = I960BASE_INSN_CMPI; goto extract_sfmt_cmpi; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 10 : @@ -842,9 +810,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPO1; goto extract_fmt_cmpo1; - case 2 : itype = I960BASE_INSN_CMPI1; goto extract_fmt_cmpi1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPO1; goto extract_sfmt_cmpo1; + case 2 : itype = I960BASE_INSN_CMPI1; goto extract_sfmt_cmpi1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 12 : @@ -852,9 +820,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPO2; goto extract_fmt_cmpo2; - case 2 : itype = I960BASE_INSN_CMPI2; goto extract_fmt_cmpi2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPO2; goto extract_sfmt_cmpo2; + case 2 : itype = I960BASE_INSN_CMPI2; goto extract_sfmt_cmpi2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 14 : @@ -862,12 +830,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_CMPO3; goto extract_fmt_cmpo3; - case 2 : itype = I960BASE_INSN_CMPI3; goto extract_fmt_cmpi3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_CMPO3; goto extract_sfmt_cmpo3; + case 2 : itype = I960BASE_INSN_CMPI3; goto extract_sfmt_cmpi3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 92 : @@ -875,9 +843,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 5 : itype = I960BASE_INSN_MOV; goto extract_fmt_not2; - case 7 : itype = I960BASE_INSN_MOV1; goto extract_fmt_not3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 5 : itype = I960BASE_INSN_MOV; goto extract_sfmt_not; + case 7 : itype = I960BASE_INSN_MOV1; goto extract_sfmt_not1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 93 : @@ -885,9 +853,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 5 : itype = I960BASE_INSN_MOVL; goto extract_fmt_movl; - case 7 : itype = I960BASE_INSN_MOVL1; goto extract_fmt_movl1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 5 : itype = I960BASE_INSN_MOVL; goto extract_sfmt_movl; + case 7 : itype = I960BASE_INSN_MOVL1; goto extract_sfmt_movl1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 94 : @@ -895,9 +863,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 5 : itype = I960BASE_INSN_MOVT; goto extract_fmt_movt; - case 7 : itype = I960BASE_INSN_MOVT1; goto extract_fmt_movt1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 5 : itype = I960BASE_INSN_MOVT; goto extract_sfmt_movt; + case 7 : itype = I960BASE_INSN_MOVT1; goto extract_sfmt_movt1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 95 : @@ -905,30 +873,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 5 : itype = I960BASE_INSN_MOVQ; goto extract_fmt_movq; - case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_fmt_movq1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 5 : itype = I960BASE_INSN_MOVQ; goto extract_sfmt_movq; + case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_sfmt_movq1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 100 : itype = I960BASE_INSN_MODAC; goto extract_fmt_modpc; - case 101 : itype = I960BASE_INSN_MODPC; goto extract_fmt_modpc; + case 100 : itype = I960BASE_INSN_MODAC; goto extract_sfmt_modpc; + case 101 : itype = I960BASE_INSN_MODPC; goto extract_sfmt_modpc; case 102 : { unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 12 : itype = I960BASE_INSN_CALLS; goto extract_fmt_calls; + case 12 : itype = I960BASE_INSN_CALLS; goto extract_sfmt_calls; case 15 : { unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 8 : itype = I960BASE_INSN_FMARK; goto extract_fmt_fmark; - case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_fmt_flushreg; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 8 : itype = I960BASE_INSN_FMARK; goto extract_sfmt_fmark; + case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_sfmt_flushreg; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 103 : @@ -936,11 +904,11 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_EMUL; goto extract_fmt_emul; - case 2 : itype = I960BASE_INSN_EMUL1; goto extract_fmt_emul1; - case 4 : itype = I960BASE_INSN_EMUL2; goto extract_fmt_emul2; - case 6 : itype = I960BASE_INSN_EMUL3; goto extract_fmt_emul3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_EMUL; goto extract_sfmt_emul; + case 2 : itype = I960BASE_INSN_EMUL1; goto extract_sfmt_emul1; + case 4 : itype = I960BASE_INSN_EMUL2; goto extract_sfmt_emul2; + case 6 : itype = I960BASE_INSN_EMUL3; goto extract_sfmt_emul3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 112 : @@ -948,51 +916,51 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_MULO; goto extract_fmt_mulo; + case 0 : itype = I960BASE_INSN_MULO; goto extract_sfmt_mulo; case 1 : { unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMO; goto extract_fmt_mulo; - case 6 : itype = I960BASE_INSN_DIVO; goto extract_fmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMO; goto extract_sfmt_mulo; + case 6 : itype = I960BASE_INSN_DIVO; goto extract_sfmt_mulo; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 2 : itype = I960BASE_INSN_MULO1; goto extract_fmt_mulo1; + case 2 : itype = I960BASE_INSN_MULO1; goto extract_sfmt_mulo1; case 3 : { unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMO1; goto extract_fmt_mulo1; - case 6 : itype = I960BASE_INSN_DIVO1; goto extract_fmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMO1; goto extract_sfmt_mulo1; + case 6 : itype = I960BASE_INSN_DIVO1; goto extract_sfmt_mulo1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 4 : itype = I960BASE_INSN_MULO2; goto extract_fmt_mulo2; + case 4 : itype = I960BASE_INSN_MULO2; goto extract_sfmt_mulo2; case 5 : { unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMO2; goto extract_fmt_mulo2; - case 6 : itype = I960BASE_INSN_DIVO2; goto extract_fmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMO2; goto extract_sfmt_mulo2; + case 6 : itype = I960BASE_INSN_DIVO2; goto extract_sfmt_mulo2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 6 : itype = I960BASE_INSN_MULO3; goto extract_fmt_mulo3; + case 6 : itype = I960BASE_INSN_MULO3; goto extract_sfmt_mulo3; case 7 : { unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMO3; goto extract_fmt_mulo3; - case 6 : itype = I960BASE_INSN_DIVO3; goto extract_fmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMO3; goto extract_sfmt_mulo3; + case 6 : itype = I960BASE_INSN_DIVO3; goto extract_sfmt_mulo3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 116 : @@ -1005,9 +973,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMI; goto extract_fmt_mulo; - case 6 : itype = I960BASE_INSN_DIVI; goto extract_fmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMI; goto extract_sfmt_mulo; + case 6 : itype = I960BASE_INSN_DIVI; goto extract_sfmt_mulo; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 3 : @@ -1015,9 +983,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMI1; goto extract_fmt_mulo1; - case 6 : itype = I960BASE_INSN_DIVI1; goto extract_fmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMI1; goto extract_sfmt_mulo1; + case 6 : itype = I960BASE_INSN_DIVI1; goto extract_sfmt_mulo1; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 5 : @@ -1025,9 +993,9 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMI2; goto extract_fmt_mulo2; - case 6 : itype = I960BASE_INSN_DIVI2; goto extract_fmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMI2; goto extract_sfmt_mulo2; + case 6 : itype = I960BASE_INSN_DIVI2; goto extract_sfmt_mulo2; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 7 : @@ -1035,12 +1003,12 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = I960BASE_INSN_REMI3; goto extract_fmt_mulo3; - case 6 : itype = I960BASE_INSN_DIVI3; goto extract_fmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = I960BASE_INSN_REMI3; goto extract_sfmt_mulo3; + case 6 : itype = I960BASE_INSN_DIVI3; goto extract_sfmt_mulo3; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 128 : @@ -1051,18 +1019,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_fmt_ldob_offset; - case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_fmt_ldob_indirect; - case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_fmt_ldob_indirect_index; + case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_sfmt_ld_offset; + case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_sfmt_ld_indirect; + case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_fmt_ldob_indirect_offset; - case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_fmt_ldob_disp; - case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_fmt_ldob_indirect_disp; - case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_fmt_ldob_index_disp; - case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_fmt_ldob_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; + case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_sfmt_ld_disp; + case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; + case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_sfmt_ld_index_disp; + case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 130 : @@ -1073,18 +1041,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_fmt_stob_offset; - case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_fmt_stob_indirect; - case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_fmt_stob_indirect_index; + case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_sfmt_st_offset; + case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_sfmt_st_indirect; + case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_fmt_stob_indirect_offset; - case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_fmt_stob_disp; - case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_fmt_stob_indirect_disp; - case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_fmt_stob_index_disp; - case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_fmt_stob_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; + case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_sfmt_st_disp; + case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; + case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_sfmt_st_index_disp; + case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 132 : @@ -1092,15 +1060,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_fmt_bx_indirect; - case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_fmt_bx_indirect_index; + case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_sfmt_bx_indirect; + case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_sfmt_bx_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_fmt_bx_indirect_offset; - case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_fmt_bx_disp; - case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_fmt_bx_indirect_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_sfmt_bx_indirect_offset; + case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_sfmt_bx_disp; + case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_sfmt_bx_indirect_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 134 : @@ -1108,13 +1076,13 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (15 << 0))); switch (val) { - case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_fmt_callx_indirect; + case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_sfmt_callx_indirect; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_fmt_callx_indirect_offset; - case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_fmt_callx_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_sfmt_callx_indirect_offset; + case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_sfmt_callx_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 136 : @@ -1125,18 +1093,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_fmt_ldos_offset; - case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_fmt_ldos_indirect; - case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_fmt_ldos_indirect_index; + case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_sfmt_ld_offset; + case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_sfmt_ld_indirect; + case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_fmt_ldos_indirect_offset; - case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_fmt_ldos_disp; - case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_fmt_ldos_indirect_disp; - case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_fmt_ldos_index_disp; - case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_fmt_ldos_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; + case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_sfmt_ld_disp; + case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; + case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_sfmt_ld_index_disp; + case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 138 : @@ -1147,18 +1115,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_fmt_stos_offset; - case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_fmt_stos_indirect; - case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_fmt_stos_indirect_index; + case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_sfmt_st_offset; + case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_sfmt_st_indirect; + case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_fmt_stos_indirect_offset; - case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_fmt_stos_disp; - case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_fmt_stos_indirect_disp; - case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_fmt_stos_index_disp; - case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_fmt_stos_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; + case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_sfmt_st_disp; + case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; + case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_sfmt_st_index_disp; + case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 140 : @@ -1169,18 +1137,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_fmt_lda_offset; - case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_fmt_lda_indirect; - case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_fmt_lda_indirect_index; + case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_sfmt_lda_offset; + case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_sfmt_lda_indirect; + case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_sfmt_lda_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_fmt_lda_indirect_offset; - case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_fmt_lda_disp; - case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_fmt_lda_indirect_disp; - case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_fmt_lda_index_disp; - case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_fmt_lda_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_sfmt_lda_indirect_offset; + case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_sfmt_lda_disp; + case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_sfmt_lda_indirect_disp; + case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_sfmt_lda_index_disp; + case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_sfmt_lda_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 144 : @@ -1191,18 +1159,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_fmt_ld_offset; - case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_fmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_fmt_ld_indirect_index; + case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_sfmt_ld_offset; + case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_sfmt_ld_indirect; + case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_fmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_fmt_ld_disp; - case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_fmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_fmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_fmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; + case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_sfmt_ld_disp; + case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; + case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_sfmt_ld_index_disp; + case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 146 : @@ -1213,18 +1181,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_fmt_st_offset; - case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_fmt_st_indirect; - case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_fmt_st_indirect_index; + case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_sfmt_st_offset; + case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_sfmt_st_indirect; + case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_fmt_st_indirect_offset; - case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_fmt_st_disp; - case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_fmt_st_indirect_disp; - case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_fmt_st_index_disp; - case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_fmt_st_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; + case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_sfmt_st_disp; + case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; + case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_sfmt_st_index_disp; + case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 152 : @@ -1235,18 +1203,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_fmt_ldl_offset; - case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_fmt_ldl_indirect; - case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_fmt_ldl_indirect_index; + case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_sfmt_ldl_offset; + case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_sfmt_ldl_indirect; + case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_sfmt_ldl_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_fmt_ldl_indirect_offset; - case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_fmt_ldl_disp; - case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_fmt_ldl_indirect_disp; - case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_fmt_ldl_index_disp; - case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_fmt_ldl_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_sfmt_ldl_indirect_offset; + case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_sfmt_ldl_disp; + case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_sfmt_ldl_indirect_disp; + case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_sfmt_ldl_index_disp; + case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_sfmt_ldl_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 154 : @@ -1257,18 +1225,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_fmt_stl_offset; - case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_fmt_stl_indirect; - case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_fmt_stl_indirect_index; + case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_sfmt_stl_offset; + case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_sfmt_stl_indirect; + case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_sfmt_stl_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_fmt_stl_indirect_offset; - case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_fmt_stl_disp; - case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_fmt_stl_indirect_disp; - case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_fmt_stl_index_disp; - case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_fmt_stl_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_sfmt_stl_indirect_offset; + case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_sfmt_stl_disp; + case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_sfmt_stl_indirect_disp; + case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_sfmt_stl_index_disp; + case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_sfmt_stl_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 160 : @@ -1279,18 +1247,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_fmt_ldt_offset; - case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_fmt_ldt_indirect; - case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_fmt_ldt_indirect_index; + case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_sfmt_ldt_offset; + case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_sfmt_ldt_indirect; + case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_sfmt_ldt_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_fmt_ldt_indirect_offset; - case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_fmt_ldt_disp; - case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_fmt_ldt_indirect_disp; - case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_fmt_ldt_index_disp; - case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_fmt_ldt_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_sfmt_ldt_indirect_offset; + case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_sfmt_ldt_disp; + case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_sfmt_ldt_indirect_disp; + case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_sfmt_ldt_index_disp; + case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_sfmt_ldt_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 162 : @@ -1301,18 +1269,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_fmt_stt_offset; - case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_fmt_stt_indirect; - case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_fmt_stt_indirect_index; + case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_sfmt_stt_offset; + case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_sfmt_stt_indirect; + case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_sfmt_stt_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_fmt_stt_indirect_offset; - case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_fmt_stt_disp; - case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_fmt_stt_indirect_disp; - case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_fmt_stt_index_disp; - case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_fmt_stt_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_sfmt_stt_indirect_offset; + case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_sfmt_stt_disp; + case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_sfmt_stt_indirect_disp; + case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_sfmt_stt_index_disp; + case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_sfmt_stt_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 176 : @@ -1323,18 +1291,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_fmt_ldq_offset; - case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_fmt_ldq_indirect; - case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_fmt_ldq_indirect_index; + case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_sfmt_ldq_offset; + case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_sfmt_ldq_indirect; + case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_sfmt_ldq_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_fmt_ldq_indirect_offset; - case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_fmt_ldq_disp; - case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_fmt_ldq_indirect_disp; - case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_fmt_ldq_index_disp; - case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_fmt_ldq_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_sfmt_ldq_indirect_offset; + case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_sfmt_ldq_disp; + case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_sfmt_ldq_indirect_disp; + case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_sfmt_ldq_index_disp; + case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_sfmt_ldq_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 178 : @@ -1345,18 +1313,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_fmt_stq_offset; - case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_fmt_stq_indirect; - case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_fmt_stq_indirect_index; + case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_sfmt_stq_offset; + case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_sfmt_stq_indirect; + case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_sfmt_stq_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_fmt_stq_indirect_offset; - case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_fmt_stq_disp; - case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_fmt_stq_indirect_disp; - case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_fmt_stq_index_disp; - case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_fmt_stq_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_sfmt_stq_indirect_offset; + case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_sfmt_stq_disp; + case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_sfmt_stq_indirect_disp; + case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_sfmt_stq_index_disp; + case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_sfmt_stq_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 192 : @@ -1367,18 +1335,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_fmt_ldib_offset; - case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_fmt_ldib_indirect; - case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_fmt_ldib_indirect_index; + case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_sfmt_ld_offset; + case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_sfmt_ld_indirect; + case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_fmt_ldib_indirect_offset; - case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_fmt_ldib_disp; - case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_fmt_ldib_indirect_disp; - case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_fmt_ldib_index_disp; - case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_fmt_ldib_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; + case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_sfmt_ld_disp; + case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; + case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_sfmt_ld_index_disp; + case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } case 200 : @@ -1389,57 +1357,59 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, case 0 : /* fall through */ case 1 : /* fall through */ case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_fmt_ldis_offset; - case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_fmt_ldis_indirect; - case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_fmt_ldis_indirect_index; + case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_sfmt_ld_offset; + case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_sfmt_ld_indirect; + case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; case 8 : /* fall through */ case 9 : /* fall through */ case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_fmt_ldis_indirect_offset; - case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_fmt_ldis_disp; - case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_fmt_ldis_indirect_disp; - case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_fmt_ldis_index_disp; - case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_fmt_ldis_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; + case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_sfmt_ld_disp; + case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; + case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_sfmt_ld_index_disp; + case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; } } } /* The instruction has been decoded, now extract the fields. */ - extract_fmt_empty: + extract_sfmt_empty: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; #define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_EMPTY_VARS /* */ - EXTRACT_IFMT_EMPTY_CODE /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; } - extract_fmt_mulo: + extract_sfmt_mulo: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulo.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1454,20 +1424,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulo1: + extract_sfmt_mulo1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulo1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1481,20 +1455,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulo2: + extract_sfmt_mulo2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulo2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1508,20 +1486,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulo3: + extract_sfmt_mulo3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_mulo3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1534,20 +1516,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_notbit: + extract_sfmt_notbit: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_notbit.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1562,20 +1548,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_notbit1: + extract_sfmt_notbit1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_notbit1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1589,20 +1579,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_notbit2: + extract_sfmt_notbit2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_notbit2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1616,71 +1610,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_notbit3: + extract_sfmt_notbit3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_notbit3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_not: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_not.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ - - EXTRACT_IFMT_MULO_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_not1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_not1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ - - EXTRACT_IFMT_MULO1_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1693,19 +1640,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_not2: + extract_sfmt_not: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_not2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not2", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1719,19 +1668,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_not3: + extract_sfmt_not1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_not3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not3", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1744,20 +1695,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_shlo: + extract_sfmt_shlo: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_shlo.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1772,20 +1727,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_shlo1: + extract_sfmt_shlo1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_shlo1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1799,20 +1758,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_shlo2: + extract_sfmt_shlo2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_shlo2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1826,20 +1789,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_shlo3: + extract_sfmt_shlo3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_shlo3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1852,21 +1819,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_emul: + extract_sfmt_emul: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_emul.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1882,21 +1853,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_emul1: + extract_sfmt_emul1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_emul1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1911,21 +1886,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_emul2: + extract_sfmt_emul2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_emul2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1940,21 +1919,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_emul3: + extract_sfmt_emul3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_emul3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1968,21 +1951,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movl: + extract_sfmt_movl: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movl.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_movq.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_srcdst) = f_srcdst; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1998,20 +1983,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movl1: + extract_sfmt_movl1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movl1.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src1) = f_src1; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2025,21 +2012,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movt: + extract_sfmt_movt: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movt.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_movq.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_srcdst) = f_srcdst; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2057,20 +2046,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movt1: + extract_sfmt_movt1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movt1.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_movq.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src1) = f_src1; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2085,21 +2076,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movq: + extract_sfmt_movq: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movq.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_movq.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_srcdst) = f_srcdst; FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2119,20 +2112,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_movq1: + extract_sfmt_movq1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_movq1.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_movq.f + UINT f_srcdst; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_src1) = f_src1; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2148,19 +2143,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_modpc: + extract_sfmt_modpc: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_modpc.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_srcdst; + UINT f_src2; - EXTRACT_IFMT_MULO_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_src2) = & CPU (h_gr)[f_src2]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -2174,887 +2171,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_lda_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_lda_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldob_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldos_indirect_index_disp: + extract_sfmt_lda_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_LDA_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldib_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3067,20 +2198,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_indirect_offset: + extract_sfmt_lda_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3094,19 +2229,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_indirect: + extract_sfmt_lda_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3120,21 +2257,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_indirect_index: + extract_sfmt_lda_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_scale) = f_scale; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3149,19 +2292,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_disp: + extract_sfmt_lda_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3174,20 +2322,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_indirect_disp: + extract_sfmt_lda_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3201,21 +2356,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_index_disp: + extract_sfmt_lda_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3229,14 +2393,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldib_indirect_index_disp: + extract_sfmt_lda_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; @@ -3244,7 +2419,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3259,19 +2434,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_offset: + extract_sfmt_ld_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3284,20 +2461,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_indirect_offset: + extract_sfmt_ld_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3311,19 +2492,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_indirect: + extract_sfmt_ld_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3337,21 +2520,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_indirect_index: + extract_sfmt_ld_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_scale) = f_scale; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3366,19 +2555,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_disp: + extract_sfmt_ld_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3391,20 +2585,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_indirect_disp: + extract_sfmt_ld_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3418,21 +2619,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_index_disp: + extract_sfmt_ld_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3446,14 +2656,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldis_indirect_index_disp: + extract_sfmt_ld_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; @@ -3461,7 +2682,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3476,20 +2697,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_offset: + extract_sfmt_ldl_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3503,21 +2726,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_indirect_offset: + extract_sfmt_ldl_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3532,20 +2759,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_indirect: + extract_sfmt_ldl_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3560,14 +2789,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_indirect_index: + extract_sfmt_ldl_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3575,7 +2810,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3591,20 +2826,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_disp: + extract_sfmt_ldl_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3618,21 +2858,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_indirect_disp: + extract_sfmt_ldl_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3647,14 +2894,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_index_disp: + extract_sfmt_ldl_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3662,7 +2918,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3677,14 +2933,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldl_indirect_index_disp: + extract_sfmt_ldl_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3693,7 +2960,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3709,20 +2976,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_offset: + extract_sfmt_ldt_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3737,21 +3006,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_indirect_offset: + extract_sfmt_ldt_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3767,20 +3040,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_indirect: + extract_sfmt_ldt_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3796,14 +3071,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_indirect_index: + extract_sfmt_ldt_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3811,7 +3092,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3828,20 +3109,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_disp: + extract_sfmt_ldt_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3856,21 +3142,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_indirect_disp: + extract_sfmt_ldt_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3886,14 +3179,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_index_disp: + extract_sfmt_ldt_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3901,7 +3203,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3917,14 +3219,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldt_indirect_index_disp: + extract_sfmt_ldt_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -3933,7 +3246,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3950,20 +3263,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_offset: + extract_sfmt_ldq_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -3979,21 +3294,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_indirect_offset: + extract_sfmt_ldq_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4010,20 +3329,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_indirect: + extract_sfmt_ldq_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4040,14 +3361,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_indirect_index: + extract_sfmt_ldq_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -4055,7 +3382,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4073,20 +3400,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_disp: + extract_sfmt_ldq_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4102,21 +3434,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_indirect_disp: + extract_sfmt_ldq_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4133,14 +3472,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_index_disp: + extract_sfmt_ldq_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -4148,7 +3496,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4165,14 +3513,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldq_indirect_index_disp: + extract_sfmt_ldq_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -4181,7 +3540,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4199,19 +3558,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_offset: + extract_sfmt_st_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4224,20 +3585,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_indirect_offset: + extract_sfmt_st_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4251,19 +3616,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_indirect: + extract_sfmt_st_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4277,21 +3644,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_indirect_index: + extract_sfmt_st_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_scale) = f_scale; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4306,19 +3679,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_disp: + extract_sfmt_st_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4331,20 +3709,27 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_indirect_disp: + extract_sfmt_st_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4358,21 +3743,30 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_index_disp: + extract_sfmt_st_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4386,14 +3780,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_indirect_index_disp: + extract_sfmt_st_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; @@ -4401,7 +3806,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4416,454 +3821,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stob_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_ST_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_ST_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_indirect: + extract_sfmt_stl_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_ST_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stob_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_ST_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_ST_OFFSET_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_INDIRECT_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stos_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ - - EXTRACT_IFMT_ST_DISP_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_stl_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ - - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4877,21 +3850,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_indirect_offset: + extract_sfmt_stl_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4906,20 +3883,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_indirect: + extract_sfmt_stl_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4934,14 +3913,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_indirect_index: + extract_sfmt_stl_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -4949,7 +3934,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4965,20 +3950,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_disp: + extract_sfmt_stl_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -4992,21 +3982,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_indirect_disp: + extract_sfmt_stl_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5021,14 +4018,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_index_disp: + extract_sfmt_stl_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5036,7 +4042,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5051,14 +4057,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stl_indirect_index_disp: + extract_sfmt_stl_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5067,7 +4084,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5083,20 +4100,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_offset: + extract_sfmt_stt_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5111,21 +4130,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_indirect_offset: + extract_sfmt_stt_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5141,20 +4164,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_indirect: + extract_sfmt_stt_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5170,14 +4195,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_indirect_index: + extract_sfmt_stt_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5185,7 +4216,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5202,20 +4233,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_disp: + extract_sfmt_stt_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5230,21 +4266,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_indirect_disp: + extract_sfmt_stt_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5260,14 +4303,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_index_disp: + extract_sfmt_stt_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5275,7 +4327,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5291,14 +4343,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stt_indirect_index_disp: + extract_sfmt_stt_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5307,7 +4370,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5324,20 +4387,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_offset: + extract_sfmt_stq_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5353,21 +4418,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_indirect_offset: + extract_sfmt_stq_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f - EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_ST_OFFSET_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5384,20 +4453,22 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_indirect: + extract_sfmt_stq_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_indirect.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_srcdst; + UINT f_abase; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5414,14 +4485,20 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_indirect_index: + extract_sfmt_stq_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_indirect_index.f - EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_ST_INDIRECT_CODE + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5429,7 +4506,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5447,20 +4524,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_disp: + extract_sfmt_stq_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5476,21 +4558,28 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_indirect_disp: + extract_sfmt_stq_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5507,14 +4596,23 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_index_disp: + extract_sfmt_stq_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5522,7 +4620,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (f_scale) = f_scale; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5539,14 +4637,25 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stq_indirect_index_disp: + extract_sfmt_stq_indirect_index_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f - EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_srcdst; + UINT f_abase; + UINT f_scale; + UINT f_index; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_ST_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_srcdst) = f_srcdst; @@ -5555,7 +4664,7 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5573,21 +4682,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpobe_reg: + extract_sfmt_cmpobe_reg: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f - EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_REG_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_br_disp) = f_br_disp; FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5601,21 +4713,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpobe_lit: + extract_sfmt_cmpobe_lit: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f - EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_LIT_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_br_src1) = f_br_src1; FLD (i_br_disp) = f_br_disp; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5628,21 +4743,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpobl_reg: + extract_sfmt_cmpobl_reg: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f - EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_REG_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_br_disp) = f_br_disp; FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5656,21 +4774,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpobl_lit: + extract_sfmt_cmpobl_lit: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f - EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_LIT_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_br_src1) = f_br_src1; FLD (i_br_disp) = f_br_disp; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5683,21 +4804,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bbc_reg: + extract_sfmt_bbc_reg: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f - EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_REG_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_br_disp) = f_br_disp; FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5711,21 +4835,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bbc_lit: + extract_sfmt_bbc_lit: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f - EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f + UINT f_br_src1; + UINT f_br_src2; + SI f_br_disp; - EXTRACT_IFMT_CMPOBE_LIT_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); + f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_br_src1) = f_br_src1; FLD (i_br_disp) = f_br_disp; FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5738,19 +4865,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi: + extract_sfmt_cmpi: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpi.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5764,19 +4893,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi1: + extract_sfmt_cmpi1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpi1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5789,19 +4920,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi2: + extract_sfmt_cmpi2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpi2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5814,19 +4947,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi3: + extract_sfmt_cmpi3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpi3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5838,19 +4973,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpo: + extract_sfmt_cmpo: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpo.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5864,19 +5001,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpo1: + extract_sfmt_cmpo1: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpo1.f - EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul1.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO1_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5889,19 +5028,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpo2: + extract_sfmt_cmpo2: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpo2.f - EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO2_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src2) = f_src2; FLD (i_src1) = & CPU (h_gr)[f_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5914,19 +5055,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpo3: + extract_sfmt_cmpo3: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_cmpo3.f - EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul3.f + UINT f_src2; + UINT f_src1; - EXTRACT_IFMT_MULO3_CODE + f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_src1) = f_src1; FLD (f_src2) = f_src2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5938,18 +5081,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_testno_reg: + extract_sfmt_testno_reg: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_testno_reg.f - EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ +#define FLD(f) abuf->fields.sfmt_testno_reg.f + UINT f_br_src1; - EXTRACT_IFMT_CMPOBE_REG_CODE + f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); /* Record the fields for the semantic handler. */ FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5962,19 +5105,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bno: + extract_sfmt_bno: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f - EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ +#define FLD(f) abuf->fields.sfmt_bno.f + SI f_ctrl_disp; - EXTRACT_IFMT_BNO_CODE + f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_ctrl_disp) = f_ctrl_disp; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -5986,19 +5128,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_b: + extract_sfmt_b: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_b.f - EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ +#define FLD(f) abuf->fields.sfmt_bno.f + SI f_ctrl_disp; - EXTRACT_IFMT_BNO_CODE + f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_ctrl_disp) = f_ctrl_disp; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6010,20 +5151,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bx_indirect_offset: + extract_sfmt_bx_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6036,19 +5178,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bx_indirect: + extract_sfmt_bx_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_abase) = & CPU (h_gr)[f_abase]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6061,21 +5202,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bx_indirect_index: + extract_sfmt_bx_indirect_index: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_abase; + UINT f_scale; + UINT f_index; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); + f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (f_scale) = f_scale; FLD (i_abase) = & CPU (h_gr)[f_abase]; FLD (i_index) = & CPU (h_gr)[f_index]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6089,19 +5233,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bx_disp: + extract_sfmt_bx_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6113,20 +5259,24 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bx_indirect_disp: + extract_sfmt_bx_indirect_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f + UINT f_optdisp; + UINT f_abase; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; FLD (i_abase) = & CPU (h_gr)[f_abase]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6139,19 +5289,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_callx_disp: + extract_sfmt_callx_disp: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f - EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_callx_disp.f + UINT f_optdisp; + /* Contents of trailing part of insn. */ + UINT word_1; - EXTRACT_IFMT_LDA_DISP_CODE + word_1 = GETIMEMUSI (current_cpu, pc + 4); + f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); /* Record the fields for the semantic handler. */ FLD (f_optdisp) = f_optdisp; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6197,19 +5349,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_callx_indirect: + extract_sfmt_callx_indirect: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f - EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f + UINT f_abase; - EXTRACT_IFMT_LDA_INDIRECT_CODE + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); /* Record the fields for the semantic handler. */ FLD (i_abase) = & CPU (h_gr)[f_abase]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6256,20 +5407,21 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_callx_indirect_offset: + extract_sfmt_callx_indirect_offset: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f - EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f + UINT f_abase; + UINT f_offset; - EXTRACT_IFMT_LDA_OFFSET_CODE + f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); /* Record the fields for the semantic handler. */ FLD (f_offset) = f_offset; FLD (i_abase) = & CPU (h_gr)[f_abase]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6316,18 +5468,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ret: + extract_sfmt_ret: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f - EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ +#define FLD(f) abuf->fields.sfmt_callx_disp.f - EXTRACT_IFMT_BNO_CODE /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ret", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6359,19 +5508,18 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_calls: + extract_sfmt_calls: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_calls.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.sfmt_emul2.f + UINT f_src1; - EXTRACT_IFMT_MULO_CODE + f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_src1]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6384,18 +5532,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_fmark: + extract_sfmt_fmark: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_MULO_CODE /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_fmark", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmark", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -6407,17 +5552,15 @@ i960base_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_flushreg: + extract_sfmt_flushreg: { const IDESC *idesc = &i960base_insn_data[itype]; CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_flushreg.f - EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ +#define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_MULO_CODE /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_flushreg", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flushreg", (char *) 0)); #undef FLD return idesc; diff --git a/sim/i960/decode.h b/sim/i960/decode.h index 80fbde63a5c..e88e0274795 100644 --- a/sim/i960/decode.h +++ b/sim/i960/decode.h @@ -29,6 +29,8 @@ extern const IDESC *i960base_decode (SIM_CPU *, IADDR, CGEN_INSN_INT, ARGBUF *); extern void i960base_init_idesc_table (SIM_CPU *); +extern void i960base_sem_init_idesc_table (SIM_CPU *); +extern void i960base_semf_init_idesc_table (SIM_CPU *); /* Enum declaration for instructions in cpu family i960base. */ typedef enum i960base_insn_type { @@ -109,326 +111,41 @@ typedef enum i960base_insn_type { , I960BASE_INSN_FLUSHREG, I960BASE_INSN_MAX } I960BASE_INSN_TYPE; -#if ! WITH_SEM_SWITCH_FULL -#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (i960base,_sem_,fn); -#else -#define SEMFULL(fn) -#endif - -#if ! WITH_SEM_SWITCH_FAST -#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (i960base,_semf_,fn); -#else -#define SEMFAST(fn) -#endif - -#define SEM(fn) SEMFULL (fn) SEMFAST (fn) - -/* The function version of the before/after handlers is always needed, - so we always want the SEMFULL declaration of them. */ -extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_before); -extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_after); - -SEM (x_invalid) -SEM (x_after) -SEM (x_before) -SEM (x_cti_chain) -SEM (x_chain) -SEM (x_begin) -SEM (mulo) -SEM (mulo1) -SEM (mulo2) -SEM (mulo3) -SEM (remo) -SEM (remo1) -SEM (remo2) -SEM (remo3) -SEM (divo) -SEM (divo1) -SEM (divo2) -SEM (divo3) -SEM (remi) -SEM (remi1) -SEM (remi2) -SEM (remi3) -SEM (divi) -SEM (divi1) -SEM (divi2) -SEM (divi3) -SEM (addo) -SEM (addo1) -SEM (addo2) -SEM (addo3) -SEM (subo) -SEM (subo1) -SEM (subo2) -SEM (subo3) -SEM (notbit) -SEM (notbit1) -SEM (notbit2) -SEM (notbit3) -SEM (and) -SEM (and1) -SEM (and2) -SEM (and3) -SEM (andnot) -SEM (andnot1) -SEM (andnot2) -SEM (andnot3) -SEM (setbit) -SEM (setbit1) -SEM (setbit2) -SEM (setbit3) -SEM (notand) -SEM (notand1) -SEM (notand2) -SEM (notand3) -SEM (xor) -SEM (xor1) -SEM (xor2) -SEM (xor3) -SEM (or) -SEM (or1) -SEM (or2) -SEM (or3) -SEM (nor) -SEM (nor1) -SEM (nor2) -SEM (nor3) -SEM (xnor) -SEM (xnor1) -SEM (xnor2) -SEM (xnor3) -SEM (not) -SEM (not1) -SEM (not2) -SEM (not3) -SEM (ornot) -SEM (ornot1) -SEM (ornot2) -SEM (ornot3) -SEM (clrbit) -SEM (clrbit1) -SEM (clrbit2) -SEM (clrbit3) -SEM (shlo) -SEM (shlo1) -SEM (shlo2) -SEM (shlo3) -SEM (shro) -SEM (shro1) -SEM (shro2) -SEM (shro3) -SEM (shli) -SEM (shli1) -SEM (shli2) -SEM (shli3) -SEM (shri) -SEM (shri1) -SEM (shri2) -SEM (shri3) -SEM (emul) -SEM (emul1) -SEM (emul2) -SEM (emul3) -SEM (mov) -SEM (mov1) -SEM (movl) -SEM (movl1) -SEM (movt) -SEM (movt1) -SEM (movq) -SEM (movq1) -SEM (modpc) -SEM (modac) -SEM (lda_offset) -SEM (lda_indirect_offset) -SEM (lda_indirect) -SEM (lda_indirect_index) -SEM (lda_disp) -SEM (lda_indirect_disp) -SEM (lda_index_disp) -SEM (lda_indirect_index_disp) -SEM (ld_offset) -SEM (ld_indirect_offset) -SEM (ld_indirect) -SEM (ld_indirect_index) -SEM (ld_disp) -SEM (ld_indirect_disp) -SEM (ld_index_disp) -SEM (ld_indirect_index_disp) -SEM (ldob_offset) -SEM (ldob_indirect_offset) -SEM (ldob_indirect) -SEM (ldob_indirect_index) -SEM (ldob_disp) -SEM (ldob_indirect_disp) -SEM (ldob_index_disp) -SEM (ldob_indirect_index_disp) -SEM (ldos_offset) -SEM (ldos_indirect_offset) -SEM (ldos_indirect) -SEM (ldos_indirect_index) -SEM (ldos_disp) -SEM (ldos_indirect_disp) -SEM (ldos_index_disp) -SEM (ldos_indirect_index_disp) -SEM (ldib_offset) -SEM (ldib_indirect_offset) -SEM (ldib_indirect) -SEM (ldib_indirect_index) -SEM (ldib_disp) -SEM (ldib_indirect_disp) -SEM (ldib_index_disp) -SEM (ldib_indirect_index_disp) -SEM (ldis_offset) -SEM (ldis_indirect_offset) -SEM (ldis_indirect) -SEM (ldis_indirect_index) -SEM (ldis_disp) -SEM (ldis_indirect_disp) -SEM (ldis_index_disp) -SEM (ldis_indirect_index_disp) -SEM (ldl_offset) -SEM (ldl_indirect_offset) -SEM (ldl_indirect) -SEM (ldl_indirect_index) -SEM (ldl_disp) -SEM (ldl_indirect_disp) -SEM (ldl_index_disp) -SEM (ldl_indirect_index_disp) -SEM (ldt_offset) -SEM (ldt_indirect_offset) -SEM (ldt_indirect) -SEM (ldt_indirect_index) -SEM (ldt_disp) -SEM (ldt_indirect_disp) -SEM (ldt_index_disp) -SEM (ldt_indirect_index_disp) -SEM (ldq_offset) -SEM (ldq_indirect_offset) -SEM (ldq_indirect) -SEM (ldq_indirect_index) -SEM (ldq_disp) -SEM (ldq_indirect_disp) -SEM (ldq_index_disp) -SEM (ldq_indirect_index_disp) -SEM (st_offset) -SEM (st_indirect_offset) -SEM (st_indirect) -SEM (st_indirect_index) -SEM (st_disp) -SEM (st_indirect_disp) -SEM (st_index_disp) -SEM (st_indirect_index_disp) -SEM (stob_offset) -SEM (stob_indirect_offset) -SEM (stob_indirect) -SEM (stob_indirect_index) -SEM (stob_disp) -SEM (stob_indirect_disp) -SEM (stob_index_disp) -SEM (stob_indirect_index_disp) -SEM (stos_offset) -SEM (stos_indirect_offset) -SEM (stos_indirect) -SEM (stos_indirect_index) -SEM (stos_disp) -SEM (stos_indirect_disp) -SEM (stos_index_disp) -SEM (stos_indirect_index_disp) -SEM (stl_offset) -SEM (stl_indirect_offset) -SEM (stl_indirect) -SEM (stl_indirect_index) -SEM (stl_disp) -SEM (stl_indirect_disp) -SEM (stl_index_disp) -SEM (stl_indirect_index_disp) -SEM (stt_offset) -SEM (stt_indirect_offset) -SEM (stt_indirect) -SEM (stt_indirect_index) -SEM (stt_disp) -SEM (stt_indirect_disp) -SEM (stt_index_disp) -SEM (stt_indirect_index_disp) -SEM (stq_offset) -SEM (stq_indirect_offset) -SEM (stq_indirect) -SEM (stq_indirect_index) -SEM (stq_disp) -SEM (stq_indirect_disp) -SEM (stq_index_disp) -SEM (stq_indirect_index_disp) -SEM (cmpobe_reg) -SEM (cmpobe_lit) -SEM (cmpobne_reg) -SEM (cmpobne_lit) -SEM (cmpobl_reg) -SEM (cmpobl_lit) -SEM (cmpoble_reg) -SEM (cmpoble_lit) -SEM (cmpobg_reg) -SEM (cmpobg_lit) -SEM (cmpobge_reg) -SEM (cmpobge_lit) -SEM (cmpibe_reg) -SEM (cmpibe_lit) -SEM (cmpibne_reg) -SEM (cmpibne_lit) -SEM (cmpibl_reg) -SEM (cmpibl_lit) -SEM (cmpible_reg) -SEM (cmpible_lit) -SEM (cmpibg_reg) -SEM (cmpibg_lit) -SEM (cmpibge_reg) -SEM (cmpibge_lit) -SEM (bbc_reg) -SEM (bbc_lit) -SEM (bbs_reg) -SEM (bbs_lit) -SEM (cmpi) -SEM (cmpi1) -SEM (cmpi2) -SEM (cmpi3) -SEM (cmpo) -SEM (cmpo1) -SEM (cmpo2) -SEM (cmpo3) -SEM (testno_reg) -SEM (testg_reg) -SEM (teste_reg) -SEM (testge_reg) -SEM (testl_reg) -SEM (testne_reg) -SEM (testle_reg) -SEM (testo_reg) -SEM (bno) -SEM (bg) -SEM (be) -SEM (bge) -SEM (bl) -SEM (bne) -SEM (ble) -SEM (bo) -SEM (b) -SEM (bx_indirect_offset) -SEM (bx_indirect) -SEM (bx_indirect_index) -SEM (bx_disp) -SEM (bx_indirect_disp) -SEM (callx_disp) -SEM (callx_indirect) -SEM (callx_indirect_offset) -SEM (ret) -SEM (calls) -SEM (fmark) -SEM (flushreg) - -#undef SEMFULL -#undef SEMFAST -#undef SEM +/* Enum declaration for semantic formats in cpu family i960base. */ +typedef enum i960base_sfmt_type { + I960BASE_SFMT_EMPTY, I960BASE_SFMT_MULO, I960BASE_SFMT_MULO1, I960BASE_SFMT_MULO2 + , I960BASE_SFMT_MULO3, I960BASE_SFMT_NOTBIT, I960BASE_SFMT_NOTBIT1, I960BASE_SFMT_NOTBIT2 + , I960BASE_SFMT_NOTBIT3, I960BASE_SFMT_NOT, I960BASE_SFMT_NOT1, I960BASE_SFMT_SHLO + , I960BASE_SFMT_SHLO1, I960BASE_SFMT_SHLO2, I960BASE_SFMT_SHLO3, I960BASE_SFMT_EMUL + , I960BASE_SFMT_EMUL1, I960BASE_SFMT_EMUL2, I960BASE_SFMT_EMUL3, I960BASE_SFMT_MOVL + , I960BASE_SFMT_MOVL1, I960BASE_SFMT_MOVT, I960BASE_SFMT_MOVT1, I960BASE_SFMT_MOVQ + , I960BASE_SFMT_MOVQ1, I960BASE_SFMT_MODPC, I960BASE_SFMT_LDA_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET + , I960BASE_SFMT_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP + , I960BASE_SFMT_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET + , I960BASE_SFMT_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_DISP, I960BASE_SFMT_LD_INDIRECT_DISP + , I960BASE_SFMT_LD_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET + , I960BASE_SFMT_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP + , I960BASE_SFMT_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET + , I960BASE_SFMT_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP + , I960BASE_SFMT_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET + , I960BASE_SFMT_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP + , I960BASE_SFMT_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET + , I960BASE_SFMT_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_DISP, I960BASE_SFMT_ST_INDIRECT_DISP + , I960BASE_SFMT_ST_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET + , I960BASE_SFMT_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_DISP, I960BASE_SFMT_STL_INDIRECT_DISP + , I960BASE_SFMT_STL_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET + , I960BASE_SFMT_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP + , I960BASE_SFMT_STT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET + , I960BASE_SFMT_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP + , I960BASE_SFMT_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_CMPOBE_REG, I960BASE_SFMT_CMPOBE_LIT + , I960BASE_SFMT_CMPOBL_REG, I960BASE_SFMT_CMPOBL_LIT, I960BASE_SFMT_BBC_REG, I960BASE_SFMT_BBC_LIT + , I960BASE_SFMT_CMPI, I960BASE_SFMT_CMPI1, I960BASE_SFMT_CMPI2, I960BASE_SFMT_CMPI3 + , I960BASE_SFMT_CMPO, I960BASE_SFMT_CMPO1, I960BASE_SFMT_CMPO2, I960BASE_SFMT_CMPO3 + , I960BASE_SFMT_TESTNO_REG, I960BASE_SFMT_BNO, I960BASE_SFMT_B, I960BASE_SFMT_BX_INDIRECT_OFFSET + , I960BASE_SFMT_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_DISP, I960BASE_SFMT_BX_INDIRECT_DISP + , I960BASE_SFMT_CALLX_DISP, I960BASE_SFMT_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_RET + , I960BASE_SFMT_CALLS, I960BASE_SFMT_FMARK, I960BASE_SFMT_FLUSHREG +} I960BASE_SFMT_TYPE; /* Function unit handlers (user written). */ diff --git a/sim/i960/i960-desc.h b/sim/i960/i960-desc.h index 75b3d63750d..40ca2279f10 100644 --- a/sim/i960/i960-desc.h +++ b/sim/i960/i960-desc.h @@ -35,6 +35,9 @@ with this program; if not, write to the Free Software Foundation, Inc., #define CGEN_INSN_LSB0_P 0 +/* Minimum size of any insn (in bytes). */ +#define CGEN_MIN_INSN_SIZE 4 + /* Maximum size of any insn (in bytes). */ #define CGEN_MAX_INSN_SIZE 8 diff --git a/sim/i960/model.c b/sim/i960/model.c index 8881f3e43d2..600d9ea4359 100644 --- a/sim/i960/model.c +++ b/sim/i960/model.c @@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc., static int model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -53,7 +53,7 @@ model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -69,7 +69,7 @@ model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -85,7 +85,7 @@ model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -101,7 +101,7 @@ model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -117,7 +117,7 @@ model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -133,7 +133,7 @@ model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -149,7 +149,7 @@ model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -165,7 +165,7 @@ model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -181,7 +181,7 @@ model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -197,7 +197,7 @@ model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -213,7 +213,7 @@ model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -229,7 +229,7 @@ model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -245,7 +245,7 @@ model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -261,7 +261,7 @@ model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -277,7 +277,7 @@ model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -293,7 +293,7 @@ model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -309,7 +309,7 @@ model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -325,7 +325,7 @@ model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -341,7 +341,7 @@ model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -357,7 +357,7 @@ model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -373,7 +373,7 @@ model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -389,7 +389,7 @@ model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -405,7 +405,7 @@ model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -421,7 +421,7 @@ model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -437,7 +437,7 @@ model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -453,7 +453,7 @@ model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -469,7 +469,7 @@ model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -485,7 +485,7 @@ model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -501,7 +501,7 @@ model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -517,7 +517,7 @@ model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -533,7 +533,7 @@ model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -549,7 +549,7 @@ model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -565,7 +565,7 @@ model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -581,7 +581,7 @@ model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -597,7 +597,7 @@ model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -613,7 +613,7 @@ model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -629,7 +629,7 @@ model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -645,7 +645,7 @@ model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -661,7 +661,7 @@ model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -677,7 +677,7 @@ model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -693,7 +693,7 @@ model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -709,7 +709,7 @@ model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -725,7 +725,7 @@ model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -741,7 +741,7 @@ model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -757,7 +757,7 @@ model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -773,7 +773,7 @@ model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -789,7 +789,7 @@ model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -805,7 +805,7 @@ model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -821,7 +821,7 @@ model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -837,7 +837,7 @@ model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -853,7 +853,7 @@ model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -869,7 +869,7 @@ model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -885,7 +885,7 @@ model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -901,7 +901,7 @@ model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -917,7 +917,7 @@ model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -933,7 +933,7 @@ model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -949,7 +949,7 @@ model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -965,7 +965,7 @@ model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -981,7 +981,7 @@ model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -997,7 +997,7 @@ model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1013,7 +1013,7 @@ model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1029,7 +1029,7 @@ model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1045,7 +1045,7 @@ model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1061,7 +1061,7 @@ model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1077,7 +1077,7 @@ model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not1.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1093,7 +1093,7 @@ model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1109,7 +1109,7 @@ model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1125,7 +1125,7 @@ model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1141,7 +1141,7 @@ model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1157,7 +1157,7 @@ model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1173,7 +1173,7 @@ model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1189,7 +1189,7 @@ model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1205,7 +1205,7 @@ model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1221,7 +1221,7 @@ model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1237,7 +1237,7 @@ model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1253,7 +1253,7 @@ model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1269,7 +1269,7 @@ model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1285,7 +1285,7 @@ model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1301,7 +1301,7 @@ model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1317,7 +1317,7 @@ model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1333,7 +1333,7 @@ model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1349,7 +1349,7 @@ model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1365,7 +1365,7 @@ model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1381,7 +1381,7 @@ model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1397,7 +1397,7 @@ model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1413,7 +1413,7 @@ model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1429,7 +1429,7 @@ model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1445,7 +1445,7 @@ model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1461,7 +1461,7 @@ model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1477,7 +1477,7 @@ model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1493,7 +1493,7 @@ model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1509,7 +1509,7 @@ model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1525,7 +1525,7 @@ model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1541,7 +1541,7 @@ model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1557,7 +1557,7 @@ model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1573,7 +1573,7 @@ model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1589,7 +1589,7 @@ model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1605,7 +1605,7 @@ model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movl.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1621,7 +1621,7 @@ model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movl1.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1637,7 +1637,7 @@ model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movt.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1653,7 +1653,7 @@ model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movt1.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1669,7 +1669,7 @@ model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movq.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1685,7 +1685,7 @@ model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movq1.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1701,7 +1701,7 @@ model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1717,7 +1717,7 @@ model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1733,7 +1733,7 @@ model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1749,7 +1749,7 @@ model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1765,7 +1765,7 @@ model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1781,7 +1781,7 @@ model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1797,7 +1797,7 @@ model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1813,7 +1813,7 @@ model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1829,7 +1829,7 @@ model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1845,7 +1845,7 @@ model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1861,7 +1861,7 @@ model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1877,7 +1877,7 @@ model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1893,7 +1893,7 @@ model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1909,7 +1909,7 @@ model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1925,7 +1925,7 @@ model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1941,7 +1941,7 @@ model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1957,7 +1957,7 @@ model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1973,7 +1973,7 @@ model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1989,7 +1989,7 @@ model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2005,7 +2005,7 @@ model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2021,7 +2021,7 @@ model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2037,7 +2037,7 @@ model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2053,7 +2053,7 @@ model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2069,7 +2069,7 @@ model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2085,7 +2085,7 @@ model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2101,7 +2101,7 @@ model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2117,7 +2117,7 @@ model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2133,7 +2133,7 @@ model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2149,7 +2149,7 @@ model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2165,7 +2165,7 @@ model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2181,7 +2181,7 @@ model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2197,7 +2197,7 @@ model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2213,7 +2213,7 @@ model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2229,7 +2229,7 @@ model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2245,7 +2245,7 @@ model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2261,7 +2261,7 @@ model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2277,7 +2277,7 @@ model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2293,7 +2293,7 @@ model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2309,7 +2309,7 @@ model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2325,7 +2325,7 @@ model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2341,7 +2341,7 @@ model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2357,7 +2357,7 @@ model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2373,7 +2373,7 @@ model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2389,7 +2389,7 @@ model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2405,7 +2405,7 @@ model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2421,7 +2421,7 @@ model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2437,7 +2437,7 @@ model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2453,7 +2453,7 @@ model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2469,7 +2469,7 @@ model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2485,7 +2485,7 @@ model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2501,7 +2501,7 @@ model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2517,7 +2517,7 @@ model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2533,7 +2533,7 @@ model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2549,7 +2549,7 @@ model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2565,7 +2565,7 @@ model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2581,7 +2581,7 @@ model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2597,7 +2597,7 @@ model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2613,7 +2613,7 @@ model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2629,7 +2629,7 @@ model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2645,7 +2645,7 @@ model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2661,7 +2661,7 @@ model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2677,7 +2677,7 @@ model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2693,7 +2693,7 @@ model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2709,7 +2709,7 @@ model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2725,7 +2725,7 @@ model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2741,7 +2741,7 @@ model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2757,7 +2757,7 @@ model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2773,7 +2773,7 @@ model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2789,7 +2789,7 @@ model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2805,7 +2805,7 @@ model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2821,7 +2821,7 @@ model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2837,7 +2837,7 @@ model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2853,7 +2853,7 @@ model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2869,7 +2869,7 @@ model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2885,7 +2885,7 @@ model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2901,7 +2901,7 @@ model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2917,7 +2917,7 @@ model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2933,7 +2933,7 @@ model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2949,7 +2949,7 @@ model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2965,7 +2965,7 @@ model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2981,7 +2981,7 @@ model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2997,7 +2997,7 @@ model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3013,7 +3013,7 @@ model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3029,7 +3029,7 @@ model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3045,7 +3045,7 @@ model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3061,7 +3061,7 @@ model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3077,7 +3077,7 @@ model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3093,7 +3093,7 @@ model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3109,7 +3109,7 @@ model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3125,7 +3125,7 @@ model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3141,7 +3141,7 @@ model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3157,7 +3157,7 @@ model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3173,7 +3173,7 @@ model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3189,7 +3189,7 @@ model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3205,7 +3205,7 @@ model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3221,7 +3221,7 @@ model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3237,7 +3237,7 @@ model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3253,7 +3253,7 @@ model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3269,7 +3269,7 @@ model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3285,7 +3285,7 @@ model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3301,7 +3301,7 @@ model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3317,7 +3317,7 @@ model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3333,7 +3333,7 @@ model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3349,7 +3349,7 @@ model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3365,7 +3365,7 @@ model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3381,7 +3381,7 @@ model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3397,7 +3397,7 @@ model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3413,7 +3413,7 @@ model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3429,7 +3429,7 @@ model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3445,7 +3445,7 @@ model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3461,7 +3461,7 @@ model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3477,7 +3477,7 @@ model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3493,7 +3493,7 @@ model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3509,7 +3509,7 @@ model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3525,7 +3525,7 @@ model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3541,7 +3541,7 @@ model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3557,7 +3557,7 @@ model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3573,7 +3573,7 @@ model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3589,7 +3589,7 @@ model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3605,7 +3605,7 @@ model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3621,7 +3621,7 @@ model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3637,7 +3637,7 @@ model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3653,7 +3653,7 @@ model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3669,7 +3669,7 @@ model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3685,7 +3685,7 @@ model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3701,7 +3701,7 @@ model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3717,7 +3717,7 @@ model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3733,7 +3733,7 @@ model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3749,7 +3749,7 @@ model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3765,7 +3765,7 @@ model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3781,7 +3781,7 @@ model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3797,7 +3797,7 @@ model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3813,7 +3813,7 @@ model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3829,7 +3829,7 @@ model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3845,7 +3845,7 @@ model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3861,7 +3861,7 @@ model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3877,7 +3877,7 @@ model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3893,7 +3893,7 @@ model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3909,7 +3909,7 @@ model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3925,7 +3925,7 @@ model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3941,7 +3941,7 @@ model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3957,7 +3957,7 @@ model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3973,7 +3973,7 @@ model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3989,7 +3989,7 @@ model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4005,7 +4005,7 @@ model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4021,7 +4021,7 @@ model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4037,7 +4037,7 @@ model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4053,7 +4053,7 @@ model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4069,7 +4069,7 @@ model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4085,7 +4085,7 @@ model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4101,7 +4101,7 @@ model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4117,7 +4117,7 @@ model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4133,7 +4133,7 @@ model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4149,7 +4149,7 @@ model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4165,7 +4165,7 @@ model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4181,7 +4181,7 @@ model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4197,7 +4197,7 @@ model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4213,7 +4213,7 @@ model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4229,7 +4229,7 @@ model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4245,7 +4245,7 @@ model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4261,7 +4261,7 @@ model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4277,7 +4277,7 @@ model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4293,7 +4293,7 @@ model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4309,7 +4309,7 @@ model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4325,7 +4325,7 @@ model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4341,7 +4341,7 @@ model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4357,7 +4357,7 @@ model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4373,7 +4373,7 @@ model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4389,7 +4389,7 @@ model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4405,7 +4405,7 @@ model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4421,7 +4421,7 @@ model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4437,7 +4437,7 @@ model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4453,7 +4453,7 @@ model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4469,7 +4469,7 @@ model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4485,7 +4485,7 @@ model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_b.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4501,7 +4501,7 @@ model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4517,7 +4517,7 @@ model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4533,7 +4533,7 @@ model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4549,7 +4549,7 @@ model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4565,7 +4565,7 @@ model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4581,7 +4581,7 @@ model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4597,7 +4597,7 @@ model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4613,7 +4613,7 @@ model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4629,7 +4629,7 @@ model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4645,7 +4645,7 @@ model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_calls.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4661,7 +4661,7 @@ model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4677,7 +4677,7 @@ model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg) static int model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_flushreg.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4693,7 +4693,7 @@ model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4709,7 +4709,7 @@ model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4725,7 +4725,7 @@ model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4741,7 +4741,7 @@ model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4757,7 +4757,7 @@ model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4773,7 +4773,7 @@ model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4789,7 +4789,7 @@ model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4805,7 +4805,7 @@ model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4821,7 +4821,7 @@ model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4837,7 +4837,7 @@ model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4853,7 +4853,7 @@ model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4869,7 +4869,7 @@ model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4885,7 +4885,7 @@ model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4901,7 +4901,7 @@ model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4917,7 +4917,7 @@ model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4933,7 +4933,7 @@ model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4949,7 +4949,7 @@ model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4965,7 +4965,7 @@ model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4981,7 +4981,7 @@ model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -4997,7 +4997,7 @@ model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5013,7 +5013,7 @@ model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5029,7 +5029,7 @@ model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5045,7 +5045,7 @@ model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5061,7 +5061,7 @@ model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5077,7 +5077,7 @@ model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5093,7 +5093,7 @@ model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5109,7 +5109,7 @@ model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5125,7 +5125,7 @@ model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5141,7 +5141,7 @@ model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5157,7 +5157,7 @@ model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5173,7 +5173,7 @@ model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5189,7 +5189,7 @@ model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5205,7 +5205,7 @@ model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5221,7 +5221,7 @@ model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5237,7 +5237,7 @@ model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5253,7 +5253,7 @@ model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5269,7 +5269,7 @@ model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5285,7 +5285,7 @@ model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5301,7 +5301,7 @@ model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5317,7 +5317,7 @@ model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5333,7 +5333,7 @@ model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5349,7 +5349,7 @@ model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5365,7 +5365,7 @@ model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5381,7 +5381,7 @@ model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5397,7 +5397,7 @@ model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5413,7 +5413,7 @@ model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5429,7 +5429,7 @@ model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5445,7 +5445,7 @@ model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5461,7 +5461,7 @@ model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5477,7 +5477,7 @@ model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5493,7 +5493,7 @@ model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5509,7 +5509,7 @@ model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5525,7 +5525,7 @@ model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5541,7 +5541,7 @@ model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5557,7 +5557,7 @@ model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5573,7 +5573,7 @@ model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5589,7 +5589,7 @@ model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5605,7 +5605,7 @@ model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5621,7 +5621,7 @@ model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5637,7 +5637,7 @@ model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5653,7 +5653,7 @@ model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5669,7 +5669,7 @@ model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5685,7 +5685,7 @@ model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5701,7 +5701,7 @@ model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5717,7 +5717,7 @@ model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5733,7 +5733,7 @@ model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not1.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5749,7 +5749,7 @@ model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5765,7 +5765,7 @@ model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5781,7 +5781,7 @@ model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5797,7 +5797,7 @@ model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5813,7 +5813,7 @@ model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5829,7 +5829,7 @@ model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5845,7 +5845,7 @@ model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5861,7 +5861,7 @@ model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5877,7 +5877,7 @@ model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5893,7 +5893,7 @@ model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5909,7 +5909,7 @@ model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5925,7 +5925,7 @@ model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5941,7 +5941,7 @@ model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5957,7 +5957,7 @@ model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5973,7 +5973,7 @@ model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -5989,7 +5989,7 @@ model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6005,7 +6005,7 @@ model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6021,7 +6021,7 @@ model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6037,7 +6037,7 @@ model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6053,7 +6053,7 @@ model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6069,7 +6069,7 @@ model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6085,7 +6085,7 @@ model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6101,7 +6101,7 @@ model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6117,7 +6117,7 @@ model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6133,7 +6133,7 @@ model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6149,7 +6149,7 @@ model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6165,7 +6165,7 @@ model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6181,7 +6181,7 @@ model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6197,7 +6197,7 @@ model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6213,7 +6213,7 @@ model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_emul3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6229,7 +6229,7 @@ model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6245,7 +6245,7 @@ model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6261,7 +6261,7 @@ model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movl.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6277,7 +6277,7 @@ model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movl1.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6293,7 +6293,7 @@ model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movt.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6309,7 +6309,7 @@ model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movt1.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6325,7 +6325,7 @@ model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movq.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6341,7 +6341,7 @@ model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_movq1.f +#define FLD(f) abuf->fields.sfmt_movq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6357,7 +6357,7 @@ model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6373,7 +6373,7 @@ model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6389,7 +6389,7 @@ model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6405,7 +6405,7 @@ model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6421,7 +6421,7 @@ model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6437,7 +6437,7 @@ model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6453,7 +6453,7 @@ model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6469,7 +6469,7 @@ model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6485,7 +6485,7 @@ model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6501,7 +6501,7 @@ model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6517,7 +6517,7 @@ model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6533,7 +6533,7 @@ model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6549,7 +6549,7 @@ model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6565,7 +6565,7 @@ model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6581,7 +6581,7 @@ model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6597,7 +6597,7 @@ model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6613,7 +6613,7 @@ model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6629,7 +6629,7 @@ model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6645,7 +6645,7 @@ model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6661,7 +6661,7 @@ model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6677,7 +6677,7 @@ model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6693,7 +6693,7 @@ model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6709,7 +6709,7 @@ model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6725,7 +6725,7 @@ model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6741,7 +6741,7 @@ model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6757,7 +6757,7 @@ model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6773,7 +6773,7 @@ model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6789,7 +6789,7 @@ model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6805,7 +6805,7 @@ model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6821,7 +6821,7 @@ model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6837,7 +6837,7 @@ model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6853,7 +6853,7 @@ model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6869,7 +6869,7 @@ model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6885,7 +6885,7 @@ model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6901,7 +6901,7 @@ model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6917,7 +6917,7 @@ model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6933,7 +6933,7 @@ model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6949,7 +6949,7 @@ model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6965,7 +6965,7 @@ model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6981,7 +6981,7 @@ model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -6997,7 +6997,7 @@ model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7013,7 +7013,7 @@ model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7029,7 +7029,7 @@ model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7045,7 +7045,7 @@ model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7061,7 +7061,7 @@ model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7077,7 +7077,7 @@ model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7093,7 +7093,7 @@ model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7109,7 +7109,7 @@ model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7125,7 +7125,7 @@ model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7141,7 +7141,7 @@ model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7157,7 +7157,7 @@ model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7173,7 +7173,7 @@ model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7189,7 +7189,7 @@ model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7205,7 +7205,7 @@ model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7221,7 +7221,7 @@ model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7237,7 +7237,7 @@ model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7253,7 +7253,7 @@ model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7269,7 +7269,7 @@ model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7285,7 +7285,7 @@ model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7301,7 +7301,7 @@ model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7317,7 +7317,7 @@ model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7333,7 +7333,7 @@ model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7349,7 +7349,7 @@ model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7365,7 +7365,7 @@ model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7381,7 +7381,7 @@ model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7397,7 +7397,7 @@ model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7413,7 +7413,7 @@ model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7429,7 +7429,7 @@ model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7445,7 +7445,7 @@ model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7461,7 +7461,7 @@ model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7477,7 +7477,7 @@ model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7493,7 +7493,7 @@ model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7509,7 +7509,7 @@ model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7525,7 +7525,7 @@ model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7541,7 +7541,7 @@ model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7557,7 +7557,7 @@ model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7573,7 +7573,7 @@ model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7589,7 +7589,7 @@ model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7605,7 +7605,7 @@ model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7621,7 +7621,7 @@ model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7637,7 +7637,7 @@ model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7653,7 +7653,7 @@ model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7669,7 +7669,7 @@ model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7685,7 +7685,7 @@ model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7701,7 +7701,7 @@ model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7717,7 +7717,7 @@ model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7733,7 +7733,7 @@ model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7749,7 +7749,7 @@ model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7765,7 +7765,7 @@ model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7781,7 +7781,7 @@ model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7797,7 +7797,7 @@ model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7813,7 +7813,7 @@ model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7829,7 +7829,7 @@ model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7845,7 +7845,7 @@ model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7861,7 +7861,7 @@ model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7877,7 +7877,7 @@ model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7893,7 +7893,7 @@ model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7909,7 +7909,7 @@ model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7925,7 +7925,7 @@ model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7941,7 +7941,7 @@ model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7957,7 +7957,7 @@ model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7973,7 +7973,7 @@ model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -7989,7 +7989,7 @@ model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8005,7 +8005,7 @@ model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8021,7 +8021,7 @@ model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8037,7 +8037,7 @@ model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8053,7 +8053,7 @@ model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8069,7 +8069,7 @@ model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8085,7 +8085,7 @@ model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8101,7 +8101,7 @@ model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8117,7 +8117,7 @@ model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8133,7 +8133,7 @@ model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8149,7 +8149,7 @@ model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8165,7 +8165,7 @@ model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8181,7 +8181,7 @@ model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8197,7 +8197,7 @@ model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8213,7 +8213,7 @@ model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8229,7 +8229,7 @@ model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8245,7 +8245,7 @@ model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8261,7 +8261,7 @@ model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8277,7 +8277,7 @@ model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8293,7 +8293,7 @@ model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8309,7 +8309,7 @@ model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8325,7 +8325,7 @@ model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8341,7 +8341,7 @@ model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8357,7 +8357,7 @@ model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8373,7 +8373,7 @@ model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8389,7 +8389,7 @@ model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8405,7 +8405,7 @@ model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8421,7 +8421,7 @@ model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8437,7 +8437,7 @@ model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8453,7 +8453,7 @@ model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8469,7 +8469,7 @@ model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8485,7 +8485,7 @@ model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8501,7 +8501,7 @@ model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8517,7 +8517,7 @@ model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8533,7 +8533,7 @@ model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8549,7 +8549,7 @@ model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8565,7 +8565,7 @@ model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8581,7 +8581,7 @@ model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8597,7 +8597,7 @@ model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8613,7 +8613,7 @@ model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8629,7 +8629,7 @@ model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8645,7 +8645,7 @@ model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8661,7 +8661,7 @@ model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8677,7 +8677,7 @@ model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8693,7 +8693,7 @@ model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8709,7 +8709,7 @@ model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8725,7 +8725,7 @@ model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8741,7 +8741,7 @@ model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8757,7 +8757,7 @@ model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8773,7 +8773,7 @@ model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8789,7 +8789,7 @@ model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8805,7 +8805,7 @@ model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8821,7 +8821,7 @@ model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo.f +#define FLD(f) abuf->fields.sfmt_emul.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8837,7 +8837,7 @@ model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8853,7 +8853,7 @@ model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8869,7 +8869,7 @@ model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8885,7 +8885,7 @@ model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8901,7 +8901,7 @@ model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8917,7 +8917,7 @@ model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8933,7 +8933,7 @@ model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8949,7 +8949,7 @@ model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8965,7 +8965,7 @@ model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8981,7 +8981,7 @@ model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -8997,7 +8997,7 @@ model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9013,7 +9013,7 @@ model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9029,7 +9029,7 @@ model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9045,7 +9045,7 @@ model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9061,7 +9061,7 @@ model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9077,7 +9077,7 @@ model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9093,7 +9093,7 @@ model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9109,7 +9109,7 @@ model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9125,7 +9125,7 @@ model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9141,7 +9141,7 @@ model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_b.f +#define FLD(f) abuf->fields.sfmt_bno.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9157,7 +9157,7 @@ model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9173,7 +9173,7 @@ model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9189,7 +9189,7 @@ model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9205,7 +9205,7 @@ model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9221,7 +9221,7 @@ model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9237,7 +9237,7 @@ model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9253,7 +9253,7 @@ model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9269,7 +9269,7 @@ model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9285,7 +9285,7 @@ model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9301,7 +9301,7 @@ model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_calls.f +#define FLD(f) abuf->fields.sfmt_emul2.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9317,7 +9317,7 @@ model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -9333,7 +9333,7 @@ model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg) static int model_i960CA_flushreg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_flushreg.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; diff --git a/sim/i960/sem-switch.c b/sim/i960/sem-switch.c index b45109fecd9..15f6b702ebc 100644 --- a/sim/i960/sem-switch.c +++ b/sim/i960/sem-switch.c @@ -334,11 +334,13 @@ with this program; if not, write to the Free Software Foundation, Inc., int i; for (i = 0; labels[i].label != 0; ++i) + { #if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; #else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; #endif + } #undef DEFINE_LABELS #endif /* DEFINE_LABELS */ @@ -458,12 +460,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) #if WITH_SCACHE_PBB_I960BASE #ifdef DEFINE_SWITCH vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -524,7 +526,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -543,7 +545,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -562,7 +564,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -581,7 +583,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -600,7 +602,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -619,7 +621,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -638,7 +640,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -657,7 +659,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -676,7 +678,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -695,7 +697,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -714,7 +716,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -733,7 +735,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -752,7 +754,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -771,7 +773,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -790,7 +792,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -809,7 +811,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -828,7 +830,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -847,7 +849,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -866,7 +868,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -885,7 +887,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -904,7 +906,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -923,7 +925,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -942,7 +944,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -961,7 +963,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -980,7 +982,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -999,7 +1001,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1018,7 +1020,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1037,7 +1039,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1056,7 +1058,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1075,7 +1077,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1094,7 +1096,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1113,7 +1115,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1132,7 +1134,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1151,7 +1153,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1170,7 +1172,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1189,7 +1191,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1208,7 +1210,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1227,7 +1229,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1246,7 +1248,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1265,7 +1267,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1284,7 +1286,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1303,7 +1305,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1322,7 +1324,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1341,7 +1343,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1360,7 +1362,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1379,7 +1381,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1398,7 +1400,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1417,7 +1419,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1436,7 +1438,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1455,7 +1457,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1474,7 +1476,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1493,7 +1495,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1512,7 +1514,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1531,7 +1533,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1550,7 +1552,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1569,7 +1571,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1588,7 +1590,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1607,7 +1609,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1626,7 +1628,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1645,7 +1647,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1664,7 +1666,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1683,7 +1685,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1702,7 +1704,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1721,7 +1723,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1740,7 +1742,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1759,7 +1761,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not1.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1778,7 +1780,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1797,7 +1799,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1816,7 +1818,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1835,7 +1837,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1854,7 +1856,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1873,7 +1875,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1892,7 +1894,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1911,7 +1913,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1930,7 +1932,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1949,7 +1951,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1968,7 +1970,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1987,7 +1989,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2006,7 +2008,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2025,7 +2027,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2044,7 +2046,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2063,7 +2065,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2082,7 +2084,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2101,7 +2103,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2120,7 +2122,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2139,7 +2141,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2158,7 +2160,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2177,7 +2179,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2196,7 +2198,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2215,7 +2217,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2234,7 +2236,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2253,7 +2255,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2272,7 +2274,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_emul.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2302,7 +2304,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_emul1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2332,7 +2334,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_emul2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2362,7 +2364,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_emul3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2392,7 +2394,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2411,7 +2413,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2430,7 +2432,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movl.f +#define FLD(f) abuf->fields.sfmt_movq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2460,7 +2462,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movl1.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2488,7 +2490,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movt.f +#define FLD(f) abuf->fields.sfmt_movq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2523,7 +2525,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movt1.f +#define FLD(f) abuf->fields.sfmt_movq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2556,7 +2558,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movq.f +#define FLD(f) abuf->fields.sfmt_movq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2596,7 +2598,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_movq1.f +#define FLD(f) abuf->fields.sfmt_movq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2634,7 +2636,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2653,7 +2655,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2672,7 +2674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2691,7 +2693,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2710,7 +2712,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2729,7 +2731,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2748,7 +2750,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2767,7 +2769,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2786,7 +2788,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2805,7 +2807,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2824,7 +2826,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2843,7 +2845,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2862,7 +2864,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2881,7 +2883,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2900,7 +2902,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2919,7 +2921,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2938,7 +2940,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2957,7 +2959,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -2976,7 +2978,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2995,7 +2997,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3014,7 +3016,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3033,7 +3035,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3052,7 +3054,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3071,7 +3073,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3090,7 +3092,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3109,7 +3111,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3128,7 +3130,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3147,7 +3149,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3166,7 +3168,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3185,7 +3187,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3204,7 +3206,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3223,7 +3225,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3242,7 +3244,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3261,7 +3263,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3280,7 +3282,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3299,7 +3301,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3318,7 +3320,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3337,7 +3339,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3356,7 +3358,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3375,7 +3377,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3394,7 +3396,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3413,7 +3415,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3432,7 +3434,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3451,7 +3453,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3470,7 +3472,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3489,7 +3491,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3508,7 +3510,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3527,7 +3529,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3546,7 +3548,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3565,7 +3567,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3584,7 +3586,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3614,7 +3616,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3644,7 +3646,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3674,7 +3676,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3704,7 +3706,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3734,7 +3736,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3764,7 +3766,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3794,7 +3796,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3824,7 +3826,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3859,7 +3861,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3894,7 +3896,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3929,7 +3931,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -3964,7 +3966,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -3999,7 +4001,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4034,7 +4036,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4069,7 +4071,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4104,7 +4106,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4144,7 +4146,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4184,7 +4186,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4224,7 +4226,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4264,7 +4266,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4304,7 +4306,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4344,7 +4346,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4384,7 +4386,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4424,7 +4426,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4443,7 +4445,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4462,7 +4464,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4481,7 +4483,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4500,7 +4502,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4519,7 +4521,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4538,7 +4540,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4557,7 +4559,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4576,7 +4578,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4595,7 +4597,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4614,7 +4616,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4633,7 +4635,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4652,7 +4654,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4671,7 +4673,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4690,7 +4692,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4709,7 +4711,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4728,7 +4730,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4747,7 +4749,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4766,7 +4768,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4785,7 +4787,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4804,7 +4806,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4823,7 +4825,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4842,7 +4844,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4861,7 +4863,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -4880,7 +4882,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4908,7 +4910,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4936,7 +4938,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4964,7 +4966,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -4992,7 +4994,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5020,7 +5022,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5048,7 +5050,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5076,7 +5078,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5104,7 +5106,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5137,7 +5139,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5170,7 +5172,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5203,7 +5205,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5236,7 +5238,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5269,7 +5271,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5302,7 +5304,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5335,7 +5337,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5368,7 +5370,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5406,7 +5408,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5444,7 +5446,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5482,7 +5484,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -5520,7 +5522,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5558,7 +5560,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5596,7 +5598,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5634,7 +5636,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 8); @@ -5672,7 +5674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5681,7 +5683,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5697,7 +5699,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5706,7 +5708,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5722,7 +5724,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5731,7 +5733,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5747,7 +5749,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5756,7 +5758,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5772,7 +5774,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5781,7 +5783,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5797,7 +5799,7 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5806,7 +5808,7 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5822,7 +5824,7 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5831,7 +5833,7 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5847,7 +5849,7 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5856,7 +5858,7 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5872,7 +5874,7 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5881,7 +5883,7 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5897,7 +5899,7 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5906,7 +5908,7 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5922,7 +5924,7 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5931,7 +5933,7 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5947,7 +5949,7 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5956,7 +5958,7 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5972,7 +5974,7 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -5981,7 +5983,7 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5997,7 +5999,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6006,7 +6008,7 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6022,7 +6024,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6031,7 +6033,7 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6047,7 +6049,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6056,7 +6058,7 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6072,7 +6074,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6081,7 +6083,7 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6097,7 +6099,7 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6106,7 +6108,7 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6122,7 +6124,7 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6131,7 +6133,7 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6147,7 +6149,7 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6156,7 +6158,7 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6172,7 +6174,7 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6181,7 +6183,7 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6197,7 +6199,7 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6206,7 +6208,7 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6222,7 +6224,7 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6231,7 +6233,7 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6247,7 +6249,7 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6256,7 +6258,7 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6272,7 +6274,7 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6281,7 +6283,7 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6297,7 +6299,7 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6306,7 +6308,7 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6322,7 +6324,7 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6331,7 +6333,7 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6347,7 +6349,7 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6356,7 +6358,7 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6372,7 +6374,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6391,7 +6393,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6410,7 +6412,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6429,7 +6431,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6448,7 +6450,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpo.f +#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6467,7 +6469,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6486,7 +6488,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6505,7 +6507,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6524,7 +6526,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6543,7 +6545,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6562,7 +6564,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6581,7 +6583,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6600,7 +6602,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6619,7 +6621,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6638,7 +6640,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6657,7 +6659,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -6676,7 +6678,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6685,7 +6687,7 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { if (EQSI (CPU (h_cc), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6701,7 +6703,7 @@ if (EQSI (CPU (h_cc), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6710,7 +6712,7 @@ if (EQSI (CPU (h_cc), 0)) { if (NESI (ANDSI (CPU (h_cc), 1), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6726,7 +6728,7 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6735,7 +6737,7 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) { if (NESI (ANDSI (CPU (h_cc), 2), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6751,7 +6753,7 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6760,7 +6762,7 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) { if (NESI (ANDSI (CPU (h_cc), 3), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6776,7 +6778,7 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6785,7 +6787,7 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) { if (NESI (ANDSI (CPU (h_cc), 4), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6801,7 +6803,7 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6810,7 +6812,7 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) { if (NESI (ANDSI (CPU (h_cc), 5), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6826,7 +6828,7 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6835,7 +6837,7 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) { if (NESI (ANDSI (CPU (h_cc), 6), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6851,7 +6853,7 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6860,7 +6862,7 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) { if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6876,7 +6878,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_b.f +#define FLD(f) abuf->fields.sfmt_bno.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6884,7 +6886,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6897,7 +6899,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6918,7 +6920,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6939,7 +6941,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6960,7 +6962,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -6968,7 +6970,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6981,7 +6983,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7002,7 +7004,7 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7034,7 +7036,7 @@ SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); { USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; @@ -7079,7 +7081,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7156,7 +7158,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7233,7 +7235,7 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7277,7 +7279,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_calls.f +#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7298,7 +7300,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -7319,7 +7321,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_flushreg.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); diff --git a/sim/i960/sem.c b/sim/i960/sem.c index 45f4f7f2f1f..7d5f28bddad 100644 --- a/sim/i960/sem.c +++ b/sim/i960/sem.c @@ -32,9 +32,20 @@ with this program; if not, write to the Free Software Foundation, Inc., #undef GET_ATTR #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) +/* This is used so that we can compile two copies of the semantic code, + one with full feature support and one without that runs fast(er). + FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ +#if FAST_P +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) +#undef TRACE_RESULT +#define TRACE_RESULT(cpu, abuf, name, type, val) +#else +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) +#endif + /* x-invalid: --invalid-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -59,7 +70,7 @@ SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-after: --after-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -80,7 +91,7 @@ SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-before: --before-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -101,7 +112,7 @@ SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-cti-chain: --cti-chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -114,12 +125,12 @@ SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) #if WITH_SCACHE_PBB_I960BASE #ifdef DEFINE_SWITCH vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -131,7 +142,7 @@ SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-chain: --chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -155,7 +166,7 @@ SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-begin: --begin-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -182,10 +193,10 @@ SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulo: mulo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -203,10 +214,10 @@ SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulo1: mulo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -224,10 +235,10 @@ SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulo2: mulo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -245,10 +256,10 @@ SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulo3: mulo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -266,10 +277,10 @@ SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remo: remo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -287,10 +298,10 @@ SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remo1: remo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -308,10 +319,10 @@ SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remo2: remo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -329,10 +340,10 @@ SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remo3: remo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -350,10 +361,10 @@ SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divo: divo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -371,10 +382,10 @@ SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divo1: divo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -392,10 +403,10 @@ SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divo2: divo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -413,10 +424,10 @@ SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divo3: divo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -434,10 +445,10 @@ SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remi: remi $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -455,10 +466,10 @@ SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remi1: remi $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -476,10 +487,10 @@ SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remi2: remi $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -497,10 +508,10 @@ SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* remi3: remi $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -518,10 +529,10 @@ SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divi: divi $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -539,10 +550,10 @@ SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divi1: divi $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -560,10 +571,10 @@ SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divi2: divi $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -581,10 +592,10 @@ SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* divi3: divi $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -602,10 +613,10 @@ SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addo: addo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -623,10 +634,10 @@ SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addo1: addo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -644,10 +655,10 @@ SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addo2: addo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -665,10 +676,10 @@ SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addo3: addo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -686,10 +697,10 @@ SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subo: subo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -707,10 +718,10 @@ SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subo1: subo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -728,10 +739,10 @@ SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subo2: subo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -749,10 +760,10 @@ SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subo3: subo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -770,10 +781,10 @@ SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notbit: notbit $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -791,10 +802,10 @@ SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notbit1: notbit $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -812,10 +823,10 @@ SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notbit2: notbit $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -833,10 +844,10 @@ SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notbit3: notbit $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -854,10 +865,10 @@ SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and: and $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -875,10 +886,10 @@ SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and1: and $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -896,10 +907,10 @@ SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and2: and $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -917,10 +928,10 @@ SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and3: and $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -938,10 +949,10 @@ SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andnot: andnot $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -959,10 +970,10 @@ SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andnot1: andnot $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -980,10 +991,10 @@ SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andnot2: andnot $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1001,10 +1012,10 @@ SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* andnot3: andnot $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1022,10 +1033,10 @@ SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* setbit: setbit $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1043,10 +1054,10 @@ SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* setbit1: setbit $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1064,10 +1075,10 @@ SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* setbit2: setbit $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1085,10 +1096,10 @@ SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* setbit3: setbit $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1106,10 +1117,10 @@ SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notand: notand $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1127,10 +1138,10 @@ SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notand1: notand $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1148,10 +1159,10 @@ SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notand2: notand $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1169,10 +1180,10 @@ SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* notand3: notand $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1190,10 +1201,10 @@ SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor: xor $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1211,10 +1222,10 @@ SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor1: xor $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1232,10 +1243,10 @@ SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor2: xor $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1253,10 +1264,10 @@ SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor3: xor $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1274,10 +1285,10 @@ SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or: or $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1295,10 +1306,10 @@ SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or1: or $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1316,10 +1327,10 @@ SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or2: or $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1337,10 +1348,10 @@ SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or3: or $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1358,10 +1369,10 @@ SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* nor: nor $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1379,10 +1390,10 @@ SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* nor1: nor $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1400,10 +1411,10 @@ SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* nor2: nor $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1421,10 +1432,10 @@ SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* nor3: nor $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1442,10 +1453,10 @@ SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xnor: xnor $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1463,10 +1474,10 @@ SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xnor1: xnor $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1484,10 +1495,10 @@ SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xnor2: xnor $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1505,10 +1516,10 @@ SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xnor3: xnor $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1526,10 +1537,10 @@ SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* not: not $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1547,10 +1558,10 @@ SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* not1: not $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not1.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1568,10 +1579,10 @@ SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* not2: not $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1589,10 +1600,10 @@ SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* not3: not $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1610,10 +1621,10 @@ SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ornot: ornot $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1631,10 +1642,10 @@ SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ornot1: ornot $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1652,10 +1663,10 @@ SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ornot2: ornot $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1673,10 +1684,10 @@ SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ornot3: ornot $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1694,10 +1705,10 @@ SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* clrbit: clrbit $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1715,10 +1726,10 @@ SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* clrbit1: clrbit $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1736,10 +1747,10 @@ SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* clrbit2: clrbit $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1757,10 +1768,10 @@ SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* clrbit3: clrbit $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_notbit3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1778,10 +1789,10 @@ SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shlo: shlo $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1799,10 +1810,10 @@ SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shlo1: shlo $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1820,10 +1831,10 @@ SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shlo2: shlo $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1841,10 +1852,10 @@ SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shlo3: shlo $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1862,10 +1873,10 @@ SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shro: shro $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1883,10 +1894,10 @@ SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shro1: shro $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1904,10 +1915,10 @@ SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shro2: shro $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1925,10 +1936,10 @@ SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shro3: shro $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1946,10 +1957,10 @@ SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shli: shli $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1967,10 +1978,10 @@ SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shli1: shli $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1988,10 +1999,10 @@ SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shli2: shli $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2009,10 +2020,10 @@ SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shli3: shli $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2030,10 +2041,10 @@ SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shri: shri $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2051,10 +2062,10 @@ SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shri1: shri $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2072,10 +2083,10 @@ SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shri2: shri $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2093,10 +2104,10 @@ SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* shri3: shri $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_shlo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2114,10 +2125,10 @@ SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* emul: emul $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_emul.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2146,10 +2157,10 @@ SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* emul1: emul $lit1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_emul1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2178,10 +2189,10 @@ SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* emul2: emul $src1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_emul2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2210,10 +2221,10 @@ SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* emul3: emul $lit1, $lit2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_emul3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2242,10 +2253,10 @@ SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mov: mov $src1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2263,10 +2274,10 @@ SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mov1: mov $lit1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_not3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2284,10 +2295,10 @@ SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movl: movl $src1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movl.f +#define FLD(f) abuf->fields.sfmt_movq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2316,10 +2327,10 @@ SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movl1: movl $lit1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movl1.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2346,10 +2357,10 @@ SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movt: movt $src1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movt.f +#define FLD(f) abuf->fields.sfmt_movq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2383,10 +2394,10 @@ SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movt1: movt $lit1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movt1.f +#define FLD(f) abuf->fields.sfmt_movq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2418,10 +2429,10 @@ SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movq: movq $src1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movq.f +#define FLD(f) abuf->fields.sfmt_movq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2460,10 +2471,10 @@ SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* movq1: movq $lit1, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_movq1.f +#define FLD(f) abuf->fields.sfmt_movq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2500,10 +2511,10 @@ SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* modpc: modpc $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2521,10 +2532,10 @@ SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* modac: modac $src1, $src2, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_modpc.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2542,10 +2553,10 @@ SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-offset: lda $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2563,10 +2574,10 @@ SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-indirect-offset: lda $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2584,10 +2595,10 @@ SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* lda-indirect: lda ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2605,10 +2616,10 @@ SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-indirect-index: lda ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2626,10 +2637,10 @@ SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* lda-disp: lda $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2647,10 +2658,10 @@ SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-indirect-disp: lda $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2668,10 +2679,10 @@ SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-index-disp: lda $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2689,10 +2700,10 @@ SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lda-indirect-index-disp: lda $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2710,10 +2721,10 @@ SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* ld-offset: ld $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2731,10 +2742,10 @@ SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-indirect-offset: ld $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2752,10 +2763,10 @@ SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ld-indirect: ld ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2773,10 +2784,10 @@ SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-indirect-index: ld ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2794,10 +2805,10 @@ SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-disp: ld $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2815,10 +2826,10 @@ SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-indirect-disp: ld $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2836,10 +2847,10 @@ SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-index-disp: ld $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2857,10 +2868,10 @@ SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-indirect-index-disp: ld $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2878,10 +2889,10 @@ SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem /* ldob-offset: ldob $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2899,10 +2910,10 @@ SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldob-indirect-offset: ldob $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2920,10 +2931,10 @@ SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* ldob-indirect: ldob ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2941,10 +2952,10 @@ SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldob-indirect-index: ldob ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2962,10 +2973,10 @@ SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldob-disp: ldob $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2983,10 +2994,10 @@ SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldob-indirect-disp: ldob $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3004,10 +3015,10 @@ SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldob-index-disp: ldob $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3025,10 +3036,10 @@ SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldob-indirect-index-disp: ldob $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3046,10 +3057,10 @@ SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* ldos-offset: ldos $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3067,10 +3078,10 @@ SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldos-indirect-offset: ldos $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3088,10 +3099,10 @@ SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* ldos-indirect: ldos ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3109,10 +3120,10 @@ SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldos-indirect-index: ldos ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3130,10 +3141,10 @@ SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldos-disp: ldos $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3151,10 +3162,10 @@ SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldos-indirect-disp: ldos $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3172,10 +3183,10 @@ SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldos-index-disp: ldos $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3193,10 +3204,10 @@ SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldos-indirect-index-disp: ldos $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3214,10 +3225,10 @@ SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* ldib-offset: ldib $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3235,10 +3246,10 @@ SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldib-indirect-offset: ldib $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3256,10 +3267,10 @@ SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* ldib-indirect: ldib ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3277,10 +3288,10 @@ SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldib-indirect-index: ldib ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3298,10 +3309,10 @@ SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldib-disp: ldib $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3319,10 +3330,10 @@ SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldib-indirect-disp: ldib $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3340,10 +3351,10 @@ SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldib-index-disp: ldib $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3361,10 +3372,10 @@ SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldib-indirect-index-disp: ldib $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3382,10 +3393,10 @@ SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* ldis-offset: ldis $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3403,10 +3414,10 @@ SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldis-indirect-offset: ldis $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3424,10 +3435,10 @@ SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* ldis-indirect: ldis ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3445,10 +3456,10 @@ SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldis-indirect-index: ldis ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3466,10 +3477,10 @@ SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldis-disp: ldis $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3487,10 +3498,10 @@ SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldis-indirect-disp: ldis $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3508,10 +3519,10 @@ SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldis-index-disp: ldis $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3529,10 +3540,10 @@ SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldis-indirect-index-disp: ldis $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3550,10 +3561,10 @@ SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* ldl-offset: ldl $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3582,10 +3593,10 @@ SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldl-indirect-offset: ldl $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3614,10 +3625,10 @@ SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldl-indirect: ldl ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3646,10 +3657,10 @@ SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldl-indirect-index: ldl ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3678,10 +3689,10 @@ SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldl-disp: ldl $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3710,10 +3721,10 @@ SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldl-indirect-disp: ldl $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3742,10 +3753,10 @@ SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldl-index-disp: ldl $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3774,10 +3785,10 @@ SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldl-indirect-index-disp: ldl $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3806,10 +3817,10 @@ SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* ldt-offset: ldt $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3843,10 +3854,10 @@ SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldt-indirect-offset: ldt $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3880,10 +3891,10 @@ SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldt-indirect: ldt ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3917,10 +3928,10 @@ SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldt-indirect-index: ldt ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3954,10 +3965,10 @@ SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldt-disp: ldt $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -3991,10 +4002,10 @@ SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldt-indirect-disp: ldt $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4028,10 +4039,10 @@ SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldt-index-disp: ldt $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4065,10 +4076,10 @@ SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldt-indirect-index-disp: ldt $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4102,10 +4113,10 @@ SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* ldq-offset: ldq $offset, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4144,10 +4155,10 @@ SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldq-indirect-offset: ldq $offset($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4186,10 +4197,10 @@ SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* ldq-indirect: ldq ($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4228,10 +4239,10 @@ SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldq-indirect-index: ldq ($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4270,10 +4281,10 @@ SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* ldq-disp: ldq $optdisp, $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4312,10 +4323,10 @@ SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldq-indirect-disp: ldq $optdisp($abase), $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4354,10 +4365,10 @@ SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldq-index-disp: ldq $optdisp[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4396,10 +4407,10 @@ SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldq-indirect-index-disp: ldq $optdisp($abase)[$index*S$scale], $dst */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4438,10 +4449,10 @@ SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* st-offset: st $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4459,10 +4470,10 @@ SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-indirect-offset: st $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4480,10 +4491,10 @@ SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* st-indirect: st $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4501,10 +4512,10 @@ SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-indirect-index: st $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4522,10 +4533,10 @@ SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-disp: st $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4543,10 +4554,10 @@ SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-indirect-disp: st $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4564,10 +4575,10 @@ SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-index-disp: st $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4585,10 +4596,10 @@ SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-indirect-index-disp: st $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4606,10 +4617,10 @@ SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem /* stob-offset: stob $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4627,10 +4638,10 @@ SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stob-indirect-offset: stob $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4648,10 +4659,10 @@ SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* stob-indirect: stob $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4669,10 +4680,10 @@ SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stob-indirect-index: stob $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4690,10 +4701,10 @@ SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* stob-disp: stob $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4711,10 +4722,10 @@ SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stob-indirect-disp: stob $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4732,10 +4743,10 @@ SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* stob-index-disp: stob $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4753,10 +4764,10 @@ SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stob-indirect-index-disp: stob $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4774,10 +4785,10 @@ SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* stos-offset: stos $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4795,10 +4806,10 @@ SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stos-indirect-offset: stos $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4816,10 +4827,10 @@ SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_a /* stos-indirect: stos $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4837,10 +4848,10 @@ SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stos-indirect-index: stos $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4858,10 +4869,10 @@ SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* stos-disp: stos $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4879,10 +4890,10 @@ SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stos-indirect-disp: stos $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4900,10 +4911,10 @@ SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* stos-index-disp: stos $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4921,10 +4932,10 @@ SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stos-indirect-index-disp: stos $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4942,10 +4953,10 @@ SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG s /* stl-offset: stl $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -4972,10 +4983,10 @@ SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stl-indirect-offset: stl $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5002,10 +5013,10 @@ SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* stl-indirect: stl $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5032,10 +5043,10 @@ SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stl-indirect-index: stl $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5062,10 +5073,10 @@ SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* stl-disp: stl $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5092,10 +5103,10 @@ SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stl-indirect-disp: stl $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5122,10 +5133,10 @@ SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stl-index-disp: stl $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5152,10 +5163,10 @@ SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stl-indirect-index-disp: stl $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5182,10 +5193,10 @@ SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* stt-offset: stt $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5217,10 +5228,10 @@ SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stt-indirect-offset: stt $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5252,10 +5263,10 @@ SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* stt-indirect: stt $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5287,10 +5298,10 @@ SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stt-indirect-index: stt $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5322,10 +5333,10 @@ SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* stt-disp: stt $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5357,10 +5368,10 @@ SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stt-indirect-disp: stt $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5392,10 +5403,10 @@ SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stt-index-disp: stt $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5427,10 +5438,10 @@ SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stt-indirect-index-disp: stt $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5462,10 +5473,10 @@ SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* stq-offset: stq $st_src, $offset */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5502,10 +5513,10 @@ SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stq-indirect-offset: stq $st_src, $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5542,10 +5553,10 @@ SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_ar /* stq-indirect: stq $st_src, ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5582,10 +5593,10 @@ SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stq-indirect-index: stq $st_src, ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5622,10 +5633,10 @@ SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* stq-disp: stq $st_src, $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5662,10 +5673,10 @@ SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stq-indirect-disp: stq $st_src, $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5702,10 +5713,10 @@ SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stq-index-disp: stq $st_src, $optdisp[$index*S$scale */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5742,10 +5753,10 @@ SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stq-indirect-index-disp: stq $st_src, $optdisp($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5782,10 +5793,10 @@ SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG se /* cmpobe-reg: cmpobe $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5795,7 +5806,7 @@ SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5809,10 +5820,10 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpobe-lit: cmpobe $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5822,7 +5833,7 @@ SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5836,10 +5847,10 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpobne-reg: cmpobne $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5849,7 +5860,7 @@ SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5863,10 +5874,10 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpobne-lit: cmpobne $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5876,7 +5887,7 @@ SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5890,10 +5901,10 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpobl-reg: cmpobl $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5903,7 +5914,7 @@ SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5917,10 +5928,10 @@ if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpobl-lit: cmpobl $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5930,7 +5941,7 @@ SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5944,10 +5955,10 @@ if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpoble-reg: cmpoble $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5957,7 +5968,7 @@ SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5971,10 +5982,10 @@ if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpoble-lit: cmpoble $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -5984,7 +5995,7 @@ SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -5998,10 +6009,10 @@ if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpobg-reg: cmpobg $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6011,7 +6022,7 @@ SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6025,10 +6036,10 @@ if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpobg-lit: cmpobg $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6038,7 +6049,7 @@ SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6052,10 +6063,10 @@ if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpobge-reg: cmpobge $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6065,7 +6076,7 @@ SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6079,10 +6090,10 @@ if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpobge-lit: cmpobge $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6092,7 +6103,7 @@ SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6106,10 +6117,10 @@ if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpibe-reg: cmpibe $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6119,7 +6130,7 @@ SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6133,10 +6144,10 @@ if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpibe-lit: cmpibe $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6146,7 +6157,7 @@ SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6160,10 +6171,10 @@ if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpibne-reg: cmpibne $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6173,7 +6184,7 @@ SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6187,10 +6198,10 @@ if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpibne-lit: cmpibne $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6200,7 +6211,7 @@ SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6214,10 +6225,10 @@ if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpibl-reg: cmpibl $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6227,7 +6238,7 @@ SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6241,10 +6252,10 @@ if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpibl-lit: cmpibl $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6254,7 +6265,7 @@ SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6268,10 +6279,10 @@ if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpible-reg: cmpible $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6281,7 +6292,7 @@ SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6295,10 +6306,10 @@ if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpible-lit: cmpible $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6308,7 +6319,7 @@ SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6322,10 +6333,10 @@ if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpibg-reg: cmpibg $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6335,7 +6346,7 @@ SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6349,10 +6360,10 @@ if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpibg-lit: cmpibg $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6362,7 +6373,7 @@ SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6376,10 +6387,10 @@ if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { /* cmpibge-reg: cmpibge $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6389,7 +6400,7 @@ SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6403,10 +6414,10 @@ if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { /* cmpibge-lit: cmpibge $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6416,7 +6427,7 @@ SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6430,10 +6441,10 @@ if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { /* bbc-reg: bbc $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6443,7 +6454,7 @@ SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6457,10 +6468,10 @@ if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { /* bbc-lit: bbc $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6470,7 +6481,7 @@ SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6484,10 +6495,10 @@ if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { /* bbs-reg: bbs $br_src1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f +#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6497,7 +6508,7 @@ SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6511,10 +6522,10 @@ if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { /* bbs-lit: bbs $br_lit1, $br_src2, $br_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f +#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6524,7 +6535,7 @@ SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { { USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6538,10 +6549,10 @@ if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { /* cmpi: cmpi $src1, $src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6559,10 +6570,10 @@ SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpi1: cmpi $lit1, $src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6580,10 +6591,10 @@ SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpi2: cmpi $src1, $lit2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6601,10 +6612,10 @@ SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpi3: cmpi $lit1, $lit2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6622,10 +6633,10 @@ SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpo: cmpo $src1, $src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo.f +#define FLD(f) abuf->fields.sfmt_emul.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6643,10 +6654,10 @@ SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpo1: cmpo $lit1, $src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo1.f +#define FLD(f) abuf->fields.sfmt_emul1.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6664,10 +6675,10 @@ SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpo2: cmpo $src1, $lit2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo2.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6685,10 +6696,10 @@ SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpo3: cmpo $lit1, $lit2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpo3.f +#define FLD(f) abuf->fields.sfmt_emul3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6706,10 +6717,10 @@ SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testno-reg: testno $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6727,10 +6738,10 @@ SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testg-reg: testg $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6748,10 +6759,10 @@ SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* teste-reg: teste $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6769,10 +6780,10 @@ SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testge-reg: testge $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6790,10 +6801,10 @@ SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testl-reg: testl $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6811,10 +6822,10 @@ SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testne-reg: testne $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6832,10 +6843,10 @@ SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testle-reg: testle $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6853,10 +6864,10 @@ SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* testo-reg: testo $br_src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_testno_reg.f +#define FLD(f) abuf->fields.sfmt_testno_reg.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6874,10 +6885,10 @@ SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bno: bno $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6887,7 +6898,7 @@ SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (CPU (h_cc), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6901,10 +6912,10 @@ if (EQSI (CPU (h_cc), 0)) { /* bg: bg $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6914,7 +6925,7 @@ SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 1), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6928,10 +6939,10 @@ if (NESI (ANDSI (CPU (h_cc), 1), 0)) { /* be: be $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6941,7 +6952,7 @@ SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 2), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6955,10 +6966,10 @@ if (NESI (ANDSI (CPU (h_cc), 2), 0)) { /* bge: bge $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6968,7 +6979,7 @@ SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 3), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -6982,10 +6993,10 @@ if (NESI (ANDSI (CPU (h_cc), 3), 0)) { /* bl: bl $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -6995,7 +7006,7 @@ SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 4), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7009,10 +7020,10 @@ if (NESI (ANDSI (CPU (h_cc), 4), 0)) { /* bne: bne $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7022,7 +7033,7 @@ SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 5), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7036,10 +7047,10 @@ if (NESI (ANDSI (CPU (h_cc), 5), 0)) { /* ble: ble $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7049,7 +7060,7 @@ SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 6), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7063,10 +7074,10 @@ if (NESI (ANDSI (CPU (h_cc), 6), 0)) { /* bo: bo $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bno.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7076,7 +7087,7 @@ SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (ANDSI (CPU (h_cc), 7), 0)) { { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7090,10 +7101,10 @@ if (NESI (ANDSI (CPU (h_cc), 7), 0)) { /* b: b $ctrl_disp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_b.f +#define FLD(f) abuf->fields.sfmt_bno.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7102,7 +7113,7 @@ SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7113,10 +7124,10 @@ SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bx-indirect-offset: bx $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7136,10 +7147,10 @@ SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg /* bx-indirect: bx ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7159,10 +7170,10 @@ SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bx-indirect-index: bx ($abase)[$index*S$scale] */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7182,10 +7193,10 @@ SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bx-disp: bx $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7194,7 +7205,7 @@ SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -7205,10 +7216,10 @@ SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bx-indirect-disp: bx $optdisp($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f +#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7228,10 +7239,10 @@ SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* callx-disp: callx $optdisp */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,callx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7264,7 +7275,7 @@ SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); { USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; @@ -7307,10 +7318,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; /* callx-indirect: callx ($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,callx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7386,10 +7397,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; /* callx-indirect-offset: callx $offset($abase) */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,callx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f +#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7465,10 +7476,10 @@ CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; /* ret: ret */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_ret.f +#define FLD(f) abuf->fields.sfmt_callx_disp.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7511,10 +7522,10 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31 /* calls: calls $src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_calls.f +#define FLD(f) abuf->fields.sfmt_emul2.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7534,10 +7545,10 @@ SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* fmark: fmark */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_fmark.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7557,10 +7568,10 @@ SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* flushreg: flushreg */ -SEM_PC +static SEM_PC SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_flushreg.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -7572,3 +7583,324 @@ do { } while (0); /*nop*/ #undef FLD } +/* Table of all semantic fns. */ + +static const struct sem_fn_desc sem_fns[] = { + { I960BASE_INSN_X_INVALID, SEM_FN_NAME (i960base,x_invalid) }, + { I960BASE_INSN_X_AFTER, SEM_FN_NAME (i960base,x_after) }, + { I960BASE_INSN_X_BEFORE, SEM_FN_NAME (i960base,x_before) }, + { I960BASE_INSN_X_CTI_CHAIN, SEM_FN_NAME (i960base,x_cti_chain) }, + { I960BASE_INSN_X_CHAIN, SEM_FN_NAME (i960base,x_chain) }, + { I960BASE_INSN_X_BEGIN, SEM_FN_NAME (i960base,x_begin) }, + { I960BASE_INSN_MULO, SEM_FN_NAME (i960base,mulo) }, + { I960BASE_INSN_MULO1, SEM_FN_NAME (i960base,mulo1) }, + { I960BASE_INSN_MULO2, SEM_FN_NAME (i960base,mulo2) }, + { I960BASE_INSN_MULO3, SEM_FN_NAME (i960base,mulo3) }, + { I960BASE_INSN_REMO, SEM_FN_NAME (i960base,remo) }, + { I960BASE_INSN_REMO1, SEM_FN_NAME (i960base,remo1) }, + { I960BASE_INSN_REMO2, SEM_FN_NAME (i960base,remo2) }, + { I960BASE_INSN_REMO3, SEM_FN_NAME (i960base,remo3) }, + { I960BASE_INSN_DIVO, SEM_FN_NAME (i960base,divo) }, + { I960BASE_INSN_DIVO1, SEM_FN_NAME (i960base,divo1) }, + { I960BASE_INSN_DIVO2, SEM_FN_NAME (i960base,divo2) }, + { I960BASE_INSN_DIVO3, SEM_FN_NAME (i960base,divo3) }, + { I960BASE_INSN_REMI, SEM_FN_NAME (i960base,remi) }, + { I960BASE_INSN_REMI1, SEM_FN_NAME (i960base,remi1) }, + { I960BASE_INSN_REMI2, SEM_FN_NAME (i960base,remi2) }, + { I960BASE_INSN_REMI3, SEM_FN_NAME (i960base,remi3) }, + { I960BASE_INSN_DIVI, SEM_FN_NAME (i960base,divi) }, + { I960BASE_INSN_DIVI1, SEM_FN_NAME (i960base,divi1) }, + { I960BASE_INSN_DIVI2, SEM_FN_NAME (i960base,divi2) }, + { I960BASE_INSN_DIVI3, SEM_FN_NAME (i960base,divi3) }, + { I960BASE_INSN_ADDO, SEM_FN_NAME (i960base,addo) }, + { I960BASE_INSN_ADDO1, SEM_FN_NAME (i960base,addo1) }, + { I960BASE_INSN_ADDO2, SEM_FN_NAME (i960base,addo2) }, + { I960BASE_INSN_ADDO3, SEM_FN_NAME (i960base,addo3) }, + { I960BASE_INSN_SUBO, SEM_FN_NAME (i960base,subo) }, + { I960BASE_INSN_SUBO1, SEM_FN_NAME (i960base,subo1) }, + { I960BASE_INSN_SUBO2, SEM_FN_NAME (i960base,subo2) }, + { I960BASE_INSN_SUBO3, SEM_FN_NAME (i960base,subo3) }, + { I960BASE_INSN_NOTBIT, SEM_FN_NAME (i960base,notbit) }, + { I960BASE_INSN_NOTBIT1, SEM_FN_NAME (i960base,notbit1) }, + { I960BASE_INSN_NOTBIT2, SEM_FN_NAME (i960base,notbit2) }, + { I960BASE_INSN_NOTBIT3, SEM_FN_NAME (i960base,notbit3) }, + { I960BASE_INSN_AND, SEM_FN_NAME (i960base,and) }, + { I960BASE_INSN_AND1, SEM_FN_NAME (i960base,and1) }, + { I960BASE_INSN_AND2, SEM_FN_NAME (i960base,and2) }, + { I960BASE_INSN_AND3, SEM_FN_NAME (i960base,and3) }, + { I960BASE_INSN_ANDNOT, SEM_FN_NAME (i960base,andnot) }, + { I960BASE_INSN_ANDNOT1, SEM_FN_NAME (i960base,andnot1) }, + { I960BASE_INSN_ANDNOT2, SEM_FN_NAME (i960base,andnot2) }, + { I960BASE_INSN_ANDNOT3, SEM_FN_NAME (i960base,andnot3) }, + { I960BASE_INSN_SETBIT, SEM_FN_NAME (i960base,setbit) }, + { I960BASE_INSN_SETBIT1, SEM_FN_NAME (i960base,setbit1) }, + { I960BASE_INSN_SETBIT2, SEM_FN_NAME (i960base,setbit2) }, + { I960BASE_INSN_SETBIT3, SEM_FN_NAME (i960base,setbit3) }, + { I960BASE_INSN_NOTAND, SEM_FN_NAME (i960base,notand) }, + { I960BASE_INSN_NOTAND1, SEM_FN_NAME (i960base,notand1) }, + { I960BASE_INSN_NOTAND2, SEM_FN_NAME (i960base,notand2) }, + { I960BASE_INSN_NOTAND3, SEM_FN_NAME (i960base,notand3) }, + { I960BASE_INSN_XOR, SEM_FN_NAME (i960base,xor) }, + { I960BASE_INSN_XOR1, SEM_FN_NAME (i960base,xor1) }, + { I960BASE_INSN_XOR2, SEM_FN_NAME (i960base,xor2) }, + { I960BASE_INSN_XOR3, SEM_FN_NAME (i960base,xor3) }, + { I960BASE_INSN_OR, SEM_FN_NAME (i960base,or) }, + { I960BASE_INSN_OR1, SEM_FN_NAME (i960base,or1) }, + { I960BASE_INSN_OR2, SEM_FN_NAME (i960base,or2) }, + { I960BASE_INSN_OR3, SEM_FN_NAME (i960base,or3) }, + { I960BASE_INSN_NOR, SEM_FN_NAME (i960base,nor) }, + { I960BASE_INSN_NOR1, SEM_FN_NAME (i960base,nor1) }, + { I960BASE_INSN_NOR2, SEM_FN_NAME (i960base,nor2) }, + { I960BASE_INSN_NOR3, SEM_FN_NAME (i960base,nor3) }, + { I960BASE_INSN_XNOR, SEM_FN_NAME (i960base,xnor) }, + { I960BASE_INSN_XNOR1, SEM_FN_NAME (i960base,xnor1) }, + { I960BASE_INSN_XNOR2, SEM_FN_NAME (i960base,xnor2) }, + { I960BASE_INSN_XNOR3, SEM_FN_NAME (i960base,xnor3) }, + { I960BASE_INSN_NOT, SEM_FN_NAME (i960base,not) }, + { I960BASE_INSN_NOT1, SEM_FN_NAME (i960base,not1) }, + { I960BASE_INSN_NOT2, SEM_FN_NAME (i960base,not2) }, + { I960BASE_INSN_NOT3, SEM_FN_NAME (i960base,not3) }, + { I960BASE_INSN_ORNOT, SEM_FN_NAME (i960base,ornot) }, + { I960BASE_INSN_ORNOT1, SEM_FN_NAME (i960base,ornot1) }, + { I960BASE_INSN_ORNOT2, SEM_FN_NAME (i960base,ornot2) }, + { I960BASE_INSN_ORNOT3, SEM_FN_NAME (i960base,ornot3) }, + { I960BASE_INSN_CLRBIT, SEM_FN_NAME (i960base,clrbit) }, + { I960BASE_INSN_CLRBIT1, SEM_FN_NAME (i960base,clrbit1) }, + { I960BASE_INSN_CLRBIT2, SEM_FN_NAME (i960base,clrbit2) }, + { I960BASE_INSN_CLRBIT3, SEM_FN_NAME (i960base,clrbit3) }, + { I960BASE_INSN_SHLO, SEM_FN_NAME (i960base,shlo) }, + { I960BASE_INSN_SHLO1, SEM_FN_NAME (i960base,shlo1) }, + { I960BASE_INSN_SHLO2, SEM_FN_NAME (i960base,shlo2) }, + { I960BASE_INSN_SHLO3, SEM_FN_NAME (i960base,shlo3) }, + { I960BASE_INSN_SHRO, SEM_FN_NAME (i960base,shro) }, + { I960BASE_INSN_SHRO1, SEM_FN_NAME (i960base,shro1) }, + { I960BASE_INSN_SHRO2, SEM_FN_NAME (i960base,shro2) }, + { I960BASE_INSN_SHRO3, SEM_FN_NAME (i960base,shro3) }, + { I960BASE_INSN_SHLI, SEM_FN_NAME (i960base,shli) }, + { I960BASE_INSN_SHLI1, SEM_FN_NAME (i960base,shli1) }, + { I960BASE_INSN_SHLI2, SEM_FN_NAME (i960base,shli2) }, + { I960BASE_INSN_SHLI3, SEM_FN_NAME (i960base,shli3) }, + { I960BASE_INSN_SHRI, SEM_FN_NAME (i960base,shri) }, + { I960BASE_INSN_SHRI1, SEM_FN_NAME (i960base,shri1) }, + { I960BASE_INSN_SHRI2, SEM_FN_NAME (i960base,shri2) }, + { I960BASE_INSN_SHRI3, SEM_FN_NAME (i960base,shri3) }, + { I960BASE_INSN_EMUL, SEM_FN_NAME (i960base,emul) }, + { I960BASE_INSN_EMUL1, SEM_FN_NAME (i960base,emul1) }, + { I960BASE_INSN_EMUL2, SEM_FN_NAME (i960base,emul2) }, + { I960BASE_INSN_EMUL3, SEM_FN_NAME (i960base,emul3) }, + { I960BASE_INSN_MOV, SEM_FN_NAME (i960base,mov) }, + { I960BASE_INSN_MOV1, SEM_FN_NAME (i960base,mov1) }, + { I960BASE_INSN_MOVL, SEM_FN_NAME (i960base,movl) }, + { I960BASE_INSN_MOVL1, SEM_FN_NAME (i960base,movl1) }, + { I960BASE_INSN_MOVT, SEM_FN_NAME (i960base,movt) }, + { I960BASE_INSN_MOVT1, SEM_FN_NAME (i960base,movt1) }, + { I960BASE_INSN_MOVQ, SEM_FN_NAME (i960base,movq) }, + { I960BASE_INSN_MOVQ1, SEM_FN_NAME (i960base,movq1) }, + { I960BASE_INSN_MODPC, SEM_FN_NAME (i960base,modpc) }, + { I960BASE_INSN_MODAC, SEM_FN_NAME (i960base,modac) }, + { I960BASE_INSN_LDA_OFFSET, SEM_FN_NAME (i960base,lda_offset) }, + { I960BASE_INSN_LDA_INDIRECT_OFFSET, SEM_FN_NAME (i960base,lda_indirect_offset) }, + { I960BASE_INSN_LDA_INDIRECT, SEM_FN_NAME (i960base,lda_indirect) }, + { I960BASE_INSN_LDA_INDIRECT_INDEX, SEM_FN_NAME (i960base,lda_indirect_index) }, + { I960BASE_INSN_LDA_DISP, SEM_FN_NAME (i960base,lda_disp) }, + { I960BASE_INSN_LDA_INDIRECT_DISP, SEM_FN_NAME (i960base,lda_indirect_disp) }, + { I960BASE_INSN_LDA_INDEX_DISP, SEM_FN_NAME (i960base,lda_index_disp) }, + { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,lda_indirect_index_disp) }, + { I960BASE_INSN_LD_OFFSET, SEM_FN_NAME (i960base,ld_offset) }, + { I960BASE_INSN_LD_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ld_indirect_offset) }, + { I960BASE_INSN_LD_INDIRECT, SEM_FN_NAME (i960base,ld_indirect) }, + { I960BASE_INSN_LD_INDIRECT_INDEX, SEM_FN_NAME (i960base,ld_indirect_index) }, + { I960BASE_INSN_LD_DISP, SEM_FN_NAME (i960base,ld_disp) }, + { I960BASE_INSN_LD_INDIRECT_DISP, SEM_FN_NAME (i960base,ld_indirect_disp) }, + { I960BASE_INSN_LD_INDEX_DISP, SEM_FN_NAME (i960base,ld_index_disp) }, + { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ld_indirect_index_disp) }, + { I960BASE_INSN_LDOB_OFFSET, SEM_FN_NAME (i960base,ldob_offset) }, + { I960BASE_INSN_LDOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldob_indirect_offset) }, + { I960BASE_INSN_LDOB_INDIRECT, SEM_FN_NAME (i960base,ldob_indirect) }, + { I960BASE_INSN_LDOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldob_indirect_index) }, + { I960BASE_INSN_LDOB_DISP, SEM_FN_NAME (i960base,ldob_disp) }, + { I960BASE_INSN_LDOB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldob_indirect_disp) }, + { I960BASE_INSN_LDOB_INDEX_DISP, SEM_FN_NAME (i960base,ldob_index_disp) }, + { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldob_indirect_index_disp) }, + { I960BASE_INSN_LDOS_OFFSET, SEM_FN_NAME (i960base,ldos_offset) }, + { I960BASE_INSN_LDOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldos_indirect_offset) }, + { I960BASE_INSN_LDOS_INDIRECT, SEM_FN_NAME (i960base,ldos_indirect) }, + { I960BASE_INSN_LDOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldos_indirect_index) }, + { I960BASE_INSN_LDOS_DISP, SEM_FN_NAME (i960base,ldos_disp) }, + { I960BASE_INSN_LDOS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldos_indirect_disp) }, + { I960BASE_INSN_LDOS_INDEX_DISP, SEM_FN_NAME (i960base,ldos_index_disp) }, + { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldos_indirect_index_disp) }, + { I960BASE_INSN_LDIB_OFFSET, SEM_FN_NAME (i960base,ldib_offset) }, + { I960BASE_INSN_LDIB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldib_indirect_offset) }, + { I960BASE_INSN_LDIB_INDIRECT, SEM_FN_NAME (i960base,ldib_indirect) }, + { I960BASE_INSN_LDIB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldib_indirect_index) }, + { I960BASE_INSN_LDIB_DISP, SEM_FN_NAME (i960base,ldib_disp) }, + { I960BASE_INSN_LDIB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldib_indirect_disp) }, + { I960BASE_INSN_LDIB_INDEX_DISP, SEM_FN_NAME (i960base,ldib_index_disp) }, + { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldib_indirect_index_disp) }, + { I960BASE_INSN_LDIS_OFFSET, SEM_FN_NAME (i960base,ldis_offset) }, + { I960BASE_INSN_LDIS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldis_indirect_offset) }, + { I960BASE_INSN_LDIS_INDIRECT, SEM_FN_NAME (i960base,ldis_indirect) }, + { I960BASE_INSN_LDIS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldis_indirect_index) }, + { I960BASE_INSN_LDIS_DISP, SEM_FN_NAME (i960base,ldis_disp) }, + { I960BASE_INSN_LDIS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldis_indirect_disp) }, + { I960BASE_INSN_LDIS_INDEX_DISP, SEM_FN_NAME (i960base,ldis_index_disp) }, + { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldis_indirect_index_disp) }, + { I960BASE_INSN_LDL_OFFSET, SEM_FN_NAME (i960base,ldl_offset) }, + { I960BASE_INSN_LDL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldl_indirect_offset) }, + { I960BASE_INSN_LDL_INDIRECT, SEM_FN_NAME (i960base,ldl_indirect) }, + { I960BASE_INSN_LDL_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldl_indirect_index) }, + { I960BASE_INSN_LDL_DISP, SEM_FN_NAME (i960base,ldl_disp) }, + { I960BASE_INSN_LDL_INDIRECT_DISP, SEM_FN_NAME (i960base,ldl_indirect_disp) }, + { I960BASE_INSN_LDL_INDEX_DISP, SEM_FN_NAME (i960base,ldl_index_disp) }, + { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldl_indirect_index_disp) }, + { I960BASE_INSN_LDT_OFFSET, SEM_FN_NAME (i960base,ldt_offset) }, + { I960BASE_INSN_LDT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldt_indirect_offset) }, + { I960BASE_INSN_LDT_INDIRECT, SEM_FN_NAME (i960base,ldt_indirect) }, + { I960BASE_INSN_LDT_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldt_indirect_index) }, + { I960BASE_INSN_LDT_DISP, SEM_FN_NAME (i960base,ldt_disp) }, + { I960BASE_INSN_LDT_INDIRECT_DISP, SEM_FN_NAME (i960base,ldt_indirect_disp) }, + { I960BASE_INSN_LDT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_index_disp) }, + { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_indirect_index_disp) }, + { I960BASE_INSN_LDQ_OFFSET, SEM_FN_NAME (i960base,ldq_offset) }, + { I960BASE_INSN_LDQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldq_indirect_offset) }, + { I960BASE_INSN_LDQ_INDIRECT, SEM_FN_NAME (i960base,ldq_indirect) }, + { I960BASE_INSN_LDQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldq_indirect_index) }, + { I960BASE_INSN_LDQ_DISP, SEM_FN_NAME (i960base,ldq_disp) }, + { I960BASE_INSN_LDQ_INDIRECT_DISP, SEM_FN_NAME (i960base,ldq_indirect_disp) }, + { I960BASE_INSN_LDQ_INDEX_DISP, SEM_FN_NAME (i960base,ldq_index_disp) }, + { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldq_indirect_index_disp) }, + { I960BASE_INSN_ST_OFFSET, SEM_FN_NAME (i960base,st_offset) }, + { I960BASE_INSN_ST_INDIRECT_OFFSET, SEM_FN_NAME (i960base,st_indirect_offset) }, + { I960BASE_INSN_ST_INDIRECT, SEM_FN_NAME (i960base,st_indirect) }, + { I960BASE_INSN_ST_INDIRECT_INDEX, SEM_FN_NAME (i960base,st_indirect_index) }, + { I960BASE_INSN_ST_DISP, SEM_FN_NAME (i960base,st_disp) }, + { I960BASE_INSN_ST_INDIRECT_DISP, SEM_FN_NAME (i960base,st_indirect_disp) }, + { I960BASE_INSN_ST_INDEX_DISP, SEM_FN_NAME (i960base,st_index_disp) }, + { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,st_indirect_index_disp) }, + { I960BASE_INSN_STOB_OFFSET, SEM_FN_NAME (i960base,stob_offset) }, + { I960BASE_INSN_STOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stob_indirect_offset) }, + { I960BASE_INSN_STOB_INDIRECT, SEM_FN_NAME (i960base,stob_indirect) }, + { I960BASE_INSN_STOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,stob_indirect_index) }, + { I960BASE_INSN_STOB_DISP, SEM_FN_NAME (i960base,stob_disp) }, + { I960BASE_INSN_STOB_INDIRECT_DISP, SEM_FN_NAME (i960base,stob_indirect_disp) }, + { I960BASE_INSN_STOB_INDEX_DISP, SEM_FN_NAME (i960base,stob_index_disp) }, + { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stob_indirect_index_disp) }, + { I960BASE_INSN_STOS_OFFSET, SEM_FN_NAME (i960base,stos_offset) }, + { I960BASE_INSN_STOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stos_indirect_offset) }, + { I960BASE_INSN_STOS_INDIRECT, SEM_FN_NAME (i960base,stos_indirect) }, + { I960BASE_INSN_STOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,stos_indirect_index) }, + { I960BASE_INSN_STOS_DISP, SEM_FN_NAME (i960base,stos_disp) }, + { I960BASE_INSN_STOS_INDIRECT_DISP, SEM_FN_NAME (i960base,stos_indirect_disp) }, + { I960BASE_INSN_STOS_INDEX_DISP, SEM_FN_NAME (i960base,stos_index_disp) }, + { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stos_indirect_index_disp) }, + { I960BASE_INSN_STL_OFFSET, SEM_FN_NAME (i960base,stl_offset) }, + { I960BASE_INSN_STL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stl_indirect_offset) }, + { I960BASE_INSN_STL_INDIRECT, SEM_FN_NAME (i960base,stl_indirect) }, + { I960BASE_INSN_STL_INDIRECT_INDEX, SEM_FN_NAME (i960base,stl_indirect_index) }, + { I960BASE_INSN_STL_DISP, SEM_FN_NAME (i960base,stl_disp) }, + { I960BASE_INSN_STL_INDIRECT_DISP, SEM_FN_NAME (i960base,stl_indirect_disp) }, + { I960BASE_INSN_STL_INDEX_DISP, SEM_FN_NAME (i960base,stl_index_disp) }, + { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stl_indirect_index_disp) }, + { I960BASE_INSN_STT_OFFSET, SEM_FN_NAME (i960base,stt_offset) }, + { I960BASE_INSN_STT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stt_indirect_offset) }, + { I960BASE_INSN_STT_INDIRECT, SEM_FN_NAME (i960base,stt_indirect) }, + { I960BASE_INSN_STT_INDIRECT_INDEX, SEM_FN_NAME (i960base,stt_indirect_index) }, + { I960BASE_INSN_STT_DISP, SEM_FN_NAME (i960base,stt_disp) }, + { I960BASE_INSN_STT_INDIRECT_DISP, SEM_FN_NAME (i960base,stt_indirect_disp) }, + { I960BASE_INSN_STT_INDEX_DISP, SEM_FN_NAME (i960base,stt_index_disp) }, + { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stt_indirect_index_disp) }, + { I960BASE_INSN_STQ_OFFSET, SEM_FN_NAME (i960base,stq_offset) }, + { I960BASE_INSN_STQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stq_indirect_offset) }, + { I960BASE_INSN_STQ_INDIRECT, SEM_FN_NAME (i960base,stq_indirect) }, + { I960BASE_INSN_STQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,stq_indirect_index) }, + { I960BASE_INSN_STQ_DISP, SEM_FN_NAME (i960base,stq_disp) }, + { I960BASE_INSN_STQ_INDIRECT_DISP, SEM_FN_NAME (i960base,stq_indirect_disp) }, + { I960BASE_INSN_STQ_INDEX_DISP, SEM_FN_NAME (i960base,stq_index_disp) }, + { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stq_indirect_index_disp) }, + { I960BASE_INSN_CMPOBE_REG, SEM_FN_NAME (i960base,cmpobe_reg) }, + { I960BASE_INSN_CMPOBE_LIT, SEM_FN_NAME (i960base,cmpobe_lit) }, + { I960BASE_INSN_CMPOBNE_REG, SEM_FN_NAME (i960base,cmpobne_reg) }, + { I960BASE_INSN_CMPOBNE_LIT, SEM_FN_NAME (i960base,cmpobne_lit) }, + { I960BASE_INSN_CMPOBL_REG, SEM_FN_NAME (i960base,cmpobl_reg) }, + { I960BASE_INSN_CMPOBL_LIT, SEM_FN_NAME (i960base,cmpobl_lit) }, + { I960BASE_INSN_CMPOBLE_REG, SEM_FN_NAME (i960base,cmpoble_reg) }, + { I960BASE_INSN_CMPOBLE_LIT, SEM_FN_NAME (i960base,cmpoble_lit) }, + { I960BASE_INSN_CMPOBG_REG, SEM_FN_NAME (i960base,cmpobg_reg) }, + { I960BASE_INSN_CMPOBG_LIT, SEM_FN_NAME (i960base,cmpobg_lit) }, + { I960BASE_INSN_CMPOBGE_REG, SEM_FN_NAME (i960base,cmpobge_reg) }, + { I960BASE_INSN_CMPOBGE_LIT, SEM_FN_NAME (i960base,cmpobge_lit) }, + { I960BASE_INSN_CMPIBE_REG, SEM_FN_NAME (i960base,cmpibe_reg) }, + { I960BASE_INSN_CMPIBE_LIT, SEM_FN_NAME (i960base,cmpibe_lit) }, + { I960BASE_INSN_CMPIBNE_REG, SEM_FN_NAME (i960base,cmpibne_reg) }, + { I960BASE_INSN_CMPIBNE_LIT, SEM_FN_NAME (i960base,cmpibne_lit) }, + { I960BASE_INSN_CMPIBL_REG, SEM_FN_NAME (i960base,cmpibl_reg) }, + { I960BASE_INSN_CMPIBL_LIT, SEM_FN_NAME (i960base,cmpibl_lit) }, + { I960BASE_INSN_CMPIBLE_REG, SEM_FN_NAME (i960base,cmpible_reg) }, + { I960BASE_INSN_CMPIBLE_LIT, SEM_FN_NAME (i960base,cmpible_lit) }, + { I960BASE_INSN_CMPIBG_REG, SEM_FN_NAME (i960base,cmpibg_reg) }, + { I960BASE_INSN_CMPIBG_LIT, SEM_FN_NAME (i960base,cmpibg_lit) }, + { I960BASE_INSN_CMPIBGE_REG, SEM_FN_NAME (i960base,cmpibge_reg) }, + { I960BASE_INSN_CMPIBGE_LIT, SEM_FN_NAME (i960base,cmpibge_lit) }, + { I960BASE_INSN_BBC_REG, SEM_FN_NAME (i960base,bbc_reg) }, + { I960BASE_INSN_BBC_LIT, SEM_FN_NAME (i960base,bbc_lit) }, + { I960BASE_INSN_BBS_REG, SEM_FN_NAME (i960base,bbs_reg) }, + { I960BASE_INSN_BBS_LIT, SEM_FN_NAME (i960base,bbs_lit) }, + { I960BASE_INSN_CMPI, SEM_FN_NAME (i960base,cmpi) }, + { I960BASE_INSN_CMPI1, SEM_FN_NAME (i960base,cmpi1) }, + { I960BASE_INSN_CMPI2, SEM_FN_NAME (i960base,cmpi2) }, + { I960BASE_INSN_CMPI3, SEM_FN_NAME (i960base,cmpi3) }, + { I960BASE_INSN_CMPO, SEM_FN_NAME (i960base,cmpo) }, + { I960BASE_INSN_CMPO1, SEM_FN_NAME (i960base,cmpo1) }, + { I960BASE_INSN_CMPO2, SEM_FN_NAME (i960base,cmpo2) }, + { I960BASE_INSN_CMPO3, SEM_FN_NAME (i960base,cmpo3) }, + { I960BASE_INSN_TESTNO_REG, SEM_FN_NAME (i960base,testno_reg) }, + { I960BASE_INSN_TESTG_REG, SEM_FN_NAME (i960base,testg_reg) }, + { I960BASE_INSN_TESTE_REG, SEM_FN_NAME (i960base,teste_reg) }, + { I960BASE_INSN_TESTGE_REG, SEM_FN_NAME (i960base,testge_reg) }, + { I960BASE_INSN_TESTL_REG, SEM_FN_NAME (i960base,testl_reg) }, + { I960BASE_INSN_TESTNE_REG, SEM_FN_NAME (i960base,testne_reg) }, + { I960BASE_INSN_TESTLE_REG, SEM_FN_NAME (i960base,testle_reg) }, + { I960BASE_INSN_TESTO_REG, SEM_FN_NAME (i960base,testo_reg) }, + { I960BASE_INSN_BNO, SEM_FN_NAME (i960base,bno) }, + { I960BASE_INSN_BG, SEM_FN_NAME (i960base,bg) }, + { I960BASE_INSN_BE, SEM_FN_NAME (i960base,be) }, + { I960BASE_INSN_BGE, SEM_FN_NAME (i960base,bge) }, + { I960BASE_INSN_BL, SEM_FN_NAME (i960base,bl) }, + { I960BASE_INSN_BNE, SEM_FN_NAME (i960base,bne) }, + { I960BASE_INSN_BLE, SEM_FN_NAME (i960base,ble) }, + { I960BASE_INSN_BO, SEM_FN_NAME (i960base,bo) }, + { I960BASE_INSN_B, SEM_FN_NAME (i960base,b) }, + { I960BASE_INSN_BX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,bx_indirect_offset) }, + { I960BASE_INSN_BX_INDIRECT, SEM_FN_NAME (i960base,bx_indirect) }, + { I960BASE_INSN_BX_INDIRECT_INDEX, SEM_FN_NAME (i960base,bx_indirect_index) }, + { I960BASE_INSN_BX_DISP, SEM_FN_NAME (i960base,bx_disp) }, + { I960BASE_INSN_BX_INDIRECT_DISP, SEM_FN_NAME (i960base,bx_indirect_disp) }, + { I960BASE_INSN_CALLX_DISP, SEM_FN_NAME (i960base,callx_disp) }, + { I960BASE_INSN_CALLX_INDIRECT, SEM_FN_NAME (i960base,callx_indirect) }, + { I960BASE_INSN_CALLX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,callx_indirect_offset) }, + { I960BASE_INSN_RET, SEM_FN_NAME (i960base,ret) }, + { I960BASE_INSN_CALLS, SEM_FN_NAME (i960base,calls) }, + { I960BASE_INSN_FMARK, SEM_FN_NAME (i960base,fmark) }, + { I960BASE_INSN_FLUSHREG, SEM_FN_NAME (i960base,flushreg) }, + { 0, 0 } +}; + +/* Add the semantic fns to IDESC_TABLE. */ + +void +SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu) +{ + IDESC *idesc_table = CPU_IDESC (current_cpu); + const struct sem_fn_desc *sf; + + for (sf = &sem_fns[0]; sf->fn != 0; ++sf) + { +#if FAST_P + idesc_table[sf->index].sem_fast = sf->fn; +#else + idesc_table[sf->index].sem_full = sf->fn; +#endif + } +} + diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 2202b86189c..1f7f3d43e7d 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,12 @@ +1999-08-09 Doug Evans <devans@casey.cygnus.com> + + * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. + +1999-08-04 Doug Evans <devans@casey.cygnus.com> + + * m32r-sim.h (SEM_SKIP_INSN): Delete. + * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. + 1999-05-08 Felix Lee <flee@cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h index 6ebe19999d3..fa475d57503 100644 --- a/sim/m32r/cpu.h +++ b/sim/m32r/cpu.h @@ -117,317 +117,109 @@ typedef struct { int empty; } MODEL_TEST_DATA; +/* Instruction argument buffer. */ + union sem_fields { - struct { /* empty sformat for unspecified field list */ - int empty; - } fmt_empty; - struct { /* e.g. add $dr,$sr */ - SI * i_dr; - SI * i_sr; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_add; - struct { /* e.g. add3 $dr,$sr,$hash$slo16 */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_add3; - struct { /* e.g. and3 $dr,$sr,$uimm16 */ - UINT f_uimm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_and3; - struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */ - UINT f_uimm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_or3; - struct { /* e.g. addi $dr,$simm8 */ - INT f_simm8; - SI * i_dr; - unsigned char in_dr; - unsigned char out_dr; - } fmt_addi; - struct { /* e.g. addv $dr,$sr */ - SI * i_dr; - SI * i_sr; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_addv; - struct { /* e.g. addv3 $dr,$sr,$simm16 */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_addv3; - struct { /* e.g. addx $dr,$sr */ - SI * i_dr; - SI * i_sr; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_addx; - struct { /* e.g. cmp $src1,$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_cmp; - struct { /* e.g. cmpi $src2,$simm16 */ - INT f_simm16; - SI * i_src2; - unsigned char in_src2; - } fmt_cmpi; - struct { /* e.g. div $dr,$sr */ - SI * i_dr; - SI * i_sr; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_div; - struct { /* e.g. ld $dr,@$sr */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ld; - struct { /* e.g. ld $dr,@($slo16,$sr) */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ld_d; - struct { /* e.g. ldb $dr,@$sr */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ldb; - struct { /* e.g. ldb $dr,@($slo16,$sr) */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ldb_d; - struct { /* e.g. ldh $dr,@$sr */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ldh; - struct { /* e.g. ldh $dr,@($slo16,$sr) */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_ldh_d; - struct { /* e.g. ld $dr,@$sr+ */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - unsigned char out_sr; - } fmt_ld_plus; - struct { /* e.g. ld24 $dr,$uimm24 */ - ADDR i_uimm24; - SI * i_dr; - unsigned char out_dr; - } fmt_ld24; - struct { /* e.g. ldi8 $dr,$simm8 */ - INT f_simm8; - SI * i_dr; - unsigned char out_dr; - } fmt_ldi8; - struct { /* e.g. ldi16 $dr,$hash$slo16 */ - INT f_simm16; - SI * i_dr; - unsigned char out_dr; - } fmt_ldi16; - struct { /* e.g. lock $dr,@$sr */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_lock; - struct { /* e.g. machi $src1,$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_machi; - struct { /* e.g. mulhi $src1,$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_mulhi; - struct { /* e.g. mv $dr,$sr */ - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_mv; - struct { /* e.g. mvfachi $dr */ - SI * i_dr; - unsigned char out_dr; - } fmt_mvfachi; - struct { /* e.g. mvfc $dr,$scr */ - UINT f_r2; - SI * i_dr; - unsigned char out_dr; - } fmt_mvfc; - struct { /* e.g. mvtachi $src1 */ - SI * i_src1; - unsigned char in_src1; - } fmt_mvtachi; - struct { /* e.g. mvtc $sr,$dcr */ - UINT f_r1; - SI * i_sr; - unsigned char in_sr; - } fmt_mvtc; - struct { /* e.g. nop */ - int empty; - } fmt_nop; - struct { /* e.g. rac */ - int empty; - } fmt_rac; - struct { /* e.g. seth $dr,$hash$hi16 */ - UINT f_hi16; - SI * i_dr; - unsigned char out_dr; - } fmt_seth; - struct { /* e.g. sll3 $dr,$sr,$simm16 */ - INT f_simm16; - SI * i_sr; - SI * i_dr; - unsigned char in_sr; - unsigned char out_dr; - } fmt_sll3; - struct { /* e.g. slli $dr,$uimm5 */ - UINT f_uimm5; - SI * i_dr; - unsigned char in_dr; - unsigned char out_dr; - } fmt_slli; - struct { /* e.g. st $src1,@$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_st; - struct { /* e.g. st $src1,@($slo16,$src2) */ - INT f_simm16; - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_st_d; - struct { /* e.g. stb $src1,@$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_stb; - struct { /* e.g. stb $src1,@($slo16,$src2) */ - INT f_simm16; - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_stb_d; - struct { /* e.g. sth $src1,@$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_sth; - struct { /* e.g. sth $src1,@($slo16,$src2) */ - INT f_simm16; - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_sth_d; - struct { /* e.g. st $src1,@+$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_src2; - } fmt_st_plus; - struct { /* e.g. unlock $src1,@$src2 */ - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_unlock; - /* cti insns, kept separately so addr_cache is in fixed place */ - struct { - union { - struct { /* e.g. bc.s $disp8 */ - IADDR i_disp8; - } fmt_bc8; - struct { /* e.g. bc.l $disp24 */ - IADDR i_disp24; - } fmt_bc24; - struct { /* e.g. beq $src1,$src2,$disp16 */ - IADDR i_disp16; - SI * i_src1; - SI * i_src2; - unsigned char in_src1; - unsigned char in_src2; - } fmt_beq; - struct { /* e.g. beqz $src2,$disp16 */ - IADDR i_disp16; - SI * i_src2; - unsigned char in_src2; - } fmt_beqz; - struct { /* e.g. bl.s $disp8 */ - IADDR i_disp8; - unsigned char out_h_gr_14; - } fmt_bl8; - struct { /* e.g. bl.l $disp24 */ - IADDR i_disp24; - unsigned char out_h_gr_14; - } fmt_bl24; - struct { /* e.g. bra.s $disp8 */ - IADDR i_disp8; - } fmt_bra8; - struct { /* e.g. bra.l $disp24 */ - IADDR i_disp24; - } fmt_bra24; - struct { /* e.g. jl $sr */ - SI * i_sr; - unsigned char in_sr; - unsigned char out_h_gr_14; - } fmt_jl; - struct { /* e.g. jmp $sr */ - SI * i_sr; - unsigned char in_sr; - } fmt_jmp; - struct { /* e.g. rte */ - int empty; - } fmt_rte; - struct { /* e.g. trap $uimm4 */ - UINT f_uimm4; - } fmt_trap; - } fields; -#if WITH_SCACHE_PBB - SEM_PC addr_cache; -#endif - } cti; + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + UINT f_uimm4; + } sfmt_trap; + struct { /* */ + IADDR i_disp24; + unsigned char out_h_gr_14; + } sfmt_bl24; + struct { /* */ + IADDR i_disp8; + unsigned char out_h_gr_14; + } sfmt_bl8; + struct { /* */ + SI* i_dr; + UINT f_hi16; + unsigned char out_dr; + } sfmt_seth; + struct { /* */ + SI* i_sr; + UINT f_r1; + unsigned char in_sr; + } sfmt_mvtc; + struct { /* */ + SI* i_dr; + UINT f_r2; + unsigned char out_dr; + } sfmt_mvfc; + struct { /* */ + ADDR i_uimm24; + SI* i_dr; + unsigned char out_dr; + } sfmt_ld24; + struct { /* */ + SI* i_sr; + unsigned char in_sr; + unsigned char out_h_gr_14; + } sfmt_jl; + struct { /* */ + SI* i_dr; + UINT f_uimm5; + unsigned char in_dr; + unsigned char out_dr; + } sfmt_slli; + struct { /* */ + SI* i_dr; + INT f_simm8; + unsigned char in_dr; + unsigned char out_dr; + } sfmt_addi; + struct { /* */ + SI* i_src1; + SI* i_src2; + unsigned char in_src1; + unsigned char in_src2; + unsigned char out_src2; + } sfmt_st_plus; + struct { /* */ + SI* i_src1; + SI* i_src2; + INT f_simm16; + unsigned char in_src1; + unsigned char in_src2; + } sfmt_st_d; + struct { /* */ + SI* i_dr; + SI* i_sr; + unsigned char in_sr; + unsigned char out_dr; + unsigned char out_sr; + } sfmt_ld_plus; + struct { /* */ + IADDR i_disp16; + SI* i_src1; + SI* i_src2; + unsigned char in_src1; + unsigned char in_src2; + } sfmt_beq; + struct { /* */ + SI* i_dr; + SI* i_sr; + UINT f_uimm16; + unsigned char in_sr; + unsigned char out_dr; + } sfmt_and3; + struct { /* */ + SI* i_dr; + SI* i_sr; + INT f_simm16; + unsigned char in_sr; + unsigned char out_dr; + } sfmt_add3; + struct { /* */ + SI* i_dr; + SI* i_sr; + unsigned char in_dr; + unsigned char in_sr; + unsigned char out_dr; + } sfmt_add; #if WITH_SCACHE_PBB /* Writeback handler. */ struct { @@ -449,6 +241,7 @@ union sem_fields { int insn_count; /* Next pbb to execute. */ SCACHE *next; + SCACHE *branch_target; } chain; #endif }; @@ -460,6 +253,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ union sem semantic; int written; @@ -480,13 +276,11 @@ struct scache { These define and assign the local vars that contain the insn's fields. */ #define EXTRACT_IFMT_EMPTY_VARS \ - /* Instruction fields. */ \ unsigned int length; #define EXTRACT_IFMT_EMPTY_CODE \ length = 0; \ #define EXTRACT_IFMT_ADD_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -494,13 +288,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ADD_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_ADD3_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -509,14 +302,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ADD3_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_AND3_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -525,14 +317,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_AND3_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_OR3_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -541,26 +332,24 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_OR3_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_ADDI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ INT f_simm8; \ unsigned int length; #define EXTRACT_IFMT_ADDI_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \ #define EXTRACT_IFMT_ADDV3_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -569,38 +358,35 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ADDV3_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_BC8_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ SI f_disp8; \ unsigned int length; #define EXTRACT_IFMT_BC8_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ #define EXTRACT_IFMT_BC24_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ SI f_disp24; \ unsigned int length; #define EXTRACT_IFMT_BC24_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ #define EXTRACT_IFMT_BEQ_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -609,14 +395,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_BEQ_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ #define EXTRACT_IFMT_BEQZ_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -625,14 +410,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_BEQZ_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ #define EXTRACT_IFMT_CMP_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -640,13 +424,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_CMP_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_CMPI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -655,14 +438,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_CMPI_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_DIV_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -671,14 +453,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_DIV_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_JL_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -686,25 +467,23 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_JL_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_LD24_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_uimm24; \ unsigned int length; #define EXTRACT_IFMT_LD24_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_uimm24 = EXTRACT_UINT (insn, 32, 8, 24); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \ #define EXTRACT_IFMT_LDI16_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -713,14 +492,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_LDI16_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_MVFACHI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -728,13 +506,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MVFACHI_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_MVFC_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -742,13 +519,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MVFC_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_MVTACHI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -756,13 +532,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MVTACHI_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_MVTC_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -770,13 +545,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_MVTC_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_NOP_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -784,13 +558,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_NOP_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ #define EXTRACT_IFMT_SETH_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -799,14 +572,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_SETH_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_hi16 = EXTRACT_UINT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_SLLI_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_shift_op2; \ @@ -814,13 +586,12 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_SLLI_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_shift_op2 = EXTRACT_UINT (insn, 16, 8, 3); \ - f_uimm5 = EXTRACT_UINT (insn, 16, 11, 5); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \ + f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \ #define EXTRACT_IFMT_ST_D_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -829,14 +600,13 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_ST_D_CODE \ length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ #define EXTRACT_IFMT_TRAP_VARS \ - /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ @@ -844,10 +614,10 @@ struct scache { unsigned int length; #define EXTRACT_IFMT_TRAP_CODE \ length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_uimm4 = EXTRACT_UINT (insn, 16, 12, 4); \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ /* Collection of various things for the trace handler to use. */ diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h index 3563f744a8f..3c91931bfa1 100644 --- a/sim/m32r/cpuall.h +++ b/sim/m32r/cpuall.h @@ -51,6 +51,9 @@ struct argbuf { const IDESC *idesc; char trace_p; char profile_p; + /* ??? Temporary hack for skip insns. */ + char skip_count; + char unused; /* cpu specific data follows */ }; #endif diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c index 8bac0ef9e83..2b6b77404fb 100644 --- a/sim/m32r/decode.c +++ b/sim/m32r/decode.c @@ -28,29 +28,6 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "sim-main.h" #include "sim-assert.h" -/* FIXME: Need to review choices for the following. */ - -#if WITH_SEM_SWITCH_FULL -#define FULL(fn) -#else -#define FULL(fn) CONCAT3 (m32rbf,_sem_,fn) , -#endif - -#if WITH_FAST -#if WITH_SEM_SWITCH_FAST -#define FAST(fn) -#else -#define FAST(fn) CONCAT3 (m32rbf,_semf_,fn) , /* f for fast */ -#endif -#else -#define FAST(fn) -#endif - -/* The INSN_ prefix is not here and is instead part of the `insn' argument - to avoid collisions with header files (e.g. `AND' in ansidecl.h). */ -#define IDX(insn) CONCAT2 (M32RBF_,insn) -#define TYPE(insn) CONCAT2 (M32R_,insn) - /* The instruction descriptor array. This is computed at runtime. Space for it is not malloc'd to save a teensy bit of cpu in the decoder. Moving it to malloc space is trivial @@ -63,124 +40,117 @@ static IDESC m32rbf_insn_data[M32RBF_INSN_MAX]; static const struct insn_sem m32rbf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) }, - { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) }, - { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) }, - { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) }, - { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) }, - { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) }, - { TYPE (INSN_ADD), IDX (INSN_ADD), FULL (add) FAST (add) }, - { TYPE (INSN_ADD3), IDX (INSN_ADD3), FULL (add3) FAST (add3) }, - { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) }, - { TYPE (INSN_AND3), IDX (INSN_AND3), FULL (and3) FAST (and3) }, - { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) }, - { TYPE (INSN_OR3), IDX (INSN_OR3), FULL (or3) FAST (or3) }, - { TYPE (INSN_XOR), IDX (INSN_XOR), FULL (xor) FAST (xor) }, - { TYPE (INSN_XOR3), IDX (INSN_XOR3), FULL (xor3) FAST (xor3) }, - { TYPE (INSN_ADDI), IDX (INSN_ADDI), FULL (addi) FAST (addi) }, - { TYPE (INSN_ADDV), IDX (INSN_ADDV), FULL (addv) FAST (addv) }, - { TYPE (INSN_ADDV3), IDX (INSN_ADDV3), FULL (addv3) FAST (addv3) }, - { TYPE (INSN_ADDX), IDX (INSN_ADDX), FULL (addx) FAST (addx) }, - { TYPE (INSN_BC8), IDX (INSN_BC8), FULL (bc8) FAST (bc8) }, - { TYPE (INSN_BC24), IDX (INSN_BC24), FULL (bc24) FAST (bc24) }, - { TYPE (INSN_BEQ), IDX (INSN_BEQ), FULL (beq) FAST (beq) }, - { TYPE (INSN_BEQZ), IDX (INSN_BEQZ), FULL (beqz) FAST (beqz) }, - { TYPE (INSN_BGEZ), IDX (INSN_BGEZ), FULL (bgez) FAST (bgez) }, - { TYPE (INSN_BGTZ), IDX (INSN_BGTZ), FULL (bgtz) FAST (bgtz) }, - { TYPE (INSN_BLEZ), IDX (INSN_BLEZ), FULL (blez) FAST (blez) }, - { TYPE (INSN_BLTZ), IDX (INSN_BLTZ), FULL (bltz) FAST (bltz) }, - { TYPE (INSN_BNEZ), IDX (INSN_BNEZ), FULL (bnez) FAST (bnez) }, - { TYPE (INSN_BL8), IDX (INSN_BL8), FULL (bl8) FAST (bl8) }, - { TYPE (INSN_BL24), IDX (INSN_BL24), FULL (bl24) FAST (bl24) }, - { TYPE (INSN_BNC8), IDX (INSN_BNC8), FULL (bnc8) FAST (bnc8) }, - { TYPE (INSN_BNC24), IDX (INSN_BNC24), FULL (bnc24) FAST (bnc24) }, - { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) }, - { TYPE (INSN_BRA8), IDX (INSN_BRA8), FULL (bra8) FAST (bra8) }, - { TYPE (INSN_BRA24), IDX (INSN_BRA24), FULL (bra24) FAST (bra24) }, - { TYPE (INSN_CMP), IDX (INSN_CMP), FULL (cmp) FAST (cmp) }, - { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) }, - { TYPE (INSN_CMPU), IDX (INSN_CMPU), FULL (cmpu) FAST (cmpu) }, - { TYPE (INSN_CMPUI), IDX (INSN_CMPUI), FULL (cmpui) FAST (cmpui) }, - { TYPE (INSN_DIV), IDX (INSN_DIV), FULL (div) FAST (div) }, - { TYPE (INSN_DIVU), IDX (INSN_DIVU), FULL (divu) FAST (divu) }, - { TYPE (INSN_REM), IDX (INSN_REM), FULL (rem) FAST (rem) }, - { TYPE (INSN_REMU), IDX (INSN_REMU), FULL (remu) FAST (remu) }, - { TYPE (INSN_JL), IDX (INSN_JL), FULL (jl) FAST (jl) }, - { TYPE (INSN_JMP), IDX (INSN_JMP), FULL (jmp) FAST (jmp) }, - { TYPE (INSN_LD), IDX (INSN_LD), FULL (ld) FAST (ld) }, - { TYPE (INSN_LD_D), IDX (INSN_LD_D), FULL (ld_d) FAST (ld_d) }, - { TYPE (INSN_LDB), IDX (INSN_LDB), FULL (ldb) FAST (ldb) }, - { TYPE (INSN_LDB_D), IDX (INSN_LDB_D), FULL (ldb_d) FAST (ldb_d) }, - { TYPE (INSN_LDH), IDX (INSN_LDH), FULL (ldh) FAST (ldh) }, - { TYPE (INSN_LDH_D), IDX (INSN_LDH_D), FULL (ldh_d) FAST (ldh_d) }, - { TYPE (INSN_LDUB), IDX (INSN_LDUB), FULL (ldub) FAST (ldub) }, - { TYPE (INSN_LDUB_D), IDX (INSN_LDUB_D), FULL (ldub_d) FAST (ldub_d) }, - { TYPE (INSN_LDUH), IDX (INSN_LDUH), FULL (lduh) FAST (lduh) }, - { TYPE (INSN_LDUH_D), IDX (INSN_LDUH_D), FULL (lduh_d) FAST (lduh_d) }, - { TYPE (INSN_LD_PLUS), IDX (INSN_LD_PLUS), FULL (ld_plus) FAST (ld_plus) }, - { TYPE (INSN_LD24), IDX (INSN_LD24), FULL (ld24) FAST (ld24) }, - { TYPE (INSN_LDI8), IDX (INSN_LDI8), FULL (ldi8) FAST (ldi8) }, - { TYPE (INSN_LDI16), IDX (INSN_LDI16), FULL (ldi16) FAST (ldi16) }, - { TYPE (INSN_LOCK), IDX (INSN_LOCK), FULL (lock) FAST (lock) }, - { TYPE (INSN_MACHI), IDX (INSN_MACHI), FULL (machi) FAST (machi) }, - { TYPE (INSN_MACLO), IDX (INSN_MACLO), FULL (maclo) FAST (maclo) }, - { TYPE (INSN_MACWHI), IDX (INSN_MACWHI), FULL (macwhi) FAST (macwhi) }, - { TYPE (INSN_MACWLO), IDX (INSN_MACWLO), FULL (macwlo) FAST (macwlo) }, - { TYPE (INSN_MUL), IDX (INSN_MUL), FULL (mul) FAST (mul) }, - { TYPE (INSN_MULHI), IDX (INSN_MULHI), FULL (mulhi) FAST (mulhi) }, - { TYPE (INSN_MULLO), IDX (INSN_MULLO), FULL (mullo) FAST (mullo) }, - { TYPE (INSN_MULWHI), IDX (INSN_MULWHI), FULL (mulwhi) FAST (mulwhi) }, - { TYPE (INSN_MULWLO), IDX (INSN_MULWLO), FULL (mulwlo) FAST (mulwlo) }, - { TYPE (INSN_MV), IDX (INSN_MV), FULL (mv) FAST (mv) }, - { TYPE (INSN_MVFACHI), IDX (INSN_MVFACHI), FULL (mvfachi) FAST (mvfachi) }, - { TYPE (INSN_MVFACLO), IDX (INSN_MVFACLO), FULL (mvfaclo) FAST (mvfaclo) }, - { TYPE (INSN_MVFACMI), IDX (INSN_MVFACMI), FULL (mvfacmi) FAST (mvfacmi) }, - { TYPE (INSN_MVFC), IDX (INSN_MVFC), FULL (mvfc) FAST (mvfc) }, - { TYPE (INSN_MVTACHI), IDX (INSN_MVTACHI), FULL (mvtachi) FAST (mvtachi) }, - { TYPE (INSN_MVTACLO), IDX (INSN_MVTACLO), FULL (mvtaclo) FAST (mvtaclo) }, - { TYPE (INSN_MVTC), IDX (INSN_MVTC), FULL (mvtc) FAST (mvtc) }, - { TYPE (INSN_NEG), IDX (INSN_NEG), FULL (neg) FAST (neg) }, - { TYPE (INSN_NOP), IDX (INSN_NOP), FULL (nop) FAST (nop) }, - { TYPE (INSN_NOT), IDX (INSN_NOT), FULL (not) FAST (not) }, - { TYPE (INSN_RAC), IDX (INSN_RAC), FULL (rac) FAST (rac) }, - { TYPE (INSN_RACH), IDX (INSN_RACH), FULL (rach) FAST (rach) }, - { TYPE (INSN_RTE), IDX (INSN_RTE), FULL (rte) FAST (rte) }, - { TYPE (INSN_SETH), IDX (INSN_SETH), FULL (seth) FAST (seth) }, - { TYPE (INSN_SLL), IDX (INSN_SLL), FULL (sll) FAST (sll) }, - { TYPE (INSN_SLL3), IDX (INSN_SLL3), FULL (sll3) FAST (sll3) }, - { TYPE (INSN_SLLI), IDX (INSN_SLLI), FULL (slli) FAST (slli) }, - { TYPE (INSN_SRA), IDX (INSN_SRA), FULL (sra) FAST (sra) }, - { TYPE (INSN_SRA3), IDX (INSN_SRA3), FULL (sra3) FAST (sra3) }, - { TYPE (INSN_SRAI), IDX (INSN_SRAI), FULL (srai) FAST (srai) }, - { TYPE (INSN_SRL), IDX (INSN_SRL), FULL (srl) FAST (srl) }, - { TYPE (INSN_SRL3), IDX (INSN_SRL3), FULL (srl3) FAST (srl3) }, - { TYPE (INSN_SRLI), IDX (INSN_SRLI), FULL (srli) FAST (srli) }, - { TYPE (INSN_ST), IDX (INSN_ST), FULL (st) FAST (st) }, - { TYPE (INSN_ST_D), IDX (INSN_ST_D), FULL (st_d) FAST (st_d) }, - { TYPE (INSN_STB), IDX (INSN_STB), FULL (stb) FAST (stb) }, - { TYPE (INSN_STB_D), IDX (INSN_STB_D), FULL (stb_d) FAST (stb_d) }, - { TYPE (INSN_STH), IDX (INSN_STH), FULL (sth) FAST (sth) }, - { TYPE (INSN_STH_D), IDX (INSN_STH_D), FULL (sth_d) FAST (sth_d) }, - { TYPE (INSN_ST_PLUS), IDX (INSN_ST_PLUS), FULL (st_plus) FAST (st_plus) }, - { TYPE (INSN_ST_MINUS), IDX (INSN_ST_MINUS), FULL (st_minus) FAST (st_minus) }, - { TYPE (INSN_SUB), IDX (INSN_SUB), FULL (sub) FAST (sub) }, - { TYPE (INSN_SUBV), IDX (INSN_SUBV), FULL (subv) FAST (subv) }, - { TYPE (INSN_SUBX), IDX (INSN_SUBX), FULL (subx) FAST (subx) }, - { TYPE (INSN_TRAP), IDX (INSN_TRAP), FULL (trap) FAST (trap) }, - { TYPE (INSN_UNLOCK), IDX (INSN_UNLOCK), FULL (unlock) FAST (unlock) }, + { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, + { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, + { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, + { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, + { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, + { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, + { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, + { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, + { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, + { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, + { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, + { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, + { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, + { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, + { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, + { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, + { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, + { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, + { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, + { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, + { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, + { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, + { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, + { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, + { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, + { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, + { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, + { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, + { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, + { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, + { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, + { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, + { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, + { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, + { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, + { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, + { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, + { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LD }, + { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LD_D }, + { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LD }, + { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LD_D }, + { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LD }, + { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LD_D }, + { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LD }, + { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LD_D }, + { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, + { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, + { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, + { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, + { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, + { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, + { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, + { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, + { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, + { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, + { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, + { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, + { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, + { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, + { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, + { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, + { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, + { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, + { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, + { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, + { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, + { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, + { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, + { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, + { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, + { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, + { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, + { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, + { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, + { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, + { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, + { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, + { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, + { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, + { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, + { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, + { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, + { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, + { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, + { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, + { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, + { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, + { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, + { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, + { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, + { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, + { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, + { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, + { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, + { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, + { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, }; -static const struct insn_sem m32rbf_insn_sem_invalid = -{ - VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) +static const struct insn_sem m32rbf_insn_sem_invalid = { + VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }; -#undef FMT -#undef FULL -#undef FAST -#undef IDX -#undef TYPE - /* Initialize an IDESC from the compile-time computable parts. */ static INLINE void @@ -189,6 +159,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; id->num = t->index; + id->sfmt = t->sfmt; if ((int) t->type <= 0) id->idata = & cgen_virtual_insn_table[- (int) t->type]; else @@ -196,12 +167,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) id->attrs = CGEN_INSN_ATTRS (id->idata); /* Oh my god, a magic number. */ id->length = CGEN_INSN_BITSIZE (id->idata) / 8; -#if ! WITH_SEM_SWITCH_FULL - id->sem_full = t->sem_full; -#endif -#if WITH_FAST && ! WITH_SEM_SWITCH_FAST - id->sem_fast = t->sem_fast; -#endif + #if WITH_PROFILE_MODEL_P id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; { @@ -209,6 +175,8 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) SIM_ASSERT (t->index == id->timing->num); } #endif + + /* Semantic pointers are initialized elsewhere. */ } /* Initialize the instruction descriptor table. */ @@ -256,59 +224,59 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); switch (val) { - case 0 : itype = M32RBF_INSN_SUBV; goto extract_fmt_addv; - case 1 : itype = M32RBF_INSN_SUBX; goto extract_fmt_addx; - case 2 : itype = M32RBF_INSN_SUB; goto extract_fmt_add; - case 3 : itype = M32RBF_INSN_NEG; goto extract_fmt_mv; - case 4 : itype = M32RBF_INSN_CMP; goto extract_fmt_cmp; - case 5 : itype = M32RBF_INSN_CMPU; goto extract_fmt_cmp; - case 8 : itype = M32RBF_INSN_ADDV; goto extract_fmt_addv; - case 9 : itype = M32RBF_INSN_ADDX; goto extract_fmt_addx; - case 10 : itype = M32RBF_INSN_ADD; goto extract_fmt_add; - case 11 : itype = M32RBF_INSN_NOT; goto extract_fmt_mv; - case 12 : itype = M32RBF_INSN_AND; goto extract_fmt_add; - case 13 : itype = M32RBF_INSN_XOR; goto extract_fmt_add; - case 14 : itype = M32RBF_INSN_OR; goto extract_fmt_add; - case 16 : itype = M32RBF_INSN_SRL; goto extract_fmt_add; - case 18 : itype = M32RBF_INSN_SRA; goto extract_fmt_add; - case 20 : itype = M32RBF_INSN_SLL; goto extract_fmt_add; - case 22 : itype = M32RBF_INSN_MUL; goto extract_fmt_add; - case 24 : itype = M32RBF_INSN_MV; goto extract_fmt_mv; - case 25 : itype = M32RBF_INSN_MVFC; goto extract_fmt_mvfc; - case 26 : itype = M32RBF_INSN_MVTC; goto extract_fmt_mvtc; + case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; + case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; + case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; + case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; + case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; + case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; + case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; + case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; + case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; + case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; + case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; + case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; + case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; + case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; + case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; + case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; + case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; + case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; + case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; + case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 : { unsigned int val = (((insn >> 8) & (15 << 0))); switch (val) { - case 14 : itype = M32RBF_INSN_JL; goto extract_fmt_jl; - case 15 : itype = M32RBF_INSN_JMP; goto extract_fmt_jmp; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 14 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; + case 15 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 29 : itype = M32RBF_INSN_RTE; goto extract_fmt_rte; - case 31 : itype = M32RBF_INSN_TRAP; goto extract_fmt_trap; - case 32 : itype = M32RBF_INSN_STB; goto extract_fmt_stb; - case 34 : itype = M32RBF_INSN_STH; goto extract_fmt_sth; - case 36 : itype = M32RBF_INSN_ST; goto extract_fmt_st; - case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_fmt_unlock; - case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_fmt_st_plus; - case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_fmt_st_plus; - case 40 : itype = M32RBF_INSN_LDB; goto extract_fmt_ldb; - case 41 : itype = M32RBF_INSN_LDUB; goto extract_fmt_ldb; - case 42 : itype = M32RBF_INSN_LDH; goto extract_fmt_ldh; - case 43 : itype = M32RBF_INSN_LDUH; goto extract_fmt_ldh; - case 44 : itype = M32RBF_INSN_LD; goto extract_fmt_ld; - case 45 : itype = M32RBF_INSN_LOCK; goto extract_fmt_lock; - case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_fmt_ld_plus; - case 48 : itype = M32RBF_INSN_MULHI; goto extract_fmt_mulhi; - case 49 : itype = M32RBF_INSN_MULLO; goto extract_fmt_mulhi; - case 50 : itype = M32RBF_INSN_MULWHI; goto extract_fmt_mulhi; - case 51 : itype = M32RBF_INSN_MULWLO; goto extract_fmt_mulhi; - case 52 : itype = M32RBF_INSN_MACHI; goto extract_fmt_machi; - case 53 : itype = M32RBF_INSN_MACLO; goto extract_fmt_machi; - case 54 : itype = M32RBF_INSN_MACWHI; goto extract_fmt_machi; - case 55 : itype = M32RBF_INSN_MACWLO; goto extract_fmt_machi; + case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; + case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; + case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; + case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; + case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; + case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; + case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; + case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; + case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld; + case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld; + case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld; + case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld; + case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; + case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; + case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; + case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; + case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; + case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; + case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; + case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; + case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; + case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; + case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; case 64 : /* fall through */ case 65 : /* fall through */ case 66 : /* fall through */ @@ -324,34 +292,34 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, case 76 : /* fall through */ case 77 : /* fall through */ case 78 : /* fall through */ - case 79 : itype = M32RBF_INSN_ADDI; goto extract_fmt_addi; + case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */ - case 81 : itype = M32RBF_INSN_SRLI; goto extract_fmt_slli; + case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */ - case 83 : itype = M32RBF_INSN_SRAI; goto extract_fmt_slli; + case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */ - case 85 : itype = M32RBF_INSN_SLLI; goto extract_fmt_slli; + case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; case 87 : { unsigned int val = (((insn >> 0) & (15 << 0))); switch (val) { - case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_fmt_mvtachi; - case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_fmt_mvtachi; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; + case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 88 : itype = M32RBF_INSN_RACH; goto extract_fmt_rac; - case 89 : itype = M32RBF_INSN_RAC; goto extract_fmt_rac; + case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; + case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; case 95 : { unsigned int val = (((insn >> 0) & (15 << 0))); switch (val) { - case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_fmt_mvfachi; - case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_fmt_mvfachi; - case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_fmt_mvfachi; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; + case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; + case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } case 96 : /* fall through */ @@ -369,18 +337,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, case 108 : /* fall through */ case 109 : /* fall through */ case 110 : /* fall through */ - case 111 : itype = M32RBF_INSN_LDI8; goto extract_fmt_ldi8; + case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 : { unsigned int val = (((insn >> 8) & (15 << 0))); switch (val) { - case 0 : itype = M32RBF_INSN_NOP; goto extract_fmt_nop; - case 12 : itype = M32RBF_INSN_BC8; goto extract_fmt_bc8; - case 13 : itype = M32RBF_INSN_BNC8; goto extract_fmt_bc8; - case 14 : itype = M32RBF_INSN_BL8; goto extract_fmt_bl8; - case 15 : itype = M32RBF_INSN_BRA8; goto extract_fmt_bra8; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; + case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; + case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; + case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; + case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } case 113 : /* fall through */ @@ -402,45 +370,45 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (15 << 0))); switch (val) { - case 12 : itype = M32RBF_INSN_BC8; goto extract_fmt_bc8; - case 13 : itype = M32RBF_INSN_BNC8; goto extract_fmt_bc8; - case 14 : itype = M32RBF_INSN_BL8; goto extract_fmt_bl8; - case 15 : itype = M32RBF_INSN_BRA8; goto extract_fmt_bra8; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; + case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; + case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; + case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 132 : itype = M32RBF_INSN_CMPI; goto extract_fmt_cmpi; - case 133 : itype = M32RBF_INSN_CMPUI; goto extract_fmt_cmpi; - case 136 : itype = M32RBF_INSN_ADDV3; goto extract_fmt_addv3; - case 138 : itype = M32RBF_INSN_ADD3; goto extract_fmt_add3; - case 140 : itype = M32RBF_INSN_AND3; goto extract_fmt_and3; - case 141 : itype = M32RBF_INSN_XOR3; goto extract_fmt_and3; - case 142 : itype = M32RBF_INSN_OR3; goto extract_fmt_or3; - case 144 : itype = M32RBF_INSN_DIV; goto extract_fmt_div; - case 145 : itype = M32RBF_INSN_DIVU; goto extract_fmt_div; - case 146 : itype = M32RBF_INSN_REM; goto extract_fmt_div; - case 147 : itype = M32RBF_INSN_REMU; goto extract_fmt_div; - case 152 : itype = M32RBF_INSN_SRL3; goto extract_fmt_sll3; - case 154 : itype = M32RBF_INSN_SRA3; goto extract_fmt_sll3; - case 156 : itype = M32RBF_INSN_SLL3; goto extract_fmt_sll3; - case 159 : itype = M32RBF_INSN_LDI16; goto extract_fmt_ldi16; - case 160 : itype = M32RBF_INSN_STB_D; goto extract_fmt_stb_d; - case 162 : itype = M32RBF_INSN_STH_D; goto extract_fmt_sth_d; - case 164 : itype = M32RBF_INSN_ST_D; goto extract_fmt_st_d; - case 168 : itype = M32RBF_INSN_LDB_D; goto extract_fmt_ldb_d; - case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_fmt_ldb_d; - case 170 : itype = M32RBF_INSN_LDH_D; goto extract_fmt_ldh_d; - case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_fmt_ldh_d; - case 172 : itype = M32RBF_INSN_LD_D; goto extract_fmt_ld_d; - case 176 : itype = M32RBF_INSN_BEQ; goto extract_fmt_beq; - case 177 : itype = M32RBF_INSN_BNE; goto extract_fmt_beq; - case 184 : itype = M32RBF_INSN_BEQZ; goto extract_fmt_beqz; - case 185 : itype = M32RBF_INSN_BNEZ; goto extract_fmt_beqz; - case 186 : itype = M32RBF_INSN_BLTZ; goto extract_fmt_beqz; - case 187 : itype = M32RBF_INSN_BGEZ; goto extract_fmt_beqz; - case 188 : itype = M32RBF_INSN_BLEZ; goto extract_fmt_beqz; - case 189 : itype = M32RBF_INSN_BGTZ; goto extract_fmt_beqz; - case 220 : itype = M32RBF_INSN_SETH; goto extract_fmt_seth; + case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; + case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; + case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; + case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; + case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; + case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; + case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; + case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; + case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; + case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; + case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; + case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; + case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; + case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; + case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; + case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; + case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; + case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; + case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d; + case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d; + case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d; + case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d; + case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; + case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; + case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; + case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; + case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; + case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; + case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; + case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; + case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; + case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */ case 225 : /* fall through */ case 226 : /* fall through */ @@ -456,7 +424,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, case 236 : /* fall through */ case 237 : /* fall through */ case 238 : /* fall through */ - case 239 : itype = M32RBF_INSN_LD24; goto extract_fmt_ld24; + case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */ case 241 : /* fall through */ case 242 : /* fall through */ @@ -477,49 +445,49 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 8) & (15 << 0))); switch (val) { - case 12 : itype = M32RBF_INSN_BC24; goto extract_fmt_bc24; - case 13 : itype = M32RBF_INSN_BNC24; goto extract_fmt_bc24; - case 14 : itype = M32RBF_INSN_BL24; goto extract_fmt_bl24; - case 15 : itype = M32RBF_INSN_BRA24; goto extract_fmt_bra24; - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + case 12 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; + case 13 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; + case 14 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; + case 15 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - default : itype = M32RBF_INSN_X_INVALID; goto extract_fmt_empty; + default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } } /* The instruction has been decoded, now extract the fields. */ - extract_fmt_empty: + extract_sfmt_empty: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; #define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_EMPTY_VARS /* */ - EXTRACT_IFMT_EMPTY_CODE /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); #undef FLD return idesc; } - extract_fmt_add: + extract_sfmt_add: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_add.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_add.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -534,20 +502,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_add3: + extract_sfmt_add3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_add3.f - EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add3.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ADD3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -561,20 +533,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_and3: + extract_sfmt_and3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_and3.f - EXTRACT_IFMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ +#define FLD(f) abuf->fields.sfmt_and3.f + UINT f_r1; + UINT f_r2; + UINT f_uimm16; - EXTRACT_IFMT_AND3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_uimm16) = f_uimm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_and3", "f_uimm16 0x%x", 'x', f_uimm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_uimm16 0x%x", 'x', f_uimm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -588,20 +564,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_or3: + extract_sfmt_or3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_or3.f - EXTRACT_IFMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ +#define FLD(f) abuf->fields.sfmt_and3.f + UINT f_r1; + UINT f_r2; + UINT f_uimm16; - EXTRACT_IFMT_OR3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_uimm16) = f_uimm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_or3", "f_uimm16 0x%x", 'x', f_uimm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_uimm16 0x%x", 'x', f_uimm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -615,19 +595,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addi: + extract_sfmt_addi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_addi.f - EXTRACT_IFMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */ +#define FLD(f) abuf->fields.sfmt_addi.f + UINT f_r1; + INT f_simm8; - EXTRACT_IFMT_ADDI_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addi", "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -641,19 +623,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addv: + extract_sfmt_addv: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_addv.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_add.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -668,20 +652,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addv3: + extract_sfmt_addv3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_addv3.f - EXTRACT_IFMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add3.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ADDV3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -695,19 +683,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_addx: + extract_sfmt_addx: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_addx.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_add.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -722,19 +712,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bc8: + extract_sfmt_bc8: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f - EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */ +#define FLD(f) abuf->fields.sfmt_bl8.f + SI f_disp8; - EXTRACT_IFMT_BC8_CODE + f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -746,19 +735,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bc24: + extract_sfmt_bc24: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f - EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */ +#define FLD(f) abuf->fields.sfmt_bl24.f + SI f_disp24; - EXTRACT_IFMT_BC24_CODE + f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -770,21 +758,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_beq: + extract_sfmt_beq: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f - EXTRACT_IFMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ +#define FLD(f) abuf->fields.sfmt_beq.f + UINT f_r1; + UINT f_r2; + SI f_disp16; - EXTRACT_IFMT_BEQ_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp16) = f_disp16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beq", "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -798,20 +789,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_beqz: + extract_sfmt_beqz: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - EXTRACT_IFMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ +#define FLD(f) abuf->fields.sfmt_beq.f + UINT f_r2; + SI f_disp16; - EXTRACT_IFMT_BEQZ_CODE + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp16) = f_disp16; FLD (i_src2) = & CPU (h_gr)[f_r2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beqz", "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -824,19 +816,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bl8: + extract_sfmt_bl8: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f - EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */ +#define FLD(f) abuf->fields.sfmt_bl8.f + SI f_disp8; - EXTRACT_IFMT_BC8_CODE + f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -849,19 +840,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bl24: + extract_sfmt_bl24: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f - EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */ +#define FLD(f) abuf->fields.sfmt_bl24.f + SI f_disp24; - EXTRACT_IFMT_BC24_CODE + f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -874,19 +864,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bra8: + extract_sfmt_bra8: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f - EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */ +#define FLD(f) abuf->fields.sfmt_bl8.f + SI f_disp8; - EXTRACT_IFMT_BC8_CODE + f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -898,19 +887,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_bra24: + extract_sfmt_bra24: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f - EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */ +#define FLD(f) abuf->fields.sfmt_bl24.f + SI f_disp24; - EXTRACT_IFMT_BC24_CODE + f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -922,19 +910,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmp: + extract_sfmt_cmp: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_cmp.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -948,19 +938,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_cmpi: + extract_sfmt_cmpi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_cmpi.f - EXTRACT_IFMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_st_d.f + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_CMPI_CODE + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -973,19 +965,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_div: + extract_sfmt_div: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_div.f - EXTRACT_IFMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_DIV_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1000,19 +994,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_jl: + extract_sfmt_jl: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f - EXTRACT_IFMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_jl.f + UINT f_r2; - EXTRACT_IFMT_JL_CODE + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_sr) = & CPU (h_gr)[f_r2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_jl", "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1026,97 +1019,45 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_jmp: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f - EXTRACT_IFMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */ - - EXTRACT_IFMT_JL_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_sr) = & CPU (h_gr)[f_r2]; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_jmp", "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ld.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ - - EXTRACT_IFMT_ADD_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_d: + extract_sfmt_jmp: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ld_d.f - EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_mvtc.f + UINT f_r2; - EXTRACT_IFMT_ADD3_CODE + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; } #endif #undef FLD return idesc; } - extract_fmt_ldb: + extract_sfmt_ld: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldb.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_ld_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldb", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1130,20 +1071,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldb_d: + extract_sfmt_ld_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldb_d.f - EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add3.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ADD3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1157,72 +1102,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldh: + extract_sfmt_ld_plus: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldh.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_ld_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldh", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ldh_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldh_d.f - EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ - - EXTRACT_IFMT_ADD3_CODE - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_fmt_ld_plus: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ld_plus.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ - - EXTRACT_IFMT_ADD_CODE - - /* Record the fields for the semantic handler. */ - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_plus", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1237,19 +1131,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ld24: + extract_sfmt_ld24: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ld24.f - EXTRACT_IFMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */ +#define FLD(f) abuf->fields.sfmt_ld24.f + UINT f_r1; + UINT f_uimm24; - EXTRACT_IFMT_LD24_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); /* Record the fields for the semantic handler. */ FLD (i_uimm24) = f_uimm24; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld24", "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1262,19 +1158,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldi8: + extract_sfmt_ldi8: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldi8.f - EXTRACT_IFMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */ +#define FLD(f) abuf->fields.sfmt_addi.f + UINT f_r1; + INT f_simm8; - EXTRACT_IFMT_ADDI_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1287,19 +1185,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_ldi16: + extract_sfmt_ldi16: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_ldi16.f - EXTRACT_IFMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add3.f + UINT f_r1; + INT f_simm16; - EXTRACT_IFMT_LDI16_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1312,19 +1212,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_lock: + extract_sfmt_lock: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_lock.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_ld_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lock", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1338,19 +1240,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_machi: + extract_sfmt_machi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_machi.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1364,19 +1268,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mulhi: + extract_sfmt_mulhi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mulhi.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1390,19 +1296,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mv: + extract_sfmt_mv: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mv.f - EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_ld_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_ADD_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mv", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1416,18 +1324,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mvfachi: + extract_sfmt_mvfachi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mvfachi.f - EXTRACT_IFMT_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_seth.f + UINT f_r1; - EXTRACT_IFMT_MVFACHI_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); /* Record the fields for the semantic handler. */ FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1440,19 +1348,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mvfc: + extract_sfmt_mvfc: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mvfc.f - EXTRACT_IFMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_mvfc.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_MVFC_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mvfc", "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1465,18 +1375,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mvtachi: + extract_sfmt_mvtachi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mvtachi.f - EXTRACT_IFMT_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; - EXTRACT_IFMT_MVTACHI_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1489,19 +1399,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_mvtc: + extract_sfmt_mvtc: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_mvtc.f - EXTRACT_IFMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_mvtc.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_MVTC_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mvtc", "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1514,50 +1426,43 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_nop: + extract_sfmt_nop: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_nop.f - EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_NOP_CODE /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_nop", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); #undef FLD return idesc; } - extract_fmt_rac: + extract_sfmt_rac: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_rac.f - EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_NOP_CODE /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_rac", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); #undef FLD return idesc; } - extract_fmt_rte: + extract_sfmt_rte: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f - EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.fmt_empty.f - EXTRACT_IFMT_NOP_CODE /* Record the fields for the semantic handler. */ - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_rte", (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1569,19 +1474,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_seth: + extract_sfmt_seth: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_seth.f - EXTRACT_IFMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */ +#define FLD(f) abuf->fields.sfmt_seth.f + UINT f_r1; + UINT f_hi16; - EXTRACT_IFMT_SETH_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_hi16) = f_hi16; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_seth", "f_hi16 0x%x", 'x', f_hi16, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1594,20 +1501,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_sll3: + extract_sfmt_sll3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_sll3.f - EXTRACT_IFMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_add3.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ADDV3_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1621,19 +1532,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_slli: + extract_sfmt_slli: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_slli.f - EXTRACT_IFMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */ +#define FLD(f) abuf->fields.sfmt_slli.f + UINT f_r1; + UINT f_uimm5; - EXTRACT_IFMT_SLLI_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); /* Record the fields for the semantic handler. */ FLD (f_uimm5) = f_uimm5; FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_slli", "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1647,19 +1560,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st: + extract_sfmt_st: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_st.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1673,20 +1588,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_d: + extract_sfmt_st_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_st_d.f - EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_st_d.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ST_D_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1700,19 +1619,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stb: + extract_sfmt_stb: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_stb.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1726,20 +1647,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_stb_d: + extract_sfmt_stb_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_stb_d.f - EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_st_d.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ST_D_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1753,19 +1678,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_sth: + extract_sfmt_sth: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_sth.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1779,20 +1706,24 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_sth_d: + extract_sfmt_sth_d: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_sth_d.f - EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ +#define FLD(f) abuf->fields.sfmt_st_d.f + UINT f_r1; + UINT f_r2; + INT f_simm16; - EXTRACT_IFMT_ST_D_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1806,19 +1737,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_st_plus: + extract_sfmt_st_plus: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_st_plus.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1833,19 +1766,18 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_trap: + extract_sfmt_trap: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f - EXTRACT_IFMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */ +#define FLD(f) abuf->fields.sfmt_trap.f + UINT f_uimm4; - EXTRACT_IFMT_TRAP_CODE + f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_uimm4) = f_uimm4; - SEM_BRANCH_INIT_EXTRACT (abuf); - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ @@ -1857,19 +1789,21 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, return idesc; } - extract_fmt_unlock: + extract_sfmt_unlock: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.fmt_unlock.f - EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ +#define FLD(f) abuf->fields.sfmt_st_plus.f + UINT f_r1; + UINT f_r2; - EXTRACT_IFMT_CMP_CODE + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); + TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); #if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ diff --git a/sim/m32r/decode.h b/sim/m32r/decode.h index 91471e8c143..9649accecc8 100644 --- a/sim/m32r/decode.h +++ b/sim/m32r/decode.h @@ -29,6 +29,8 @@ extern const IDESC *m32rbf_decode (SIM_CPU *, IADDR, CGEN_INSN_INT, CGEN_INSN_INT, ARGBUF *); extern void m32rbf_init_idesc_table (SIM_CPU *); +extern void m32rbf_sem_init_idesc_table (SIM_CPU *); +extern void m32rbf_semf_init_idesc_table (SIM_CPU *); /* Enum declaration for instructions in cpu family m32rbf. */ typedef enum m32rbf_insn_type { @@ -61,134 +63,22 @@ typedef enum m32rbf_insn_type { , M32RBF_INSN_UNLOCK, M32RBF_INSN_MAX } M32RBF_INSN_TYPE; -#if ! WITH_SEM_SWITCH_FULL -#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,fn); -#else -#define SEMFULL(fn) -#endif - -#if ! WITH_SEM_SWITCH_FAST -#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_semf_,fn); -#else -#define SEMFAST(fn) -#endif - -#define SEM(fn) SEMFULL (fn) SEMFAST (fn) - -/* The function version of the before/after handlers is always needed, - so we always want the SEMFULL declaration of them. */ -extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,x_before); -extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,x_after); - -SEM (x_invalid) -SEM (x_after) -SEM (x_before) -SEM (x_cti_chain) -SEM (x_chain) -SEM (x_begin) -SEM (add) -SEM (add3) -SEM (and) -SEM (and3) -SEM (or) -SEM (or3) -SEM (xor) -SEM (xor3) -SEM (addi) -SEM (addv) -SEM (addv3) -SEM (addx) -SEM (bc8) -SEM (bc24) -SEM (beq) -SEM (beqz) -SEM (bgez) -SEM (bgtz) -SEM (blez) -SEM (bltz) -SEM (bnez) -SEM (bl8) -SEM (bl24) -SEM (bnc8) -SEM (bnc24) -SEM (bne) -SEM (bra8) -SEM (bra24) -SEM (cmp) -SEM (cmpi) -SEM (cmpu) -SEM (cmpui) -SEM (div) -SEM (divu) -SEM (rem) -SEM (remu) -SEM (jl) -SEM (jmp) -SEM (ld) -SEM (ld_d) -SEM (ldb) -SEM (ldb_d) -SEM (ldh) -SEM (ldh_d) -SEM (ldub) -SEM (ldub_d) -SEM (lduh) -SEM (lduh_d) -SEM (ld_plus) -SEM (ld24) -SEM (ldi8) -SEM (ldi16) -SEM (lock) -SEM (machi) -SEM (maclo) -SEM (macwhi) -SEM (macwlo) -SEM (mul) -SEM (mulhi) -SEM (mullo) -SEM (mulwhi) -SEM (mulwlo) -SEM (mv) -SEM (mvfachi) -SEM (mvfaclo) -SEM (mvfacmi) -SEM (mvfc) -SEM (mvtachi) -SEM (mvtaclo) -SEM (mvtc) -SEM (neg) -SEM (nop) -SEM (not) -SEM (rac) -SEM (rach) -SEM (rte) -SEM (seth) -SEM (sll) -SEM (sll3) -SEM (slli) -SEM (sra) -SEM (sra3) -SEM (srai) -SEM (srl) -SEM (srl3) -SEM (srli) -SEM (st) -SEM (st_d) -SEM (stb) -SEM (stb_d) -SEM (sth) -SEM (sth_d) -SEM (st_plus) -SEM (st_minus) -SEM (sub) -SEM (subv) -SEM (subx) -SEM (trap) -SEM (unlock) - -#undef SEMFULL -#undef SEMFAST -#undef SEM +/* Enum declaration for semantic formats in cpu family m32rbf. */ +typedef enum m32rbf_sfmt_type { + M32RBF_SFMT_EMPTY, M32RBF_SFMT_ADD, M32RBF_SFMT_ADD3, M32RBF_SFMT_AND3 + , M32RBF_SFMT_OR3, M32RBF_SFMT_ADDI, M32RBF_SFMT_ADDV, M32RBF_SFMT_ADDV3 + , M32RBF_SFMT_ADDX, M32RBF_SFMT_BC8, M32RBF_SFMT_BC24, M32RBF_SFMT_BEQ + , M32RBF_SFMT_BEQZ, M32RBF_SFMT_BL8, M32RBF_SFMT_BL24, M32RBF_SFMT_BRA8 + , M32RBF_SFMT_BRA24, M32RBF_SFMT_CMP, M32RBF_SFMT_CMPI, M32RBF_SFMT_DIV + , M32RBF_SFMT_JL, M32RBF_SFMT_JMP, M32RBF_SFMT_LD, M32RBF_SFMT_LD_D + , M32RBF_SFMT_LD_PLUS, M32RBF_SFMT_LD24, M32RBF_SFMT_LDI8, M32RBF_SFMT_LDI16 + , M32RBF_SFMT_LOCK, M32RBF_SFMT_MACHI, M32RBF_SFMT_MULHI, M32RBF_SFMT_MV + , M32RBF_SFMT_MVFACHI, M32RBF_SFMT_MVFC, M32RBF_SFMT_MVTACHI, M32RBF_SFMT_MVTC + , M32RBF_SFMT_NOP, M32RBF_SFMT_RAC, M32RBF_SFMT_RTE, M32RBF_SFMT_SETH + , M32RBF_SFMT_SLL3, M32RBF_SFMT_SLLI, M32RBF_SFMT_ST, M32RBF_SFMT_ST_D + , M32RBF_SFMT_STB, M32RBF_SFMT_STB_D, M32RBF_SFMT_STH, M32RBF_SFMT_STH_D + , M32RBF_SFMT_ST_PLUS, M32RBF_SFMT_TRAP, M32RBF_SFMT_UNLOCK +} M32RBF_SFMT_TYPE; /* Function unit handlers (user written). */ diff --git a/sim/m32r/model.c b/sim/m32r/model.c index e82881e0eec..99ca3cd1c39 100644 --- a/sim/m32r/model.c +++ b/sim/m32r/model.c @@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc., static int model_m32r_d_add (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -62,7 +62,7 @@ model_m32r_d_add (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_add3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -85,7 +85,7 @@ model_m32r_d_add3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -110,7 +110,7 @@ model_m32r_d_and (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_and3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -133,7 +133,7 @@ model_m32r_d_and3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -158,7 +158,7 @@ model_m32r_d_or (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_or3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_or3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -181,7 +181,7 @@ model_m32r_d_or3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_xor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -206,7 +206,7 @@ model_m32r_d_xor (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_xor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -229,7 +229,7 @@ model_m32r_d_xor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_addi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -252,7 +252,7 @@ model_m32r_d_addi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_addv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -277,7 +277,7 @@ model_m32r_d_addv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_addv3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -300,7 +300,7 @@ model_m32r_d_addv3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_addx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -325,7 +325,7 @@ model_m32r_d_addx (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -343,7 +343,7 @@ model_m32r_d_bc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -361,7 +361,7 @@ model_m32r_d_bc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_beq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -390,7 +390,7 @@ model_m32r_d_beq (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_beqz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -417,7 +417,7 @@ model_m32r_d_beqz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bgez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -444,7 +444,7 @@ model_m32r_d_bgez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bgtz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -471,7 +471,7 @@ model_m32r_d_bgtz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_blez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -498,7 +498,7 @@ model_m32r_d_blez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bltz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -525,7 +525,7 @@ model_m32r_d_bltz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bnez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -552,7 +552,7 @@ model_m32r_d_bnez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bl8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -570,7 +570,7 @@ model_m32r_d_bl8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bl24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -588,7 +588,7 @@ model_m32r_d_bl24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bnc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -606,7 +606,7 @@ model_m32r_d_bnc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bnc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -624,7 +624,7 @@ model_m32r_d_bnc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -653,7 +653,7 @@ model_m32r_d_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bra8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -671,7 +671,7 @@ model_m32r_d_bra8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_bra24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -689,7 +689,7 @@ model_m32r_d_bra24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_cmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -711,7 +711,7 @@ model_m32r_d_cmp (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -731,7 +731,7 @@ model_m32r_d_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_cmpu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -753,7 +753,7 @@ model_m32r_d_cmpu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_cmpui (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -773,7 +773,7 @@ model_m32r_d_cmpui (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_div (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -798,7 +798,7 @@ model_m32r_d_div (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_divu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -823,7 +823,7 @@ model_m32r_d_divu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_rem (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -848,7 +848,7 @@ model_m32r_d_rem (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_remu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -873,7 +873,7 @@ model_m32r_d_remu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_jl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f +#define FLD(f) abuf->fields.sfmt_jl.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -893,7 +893,7 @@ model_m32r_d_jl (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_jmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mvtc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -913,7 +913,7 @@ model_m32r_d_jmp (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -935,7 +935,7 @@ model_m32r_d_ld (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ld_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -957,7 +957,7 @@ model_m32r_d_ld_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -979,7 +979,7 @@ model_m32r_d_ldb (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1001,7 +1001,7 @@ model_m32r_d_ldb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1023,7 +1023,7 @@ model_m32r_d_ldh (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1045,7 +1045,7 @@ model_m32r_d_ldh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1067,7 +1067,7 @@ model_m32r_d_ldub (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldub_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1089,7 +1089,7 @@ model_m32r_d_ldub_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_lduh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1111,7 +1111,7 @@ model_m32r_d_lduh (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_lduh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1133,7 +1133,7 @@ model_m32r_d_lduh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ld_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_plus.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1167,7 +1167,7 @@ model_m32r_d_ld_plus (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ld24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld24.f +#define FLD(f) abuf->fields.sfmt_ld24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1188,7 +1188,7 @@ model_m32r_d_ld24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldi8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1209,7 +1209,7 @@ model_m32r_d_ldi8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_ldi16 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi16.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1230,7 +1230,7 @@ model_m32r_d_ldi16 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_lock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lock.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1252,7 +1252,7 @@ model_m32r_d_lock (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_machi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1274,7 +1274,7 @@ model_m32r_d_machi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_maclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1296,7 +1296,7 @@ model_m32r_d_maclo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_macwhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1318,7 +1318,7 @@ model_m32r_d_macwhi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_macwlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1340,7 +1340,7 @@ model_m32r_d_macwlo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1365,7 +1365,7 @@ model_m32r_d_mul (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mulhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1387,7 +1387,7 @@ model_m32r_d_mulhi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mullo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1409,7 +1409,7 @@ model_m32r_d_mullo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mulwhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1431,7 +1431,7 @@ model_m32r_d_mulwhi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mulwlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1453,7 +1453,7 @@ model_m32r_d_mulwlo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1476,7 +1476,7 @@ model_m32r_d_mv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvfachi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1497,7 +1497,7 @@ model_m32r_d_mvfachi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1518,7 +1518,7 @@ model_m32r_d_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1539,7 +1539,7 @@ model_m32r_d_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvfc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfc.f +#define FLD(f) abuf->fields.sfmt_mvfc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1560,7 +1560,7 @@ model_m32r_d_mvfc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvtachi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1580,7 +1580,7 @@ model_m32r_d_mvtachi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1600,7 +1600,7 @@ model_m32r_d_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_mvtc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtc.f +#define FLD(f) abuf->fields.sfmt_mvtc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1621,7 +1621,7 @@ model_m32r_d_mvtc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_neg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1644,7 +1644,7 @@ model_m32r_d_neg (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_nop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_nop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1663,7 +1663,7 @@ model_m32r_d_nop (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_not (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1686,7 +1686,7 @@ model_m32r_d_not (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_rac (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1704,7 +1704,7 @@ model_m32r_d_rac (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_rach (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1722,7 +1722,7 @@ model_m32r_d_rach (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_rte (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1741,7 +1741,7 @@ model_m32r_d_rte (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_seth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_seth.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1762,7 +1762,7 @@ model_m32r_d_seth (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sll (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1787,7 +1787,7 @@ model_m32r_d_sll (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sll3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1810,7 +1810,7 @@ model_m32r_d_sll3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_slli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1833,7 +1833,7 @@ model_m32r_d_slli (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sra (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1858,7 +1858,7 @@ model_m32r_d_sra (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sra3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1881,7 +1881,7 @@ model_m32r_d_sra3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_srai (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1904,7 +1904,7 @@ model_m32r_d_srai (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_srl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1929,7 +1929,7 @@ model_m32r_d_srl (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_srl3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1952,7 +1952,7 @@ model_m32r_d_srl3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_srli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1975,7 +1975,7 @@ model_m32r_d_srli (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_st (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -1997,7 +1997,7 @@ model_m32r_d_st (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_st_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2019,7 +2019,7 @@ model_m32r_d_st_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_stb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2041,7 +2041,7 @@ model_m32r_d_stb (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_stb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2063,7 +2063,7 @@ model_m32r_d_stb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2085,7 +2085,7 @@ model_m32r_d_sth (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sth_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2107,7 +2107,7 @@ model_m32r_d_sth_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_st_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2139,7 +2139,7 @@ model_m32r_d_st_plus (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_st_minus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2171,7 +2171,7 @@ model_m32r_d_st_minus (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_sub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2196,7 +2196,7 @@ model_m32r_d_sub (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_subv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2221,7 +2221,7 @@ model_m32r_d_subv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_subx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2246,7 +2246,7 @@ model_m32r_d_subx (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_trap (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f +#define FLD(f) abuf->fields.sfmt_trap.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2265,7 +2265,7 @@ model_m32r_d_trap (SIM_CPU *current_cpu, void *sem_arg) static int model_m32r_d_unlock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_unlock.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2283,7 +2283,7 @@ model_m32r_d_unlock (SIM_CPU *current_cpu, void *sem_arg) static int model_test_add (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2299,7 +2299,7 @@ model_test_add (SIM_CPU *current_cpu, void *sem_arg) static int model_test_add3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2315,7 +2315,7 @@ model_test_add3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2331,7 +2331,7 @@ model_test_and (SIM_CPU *current_cpu, void *sem_arg) static int model_test_and3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2347,7 +2347,7 @@ model_test_and3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2363,7 +2363,7 @@ model_test_or (SIM_CPU *current_cpu, void *sem_arg) static int model_test_or3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_or3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2379,7 +2379,7 @@ model_test_or3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_xor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2395,7 +2395,7 @@ model_test_xor (SIM_CPU *current_cpu, void *sem_arg) static int model_test_xor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2411,7 +2411,7 @@ model_test_xor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_addi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2427,7 +2427,7 @@ model_test_addi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_addv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2443,7 +2443,7 @@ model_test_addv (SIM_CPU *current_cpu, void *sem_arg) static int model_test_addv3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2459,7 +2459,7 @@ model_test_addv3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_addx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2475,7 +2475,7 @@ model_test_addx (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2491,7 +2491,7 @@ model_test_bc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2507,7 +2507,7 @@ model_test_bc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_beq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2523,7 +2523,7 @@ model_test_beq (SIM_CPU *current_cpu, void *sem_arg) static int model_test_beqz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2539,7 +2539,7 @@ model_test_beqz (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bgez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2555,7 +2555,7 @@ model_test_bgez (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bgtz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2571,7 +2571,7 @@ model_test_bgtz (SIM_CPU *current_cpu, void *sem_arg) static int model_test_blez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2587,7 +2587,7 @@ model_test_blez (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bltz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2603,7 +2603,7 @@ model_test_bltz (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bnez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2619,7 +2619,7 @@ model_test_bnez (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bl8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2635,7 +2635,7 @@ model_test_bl8 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bl24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2651,7 +2651,7 @@ model_test_bl24 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bnc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2667,7 +2667,7 @@ model_test_bnc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bnc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2683,7 +2683,7 @@ model_test_bnc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2699,7 +2699,7 @@ model_test_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bra8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f +#define FLD(f) abuf->fields.sfmt_bl8.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2715,7 +2715,7 @@ model_test_bra8 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_bra24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f +#define FLD(f) abuf->fields.sfmt_bl24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2731,7 +2731,7 @@ model_test_bra24 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_cmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2747,7 +2747,7 @@ model_test_cmp (SIM_CPU *current_cpu, void *sem_arg) static int model_test_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2763,7 +2763,7 @@ model_test_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_cmpu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2779,7 +2779,7 @@ model_test_cmpu (SIM_CPU *current_cpu, void *sem_arg) static int model_test_cmpui (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2795,7 +2795,7 @@ model_test_cmpui (SIM_CPU *current_cpu, void *sem_arg) static int model_test_div (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2811,7 +2811,7 @@ model_test_div (SIM_CPU *current_cpu, void *sem_arg) static int model_test_divu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2827,7 +2827,7 @@ model_test_divu (SIM_CPU *current_cpu, void *sem_arg) static int model_test_rem (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2843,7 +2843,7 @@ model_test_rem (SIM_CPU *current_cpu, void *sem_arg) static int model_test_remu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2859,7 +2859,7 @@ model_test_remu (SIM_CPU *current_cpu, void *sem_arg) static int model_test_jl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f +#define FLD(f) abuf->fields.sfmt_jl.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2875,7 +2875,7 @@ model_test_jl (SIM_CPU *current_cpu, void *sem_arg) static int model_test_jmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mvtc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2891,7 +2891,7 @@ model_test_jmp (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2907,7 +2907,7 @@ model_test_ld (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ld_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2923,7 +2923,7 @@ model_test_ld_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2939,7 +2939,7 @@ model_test_ldb (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2955,7 +2955,7 @@ model_test_ldb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2971,7 +2971,7 @@ model_test_ldh (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -2987,7 +2987,7 @@ model_test_ldh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3003,7 +3003,7 @@ model_test_ldub (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldub_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3019,7 +3019,7 @@ model_test_ldub_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_lduh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3035,7 +3035,7 @@ model_test_lduh (SIM_CPU *current_cpu, void *sem_arg) static int model_test_lduh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3051,7 +3051,7 @@ model_test_lduh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ld_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_plus.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3067,7 +3067,7 @@ model_test_ld_plus (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ld24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld24.f +#define FLD(f) abuf->fields.sfmt_ld24.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3083,7 +3083,7 @@ model_test_ld24 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldi8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_addi.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3099,7 +3099,7 @@ model_test_ldi8 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_ldi16 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi16.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3115,7 +3115,7 @@ model_test_ldi16 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_lock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lock.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3131,7 +3131,7 @@ model_test_lock (SIM_CPU *current_cpu, void *sem_arg) static int model_test_machi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3147,7 +3147,7 @@ model_test_machi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_maclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3163,7 +3163,7 @@ model_test_maclo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_macwhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3179,7 +3179,7 @@ model_test_macwhi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_macwlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3195,7 +3195,7 @@ model_test_macwlo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3211,7 +3211,7 @@ model_test_mul (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mulhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3227,7 +3227,7 @@ model_test_mulhi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mullo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3243,7 +3243,7 @@ model_test_mullo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mulwhi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3259,7 +3259,7 @@ model_test_mulwhi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mulwlo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3275,7 +3275,7 @@ model_test_mulwlo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3291,7 +3291,7 @@ model_test_mv (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvfachi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3307,7 +3307,7 @@ model_test_mvfachi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3323,7 +3323,7 @@ model_test_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3339,7 +3339,7 @@ model_test_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvfc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfc.f +#define FLD(f) abuf->fields.sfmt_mvfc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3355,7 +3355,7 @@ model_test_mvfc (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvtachi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3371,7 +3371,7 @@ model_test_mvtachi (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3387,7 +3387,7 @@ model_test_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) static int model_test_mvtc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtc.f +#define FLD(f) abuf->fields.sfmt_mvtc.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3403,7 +3403,7 @@ model_test_mvtc (SIM_CPU *current_cpu, void *sem_arg) static int model_test_neg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3419,7 +3419,7 @@ model_test_neg (SIM_CPU *current_cpu, void *sem_arg) static int model_test_nop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_nop.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3435,7 +3435,7 @@ model_test_nop (SIM_CPU *current_cpu, void *sem_arg) static int model_test_not (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3451,7 +3451,7 @@ model_test_not (SIM_CPU *current_cpu, void *sem_arg) static int model_test_rac (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3467,7 +3467,7 @@ model_test_rac (SIM_CPU *current_cpu, void *sem_arg) static int model_test_rach (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3483,7 +3483,7 @@ model_test_rach (SIM_CPU *current_cpu, void *sem_arg) static int model_test_rte (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f +#define FLD(f) abuf->fields.fmt_empty.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3499,7 +3499,7 @@ model_test_rte (SIM_CPU *current_cpu, void *sem_arg) static int model_test_seth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_seth.f +#define FLD(f) abuf->fields.sfmt_seth.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3515,7 +3515,7 @@ model_test_seth (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sll (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3531,7 +3531,7 @@ model_test_sll (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sll3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3547,7 +3547,7 @@ model_test_sll3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_slli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3563,7 +3563,7 @@ model_test_slli (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sra (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3579,7 +3579,7 @@ model_test_sra (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sra3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3595,7 +3595,7 @@ model_test_sra3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_srai (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3611,7 +3611,7 @@ model_test_srai (SIM_CPU *current_cpu, void *sem_arg) static int model_test_srl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3627,7 +3627,7 @@ model_test_srl (SIM_CPU *current_cpu, void *sem_arg) static int model_test_srl3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3643,7 +3643,7 @@ model_test_srl3 (SIM_CPU *current_cpu, void *sem_arg) static int model_test_srli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3659,7 +3659,7 @@ model_test_srli (SIM_CPU *current_cpu, void *sem_arg) static int model_test_st (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3675,7 +3675,7 @@ model_test_st (SIM_CPU *current_cpu, void *sem_arg) static int model_test_st_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3691,7 +3691,7 @@ model_test_st_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_stb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3707,7 +3707,7 @@ model_test_stb (SIM_CPU *current_cpu, void *sem_arg) static int model_test_stb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3723,7 +3723,7 @@ model_test_stb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3739,7 +3739,7 @@ model_test_sth (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sth_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3755,7 +3755,7 @@ model_test_sth_d (SIM_CPU *current_cpu, void *sem_arg) static int model_test_st_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3771,7 +3771,7 @@ model_test_st_plus (SIM_CPU *current_cpu, void *sem_arg) static int model_test_st_minus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3787,7 +3787,7 @@ model_test_st_minus (SIM_CPU *current_cpu, void *sem_arg) static int model_test_sub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3803,7 +3803,7 @@ model_test_sub (SIM_CPU *current_cpu, void *sem_arg) static int model_test_subv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3819,7 +3819,7 @@ model_test_subv (SIM_CPU *current_cpu, void *sem_arg) static int model_test_subx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3835,7 +3835,7 @@ model_test_subx (SIM_CPU *current_cpu, void *sem_arg) static int model_test_trap (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f +#define FLD(f) abuf->fields.sfmt_trap.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; @@ -3851,7 +3851,7 @@ model_test_trap (SIM_CPU *current_cpu, void *sem_arg) static int model_test_unlock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_unlock.f +#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; diff --git a/sim/m32r/sem-switch.c b/sim/m32r/sem-switch.c index 673b83680e2..cd7e8da2332 100644 --- a/sim/m32r/sem-switch.c +++ b/sim/m32r/sem-switch.c @@ -142,11 +142,13 @@ with this program; if not, write to the Free Software Foundation, Inc., int i; for (i = 0; labels[i].label != 0; ++i) + { #if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; #else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; + CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; #endif + } #undef DEFINE_LABELS #endif /* DEFINE_LABELS */ @@ -266,12 +268,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) #if WITH_SCACHE_PBB_M32RBF #ifdef DEFINE_SWITCH vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -332,7 +334,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -351,7 +353,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add3.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -370,7 +372,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -389,7 +391,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -408,7 +410,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -427,7 +429,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_or3.f +#define FLD(f) abuf->fields.sfmt_and3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -446,7 +448,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -465,7 +467,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -484,7 +486,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -503,7 +505,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -532,7 +534,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addv3.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -561,7 +563,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -590,7 +592,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -599,7 +601,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) if (CPU (h_cond)) { { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -615,7 +617,7 @@ if (CPU (h_cond)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -624,7 +626,7 @@ if (CPU (h_cond)) { if (CPU (h_cond)) { { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -640,7 +642,7 @@ if (CPU (h_cond)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -649,7 +651,7 @@ if (CPU (h_cond)) { if (EQSI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -665,7 +667,7 @@ if (EQSI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -674,7 +676,7 @@ if (EQSI (* FLD (i_src1), * FLD (i_src2))) { if (EQSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -690,7 +692,7 @@ if (EQSI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -699,7 +701,7 @@ if (EQSI (* FLD (i_src2), 0)) { if (GESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -715,7 +717,7 @@ if (GESI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -724,7 +726,7 @@ if (GESI (* FLD (i_src2), 0)) { if (GTSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -740,7 +742,7 @@ if (GTSI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -749,7 +751,7 @@ if (GTSI (* FLD (i_src2), 0)) { if (LESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -765,7 +767,7 @@ if (LESI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -774,7 +776,7 @@ if (LESI (* FLD (i_src2), 0)) { if (LTSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -790,7 +792,7 @@ if (LTSI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -799,7 +801,7 @@ if (LTSI (* FLD (i_src2), 0)) { if (NESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -815,7 +817,7 @@ if (NESI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f +#define FLD(f) abuf->fields.sfmt_bl8.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -829,7 +831,7 @@ if (NESI (* FLD (i_src2), 0)) { } { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -843,7 +845,7 @@ if (NESI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f +#define FLD(f) abuf->fields.sfmt_bl24.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -857,7 +859,7 @@ if (NESI (* FLD (i_src2), 0)) { } { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -871,7 +873,7 @@ if (NESI (* FLD (i_src2), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -880,7 +882,7 @@ if (NESI (* FLD (i_src2), 0)) { if (NOTBI (CPU (h_cond))) { { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -896,7 +898,7 @@ if (NOTBI (CPU (h_cond))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -905,7 +907,7 @@ if (NOTBI (CPU (h_cond))) { if (NOTBI (CPU (h_cond))) { { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -921,7 +923,7 @@ if (NOTBI (CPU (h_cond))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -930,7 +932,7 @@ if (NOTBI (CPU (h_cond))) { if (NESI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -946,7 +948,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f +#define FLD(f) abuf->fields.sfmt_bl8.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -954,7 +956,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -967,7 +969,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f +#define FLD(f) abuf->fields.sfmt_bl24.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -975,7 +977,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -988,7 +990,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1007,7 +1009,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1026,7 +1028,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1045,7 +1047,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1064,7 +1066,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1087,7 +1089,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1110,7 +1112,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1133,7 +1135,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1156,7 +1158,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f +#define FLD(f) abuf->fields.sfmt_jl.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -1187,7 +1189,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mvtc.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -1208,7 +1210,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1227,7 +1229,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_d.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1246,7 +1248,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1265,7 +1267,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1284,7 +1286,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1303,7 +1305,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1322,7 +1324,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1341,7 +1343,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1360,7 +1362,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1379,7 +1381,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1398,7 +1400,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld_plus.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1427,7 +1429,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ld24.f +#define FLD(f) abuf->fields.sfmt_ld24.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1446,7 +1448,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_addi.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1465,7 +1467,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_ldi16.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -1484,7 +1486,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_lock.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1510,7 +1512,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1529,7 +1531,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1548,7 +1550,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1567,7 +1569,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1586,7 +1588,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1605,7 +1607,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1624,7 +1626,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1643,7 +1645,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1662,7 +1664,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1681,7 +1683,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1700,7 +1702,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1719,7 +1721,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1738,7 +1740,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1757,7 +1759,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvfc.f +#define FLD(f) abuf->fields.sfmt_mvfc.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1776,7 +1778,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1795,7 +1797,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1814,7 +1816,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mvtc.f +#define FLD(f) abuf->fields.sfmt_mvtc.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1833,7 +1835,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1852,7 +1854,7 @@ if (NESI (* FLD (i_sr), 0)) { { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_nop.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1867,7 +1869,7 @@ PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1886,7 +1888,7 @@ PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1910,7 +1912,7 @@ PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -1943,7 +1945,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f +#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -1981,7 +1983,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_seth.f +#define FLD(f) abuf->fields.sfmt_seth.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2000,7 +2002,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2019,7 +2021,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2038,7 +2040,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2057,7 +2059,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2076,7 +2078,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2095,7 +2097,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2114,7 +2116,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2133,7 +2135,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2152,7 +2154,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2171,7 +2173,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2190,7 +2192,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2209,7 +2211,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stb.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2228,7 +2230,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_stb_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2247,7 +2249,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_sth.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2266,7 +2268,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_sth_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); @@ -2285,7 +2287,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2313,7 +2315,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2341,7 +2343,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2360,7 +2362,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2389,7 +2391,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); @@ -2418,7 +2420,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f +#define FLD(f) abuf->fields.sfmt_trap.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; SEM_BRANCH_INIT @@ -2466,7 +2468,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 { SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_unlock.f +#define FLD(f) abuf->fields.sfmt_st_plus.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 2); diff --git a/sim/m32r/sem.c b/sim/m32r/sem.c index 03b0a6fc6c3..b337bb86bc7 100644 --- a/sim/m32r/sem.c +++ b/sim/m32r/sem.c @@ -32,9 +32,20 @@ with this program; if not, write to the Free Software Foundation, Inc., #undef GET_ATTR #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) +/* This is used so that we can compile two copies of the semantic code, + one with full feature support and one without that runs fast(er). + FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ +#if FAST_P +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) +#undef TRACE_RESULT +#define TRACE_RESULT(cpu, abuf, name, type, val) +#else +#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) +#endif + /* x-invalid: --invalid-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -59,7 +70,7 @@ SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-after: --after-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -80,7 +91,7 @@ SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-before: --before-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -101,7 +112,7 @@ SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-cti-chain: --cti-chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -114,12 +125,12 @@ SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) #if WITH_SCACHE_PBB_M32RBF #ifdef DEFINE_SWITCH vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_npc_ptr, pbb_br_npc); + pbb_br_type, pbb_br_npc); BREAK (sem); #else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_NPC_PTR (current_cpu), + CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu)); #endif #endif @@ -131,7 +142,7 @@ SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-chain: --chain-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -155,7 +166,7 @@ SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* x-begin: --begin-- */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { #define FLD(f) abuf->fields.fmt_empty.f @@ -182,10 +193,10 @@ SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* add: add $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -203,10 +214,10 @@ SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* add3: add3 $dr,$sr,$hash$slo16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add3.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -224,10 +235,10 @@ SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and: and $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -245,10 +256,10 @@ SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* and3: and3 $dr,$sr,$uimm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -266,10 +277,10 @@ SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or: or $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -287,10 +298,10 @@ SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* or3: or3 $dr,$sr,$hash$ulo16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_or3.f +#define FLD(f) abuf->fields.sfmt_and3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -308,10 +319,10 @@ SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor: xor $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -329,10 +340,10 @@ SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* xor3: xor3 $dr,$sr,$uimm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f +#define FLD(f) abuf->fields.sfmt_and3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -350,10 +361,10 @@ SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addi: addi $dr,$simm8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -371,10 +382,10 @@ SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addv: addv $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -402,10 +413,10 @@ SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addv3: addv3 $dr,$sr,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addv3.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -433,10 +444,10 @@ SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* addx: addx $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -464,10 +475,10 @@ SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bc8: bc.s $disp8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -477,7 +488,7 @@ SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_cond)) { { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -491,10 +502,10 @@ if (CPU (h_cond)) { /* bc24: bc.l $disp24 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -504,7 +515,7 @@ SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (CPU (h_cond)) { { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -518,10 +529,10 @@ if (CPU (h_cond)) { /* beq: beq $src1,$src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -531,7 +542,7 @@ SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -545,10 +556,10 @@ if (EQSI (* FLD (i_src1), * FLD (i_src2))) { /* beqz: beqz $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -558,7 +569,7 @@ SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -572,10 +583,10 @@ if (EQSI (* FLD (i_src2), 0)) { /* bgez: bgez $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -585,7 +596,7 @@ SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -599,10 +610,10 @@ if (GESI (* FLD (i_src2), 0)) { /* bgtz: bgtz $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -612,7 +623,7 @@ SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (GTSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -626,10 +637,10 @@ if (GTSI (* FLD (i_src2), 0)) { /* blez: blez $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -639,7 +650,7 @@ SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -653,10 +664,10 @@ if (LESI (* FLD (i_src2), 0)) { /* bltz: bltz $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -666,7 +677,7 @@ SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (LTSI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -680,10 +691,10 @@ if (LTSI (* FLD (i_src2), 0)) { /* bnez: bnez $src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -693,7 +704,7 @@ SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (* FLD (i_src2), 0)) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -707,10 +718,10 @@ if (NESI (* FLD (i_src2), 0)) { /* bl8: bl.s $disp8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f +#define FLD(f) abuf->fields.sfmt_bl8.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -725,7 +736,7 @@ SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) } { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -737,10 +748,10 @@ SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bl24: bl.l $disp24 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f +#define FLD(f) abuf->fields.sfmt_bl24.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -755,7 +766,7 @@ SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) } { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } } @@ -767,10 +778,10 @@ SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bnc8: bnc.s $disp8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f +#define FLD(f) abuf->fields.sfmt_bl8.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -780,7 +791,7 @@ SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_cond))) { { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -794,10 +805,10 @@ if (NOTBI (CPU (h_cond))) { /* bnc24: bnc.l $disp24 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f +#define FLD(f) abuf->fields.sfmt_bl24.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -807,7 +818,7 @@ SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NOTBI (CPU (h_cond))) { { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 2); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -821,10 +832,10 @@ if (NOTBI (CPU (h_cond))) { /* bne: bne $src1,$src2,$disp16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f +#define FLD(f) abuf->fields.sfmt_beq.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -834,7 +845,7 @@ SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (NESI (* FLD (i_src1), * FLD (i_src2))) { { USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -848,10 +859,10 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) { /* bra8: bra.s $disp8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f +#define FLD(f) abuf->fields.sfmt_bl8.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -860,7 +871,7 @@ SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -871,10 +882,10 @@ SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* bra24: bra.l $disp24 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f +#define FLD(f) abuf->fields.sfmt_bl24.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -883,7 +894,7 @@ SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); + SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); } @@ -894,10 +905,10 @@ SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmp: cmp $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -915,10 +926,10 @@ SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpi: cmpi $src2,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -936,10 +947,10 @@ SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpu: cmpu $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -957,10 +968,10 @@ SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* cmpui: cmpui $src2,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f +#define FLD(f) abuf->fields.sfmt_st_d.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -978,10 +989,10 @@ SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* div: div $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1003,10 +1014,10 @@ if (NESI (* FLD (i_sr), 0)) { /* divu: divu $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1028,10 +1039,10 @@ if (NESI (* FLD (i_sr), 0)) { /* rem: rem $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1053,10 +1064,10 @@ if (NESI (* FLD (i_sr), 0)) { /* remu: remu $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1078,10 +1089,10 @@ if (NESI (* FLD (i_sr), 0)) { /* jl: jl $sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f +#define FLD(f) abuf->fields.sfmt_jl.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1111,10 +1122,10 @@ SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* jmp: jmp $sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f +#define FLD(f) abuf->fields.sfmt_mvtc.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1134,10 +1145,10 @@ SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld: ld $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1155,10 +1166,10 @@ SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-d: ld $dr,@($slo16,$sr) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_d.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1176,10 +1187,10 @@ SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldb: ldb $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1197,10 +1208,10 @@ SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldb-d: ldb $dr,@($slo16,$sr) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1218,10 +1229,10 @@ SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldh: ldh $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1239,10 +1250,10 @@ SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldh-d: ldh $dr,@($slo16,$sr) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1260,10 +1271,10 @@ SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldub: ldub $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1281,10 +1292,10 @@ SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldub-d: ldub $dr,@($slo16,$sr) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1302,10 +1313,10 @@ SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lduh: lduh $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1323,10 +1334,10 @@ SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lduh-d: lduh $dr,@($slo16,$sr) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1344,10 +1355,10 @@ SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld-plus: ld $dr,@$sr+ */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_plus.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1375,10 +1386,10 @@ SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ld24: ld24 $dr,$uimm24 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ld24.f +#define FLD(f) abuf->fields.sfmt_ld24.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1396,10 +1407,10 @@ SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldi8: ldi8 $dr,$simm8 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f +#define FLD(f) abuf->fields.sfmt_addi.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1417,10 +1428,10 @@ SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* ldi16: ldi16 $dr,$hash$slo16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi16.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1438,10 +1449,10 @@ SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* lock: lock $dr,@$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_lock.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1466,10 +1477,10 @@ SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* machi: machi $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1487,10 +1498,10 @@ SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* maclo: maclo $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1508,10 +1519,10 @@ SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* macwhi: macwhi $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1529,10 +1540,10 @@ SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* macwlo: macwlo $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_machi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1550,10 +1561,10 @@ SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mul: mul $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1571,10 +1582,10 @@ SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulhi: mulhi $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1592,10 +1603,10 @@ SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mullo: mullo $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1613,10 +1624,10 @@ SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulwhi: mulwhi $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1634,10 +1645,10 @@ SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mulwlo: mulwlo $src1,$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1655,10 +1666,10 @@ SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mv: mv $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1676,10 +1687,10 @@ SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvfachi: mvfachi $dr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1697,10 +1708,10 @@ SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvfaclo: mvfaclo $dr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1718,10 +1729,10 @@ SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvfacmi: mvfacmi $dr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi.f +#define FLD(f) abuf->fields.sfmt_seth.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1739,10 +1750,10 @@ SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvfc: mvfc $dr,$scr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfc.f +#define FLD(f) abuf->fields.sfmt_mvfc.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1760,10 +1771,10 @@ SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvtachi: mvtachi $src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1781,10 +1792,10 @@ SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvtaclo: mvtaclo $src1 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1802,10 +1813,10 @@ SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* mvtc: mvtc $sr,$dcr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtc.f +#define FLD(f) abuf->fields.sfmt_mvtc.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1823,10 +1834,10 @@ SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* neg: neg $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1844,10 +1855,10 @@ SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* nop: nop */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_nop.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1861,10 +1872,10 @@ PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); /* not: not $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f +#define FLD(f) abuf->fields.sfmt_ld_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1882,10 +1893,10 @@ SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* rac: rac */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1908,10 +1919,10 @@ SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* rach: rach */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_rac.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1943,10 +1954,10 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083 /* rte: rte */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f +#define FLD(f) abuf->fields.fmt_empty.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -1983,10 +1994,10 @@ SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* seth: seth $dr,$hash$hi16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_seth.f +#define FLD(f) abuf->fields.sfmt_seth.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2004,10 +2015,10 @@ SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sll: sll $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2025,10 +2036,10 @@ SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sll3: sll3 $dr,$sr,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2046,10 +2057,10 @@ SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* slli: slli $dr,$uimm5 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2067,10 +2078,10 @@ SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sra: sra $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2088,10 +2099,10 @@ SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sra3: sra3 $dr,$sr,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2109,10 +2120,10 @@ SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* srai: srai $dr,$uimm5 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2130,10 +2141,10 @@ SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* srl: srl $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2151,10 +2162,10 @@ SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* srl3: srl3 $dr,$sr,$simm16 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f +#define FLD(f) abuf->fields.sfmt_add3.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2172,10 +2183,10 @@ SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* srli: srli $dr,$uimm5 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f +#define FLD(f) abuf->fields.sfmt_slli.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2193,10 +2204,10 @@ SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st: st $src1,@$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2214,10 +2225,10 @@ SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-d: st $src1,@($slo16,$src2) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2235,10 +2246,10 @@ SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stb: stb $src1,@$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stb.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2256,10 +2267,10 @@ SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* stb-d: stb $src1,@($slo16,$src2) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_stb_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2277,10 +2288,10 @@ SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sth: sth $src1,@$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_sth.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2298,10 +2309,10 @@ SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sth-d: sth $src1,@($slo16,$src2) */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_sth_d.f +#define FLD(f) abuf->fields.sfmt_st_d.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2319,10 +2330,10 @@ SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-plus: st $src1,@+$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2349,10 +2360,10 @@ SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* st-minus: st $src1,@-$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2379,10 +2390,10 @@ SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* sub: sub $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2400,10 +2411,10 @@ SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subv: subv $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2431,10 +2442,10 @@ SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* subx: subx $dr,$sr */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f +#define FLD(f) abuf->fields.sfmt_add.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2462,10 +2473,10 @@ SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* trap: trap $uimm4 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f +#define FLD(f) abuf->fields.sfmt_trap.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2512,10 +2523,10 @@ SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) /* unlock: unlock $src1,@$src2 */ -SEM_PC +static SEM_PC SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { -#define FLD(f) abuf->fields.fmt_unlock.f +#define FLD(f) abuf->fields.sfmt_st_plus.f ARGBUF *abuf = SEM_ARGBUF (sem_arg); int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; @@ -2542,3 +2553,132 @@ if (CPU (h_lock)) { #undef FLD } +/* Table of all semantic fns. */ + +static const struct sem_fn_desc sem_fns[] = { + { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) }, + { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) }, + { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) }, + { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) }, + { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) }, + { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) }, + { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) }, + { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) }, + { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) }, + { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) }, + { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) }, + { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) }, + { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) }, + { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) }, + { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) }, + { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) }, + { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) }, + { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) }, + { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) }, + { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) }, + { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) }, + { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) }, + { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) }, + { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) }, + { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) }, + { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) }, + { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) }, + { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) }, + { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) }, + { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) }, + { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) }, + { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) }, + { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) }, + { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) }, + { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) }, + { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) }, + { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) }, + { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) }, + { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) }, + { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) }, + { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) }, + { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) }, + { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) }, + { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) }, + { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) }, + { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) }, + { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) }, + { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) }, + { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) }, + { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) }, + { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) }, + { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) }, + { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) }, + { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) }, + { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) }, + { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) }, + { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) }, + { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) }, + { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) }, + { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) }, + { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) }, + { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) }, + { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) }, + { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) }, + { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) }, + { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) }, + { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) }, + { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) }, + { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) }, + { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) }, + { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) }, + { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) }, + { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) }, + { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) }, + { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) }, + { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) }, + { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) }, + { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) }, + { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) }, + { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) }, + { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) }, + { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) }, + { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) }, + { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) }, + { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) }, + { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) }, + { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) }, + { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) }, + { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) }, + { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) }, + { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) }, + { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) }, + { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) }, + { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) }, + { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) }, + { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) }, + { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) }, + { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) }, + { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) }, + { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) }, + { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) }, + { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) }, + { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) }, + { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) }, + { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) }, + { 0, 0 } +}; + +/* Add the semantic fns to IDESC_TABLE. */ + +void +SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu) +{ + IDESC *idesc_table = CPU_IDESC (current_cpu); + const struct sem_fn_desc *sf; + + for (sf = &sem_fns[0]; sf->fn != 0; ++sf) + { +#if FAST_P + idesc_table[sf->index].sem_fast = sf->fn; +#else + idesc_table[sf->index].sem_full = sf->fn; +#endif + } +} + |