2003-11-15 Andrew Cagney <cagney@redhat.com>

	* mips-tdep.c (mips_register_type): Simplify.  Eliminate reference
	to MIPS_REGISTER_TYPE.  Make integer registers signed.  Make IRIX
	n32 registers 64 bit.
	(mips_register_raw_size, mips_register_byte): For pseudo
	registers, use the register's pseudo size and not the
	corresponding raw register's size.
	* config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Delete macro.
	* config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Delete macro.
	* config/mips/tm-irix6.h: Don't #undef MIPS_REGISTER_TYPE.
	* config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Delete macro.

6 files changed, 47 insertions, 63 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index f84f9f860e2..08df945ff5e 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,18 @@
 2003-11-15  Andrew Cagney  <cagney@redhat.com>
 
+	* mips-tdep.c (mips_register_type): Simplify.  Eliminate reference
+	to MIPS_REGISTER_TYPE.  Make integer registers signed.  Make IRIX
+	n32 registers 64 bit.
+	(mips_register_raw_size, mips_register_byte): For pseudo
+	registers, use the register's pseudo size and not the
+	corresponding raw register's size.
+	* config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Delete macro.
+	* config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Delete macro.
+	* config/mips/tm-irix6.h: Don't #undef MIPS_REGISTER_TYPE.
+	* config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Delete macro.
+
+2003-11-15  Andrew Cagney  <cagney@redhat.com>
+
 	* mips-tdep.c (struct gdbarch_tdep): Delete member
 	gdb_target_is_mips64.
 	(GDB_TARGET_IS_MIPS64): Delete macro.
diff --git a/gdb/config/mips/tm-irix5.h b/gdb/config/mips/tm-irix5.h
index d7e1938aa00..da440b63e24 100644
--- a/gdb/config/mips/tm-irix5.h
+++ b/gdb/config/mips/tm-irix5.h
@@ -84,13 +84,6 @@
       ((N) - FP0_REGNUM) * sizeof(double) : \
       32 * sizeof(double) + ((N) - 32) * mips_regsize (current_gdbarch))
 
-#undef  MIPS_REGISTER_TYPE
-#define MIPS_REGISTER_TYPE(N) \
-	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
-	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
-	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
-	 : builtin_type_int)
-
 #endif /* N32 */
 
 
diff --git a/gdb/config/mips/tm-irix6.h b/gdb/config/mips/tm-irix6.h
index 4d63001c2b1..385923cb64e 100644
--- a/gdb/config/mips/tm-irix6.h
+++ b/gdb/config/mips/tm-irix6.h
@@ -92,10 +92,3 @@
 #undef SIGFRAME_FPREGSAVE_OFF
 #define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
 #define SIGFRAME_REG_SIZE	8
-
-/* Undefine those methods which have been multiarched.  */
-
-/* Undefine MIPS_REGISTER_TYPE, so that GDB uses real C code in
-   mips_register_type() to return the register type, instead of
-   relying on this macro.  */
-#undef MIPS_REGISTER_TYPE
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index 35aa8888774..1da59fbfbf8 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -94,17 +94,6 @@ extern int mips_step_skips_delay (CORE_ADDR);
 
 #define MIPS_REGISTER_BYTE(N) ((N) * mips_regsize (current_gdbarch))
 
-/* Return the GDB type object for the "standard" data type of data in
-   register N.  */
-
-#ifndef MIPS_REGISTER_TYPE
-#define MIPS_REGISTER_TYPE(N) \
-	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
-	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
-	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
-	 : builtin_type_int)
-#endif
-
 /* Special symbol found in blocks associated with routines.  We can hang
    mips_extra_func_info_t's off of this.  */
 
diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h
index bce76cfb6fb..502a27b546d 100644
--- a/gdb/config/mips/tm-mips64.h
+++ b/gdb/config/mips/tm-mips64.h
@@ -19,13 +19,6 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-/* define 8 byte register type */
-#define MIPS_REGISTER_TYPE(N) \
-        (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
-	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
-	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
-	 : builtin_type_long_long)
-
 /* Load double words in CALL_DUMMY.  */
 #define OP_LDFPR 065		/* ldc1 */
 #define OP_LDGPR 067		/* ld */
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 9342c409d3a..962e821f997 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -649,9 +649,8 @@ mips_register_raw_size (int regnum)
   else if (regnum < 2 * NUM_REGS)
     {
       /* For the moment map [NUM_REGS .. 2*NUM_REGS) onto the same raw
-	 registers, but always return the virtual size.  */
-      int rawnum = regnum % NUM_REGS;
-      return TYPE_LENGTH (gdbarch_register_type (current_gdbarch, rawnum));
+	 registers, but return the register's virtual size.  */
+      return TYPE_LENGTH (gdbarch_register_type (current_gdbarch, regnum));
     }
   else
     internal_error (__FILE__, __LINE__, "Register %d out of range", regnum);
@@ -681,8 +680,7 @@ mips_register_byte (int regnum)
       /* Add space for all the proceeding registers based on their
          real size.  */
       for (reg = NUM_REGS; reg < regnum; reg++)
-	byte += TYPE_LENGTH (gdbarch_register_type (current_gdbarch,
-                                                    (reg % NUM_REGS)));
+	byte += TYPE_LENGTH (gdbarch_register_type (current_gdbarch, reg));
       return byte;
     }
   else
@@ -762,35 +760,40 @@ mips_value_to_register (struct frame_info *frame, int regnum,
 static struct type *
 mips_register_type (struct gdbarch *gdbarch, int regnum)
 {
-  /* For moment, map [NUM_REGS .. 2*NUM_REGS) onto the same raw
-     registers.  Even return the same type.  */
-  int rawnum = regnum % NUM_REGS;
-  gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
-#ifdef MIPS_REGISTER_TYPE
-  return MIPS_REGISTER_TYPE (rawnum);
-#else
-  if (FP0_REGNUM <= rawnum && rawnum < FP0_REGNUM + 32)
+  gdb_assert (regnum >= 0 && regnum < 2 * NUM_REGS);
+  if ((regnum % NUM_REGS) >= FP0_REGNUM
+      && (regnum % NUM_REGS) < FP0_REGNUM + 32)
     {
-      /* Floating point registers...  */
-      if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
-	return builtin_type_ieee_double_big;
-      else
-	return builtin_type_ieee_double_little;
+      /* The floating-point registers raw, or cooked, always match
+         mips_regsize(), and also map 1:1, byte for byte.  */
+      switch (gdbarch_byte_order (gdbarch))
+	{
+	case BFD_ENDIAN_BIG:
+	  if (mips_regsize (gdbarch) == 4)
+	    return builtin_type_ieee_single_big;
+	  else
+	    return builtin_type_ieee_double_big;
+	case BFD_ENDIAN_LITTLE:
+	  if (mips_regsize (gdbarch) == 4)
+	    return builtin_type_ieee_single_little;
+	  else
+	    return builtin_type_ieee_double_little;
+	case BFD_ENDIAN_UNKNOWN:
+	default:
+	  internal_error (__FILE__, __LINE__, "bad switch");
+	}
     }
-  else if (rawnum == PS_REGNUM /* CR */)
-    return builtin_type_uint32;
-  else if (FCRCS_REGNUM <= rawnum && rawnum <= LAST_EMBED_REGNUM)
-    return builtin_type_uint32;
+  else if (regnum >= (NUM_REGS + FCRCS_REGNUM)
+	   && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
+    /* The pseudo/cooked view of the embedded registers is always
+       32-bit.  The raw view is handled below.  */
+    return builtin_type_int32;
+  else if (mips_regsize (gdbarch) == 8)
+    /* 64-bit ISA.  */
+    return builtin_type_int64;
   else
-    {
-      /* Everything else...
-         Return type appropriate for width of register.  */
-      if (mips_regsize (current_gdbarch) == TYPE_LENGTH (builtin_type_uint64))
-	return builtin_type_uint64;
-      else
-	return builtin_type_uint32;
-    }
-#endif
+    /* 32-bit ISA.  */
+    return builtin_type_int32;
 }
 
 /* TARGET_READ_SP -- Remove useless bits from the stack pointer.  */