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authorqiyao <qiyao>2011-03-02 05:33:35 +0000
committerqiyao <qiyao>2011-03-02 05:33:35 +0000
commite4a866e5deacf2bf6cafcd462d41667e6fa032ca (patch)
tree7a0fe12267bfa7457c78277ac1d03ec8aa9b737b /gdb/arm-tdep.h
parenta3e4477602283c0e534ca49af0bf09b256a50bf0 (diff)
downloadgdb-e4a866e5deacf2bf6cafcd462d41667e6fa032ca.tar.gz
2011-03-02 Yao Qi <yao@codesourcery.com>
* arm-tdep.h (struct displaced_step_closure): Add two new fields is_thumb and insn_size. * arm-tdep.c (displaced_read_reg): Adjust correct pipeline offset on both ARM and Thumb mode. (arm_process_displaced_insn): Set is_thumb and insn_size. (arm_displaced_init_closure): Handle both 16-bit and 32-bit. (arm_displaced_step_fixup): Likewise.
Diffstat (limited to 'gdb/arm-tdep.h')
-rw-r--r--gdb/arm-tdep.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index de3f6cca769..362be2e7e26 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -262,6 +262,17 @@ struct displaced_step_closure
struct displaced_step_closure *dsc);
} svc;
} u;
+
+ /* The size of original instruction, 2 or 4. */
+ unsigned int insn_size;
+ /* True if the original insn (and thus all replacement insns) are Thumb
+ instead of ARM. */
+ unsigned int is_thumb;
+
+ /* The slots in the array is used in this way below,
+ - ARM instruction occupies one slot,
+ - Thumb 16 bit instruction occupies one slot,
+ - Thumb 32-bit instruction occupies *two* slots, one part for each. */
unsigned long modinsn[DISPLACED_MODIFIED_INSNS];
int numinsns;
CORE_ADDR insn_addr;