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authorUlrich Weigand <uweigand@de.ibm.com>2007-06-12 14:35:26 +0000
committerUlrich Weigand <uweigand@de.ibm.com>2007-06-12 14:35:26 +0000
commitde163a2cd8fc973b54630419dde23ada88833572 (patch)
tree505a4a5c64cbe92103b5f828b1e939530fe4b79b /gdb/spu-tdep.h
parent81f16b098bb8630046a04a1950e443218e3520c4 (diff)
downloadgdb-de163a2cd8fc973b54630419dde23ada88833572.tar.gz
* target.h (enum target_object): Add TARGET_OBJECT_SPU.
* spu-linux-nat.c (spu_xfer_partial): Handle TARGET_OBJECT_SPU. * spu-tdep.h (SPU_NUM_PSEUDO_REGS): Add 5 pseudo registers. (enum spu_regnum): Add SPU_FPSCR_REGNUM, SPU_SRR0_REGNUM, SPU_LSLR_REGNUM, SPU_DECR_REGNUM, SPU_DECR_STATUS_REGNUM. * spu-tdep.c (infospucmdlist): New variable. (spu_register_name): Handle additional pseudo registers. (spu_register_type): Likewise. (spu_pseudo_register_read): Likewise. (spu_pseudo_register_write): Likewise. (spu_pseudo_register_read_spu): New function. (spu_pseudo_register_write_spu): Likewise. (info_spu_event_command): New function. (info_spu_signal_command): Likewise. (info_spu_mailbox_list): Likewise. (info_spu_mailbox_command): Likewise. (spu_mfc_get_bitfield): Likewise. (info_spu_dma_cmdlist): Likewise. (info_spu_dma_command): Likewise. (info_spu_proxydma_command): Likewise. (info_spu_command): Likewise. (_initialize_spu_tdep): Install "info spu" commands. testsuite/ChangeLog: * gdb.arch/spu-info.exp: New testcase. * gdb.arch/spu-info.c: New file. doc/ChangeLog: * gdb.texinfo (Architectures): Add new SPU section to document Cell Broadband Engine SPU architecture specific commands.
Diffstat (limited to 'gdb/spu-tdep.h')
-rw-r--r--gdb/spu-tdep.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/gdb/spu-tdep.h b/gdb/spu-tdep.h
index 7d0df185391..d573608393d 100644
--- a/gdb/spu-tdep.h
+++ b/gdb/spu-tdep.h
@@ -23,7 +23,7 @@
/* Number of registers. */
#define SPU_NUM_REGS 130
-#define SPU_NUM_PSEUDO_REGS 1
+#define SPU_NUM_PSEUDO_REGS 6
#define SPU_NUM_GPRS 128
/* Register numbers of various important registers. */
@@ -41,7 +41,12 @@ enum spu_regnum
/* Special registers. */
SPU_ID_REGNUM = 128, /* SPU ID register. */
SPU_PC_REGNUM = 129, /* Next program counter. */
- SPU_SP_REGNUM = 130 /* Stack pointer (preferred slot). */
+ SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */
+ SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */
+ SPU_SRR0_REGNUM = 132, /* SRR0 register. */
+ SPU_LSLR_REGNUM = 133, /* Local store limit register. */
+ SPU_DECR_REGNUM = 134, /* Decrementer value. */
+ SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */
};
/* Local store. */