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authorUlrich Weigand <uweigand@de.ibm.com>2007-10-09 19:54:04 +0000
committerUlrich Weigand <uweigand@de.ibm.com>2007-10-09 19:54:04 +0000
commite6d6a7f64306d90e5a93269e68fbd8726630ad53 (patch)
tree92ccd656f7c0702c012c053f02e3e03ce1aa72a8 /gdb/xtensa-tdep.h
parent720701babdb2b5a96ce270929feeb5cf901635ef (diff)
downloadgdb-e6d6a7f64306d90e5a93269e68fbd8726630ad53.tar.gz
2007-10-09 Markus Deuling <deuling@de.ibm.com>
* xtensa-tdep.c: Replace following current-gdbarch based macros by their expression: (xtensa_pseudo_register_read) (xtensa_pseudo_register_write): XTENSA_TARGET_FLAGS. (ARG_NOF, ARG_1ST, xtensa_extract_return_value) (xtensa_store_return_value, xtensa_push_dummy_call): CALL_ABI. (xtensa_pseudo_register_read) (xtensa_pseudo_register_write): ISA_USE_WINDOWED_REGISTERS. (xtensa_breakpoint_from_pc): ISA_USE_DENSITY_INSTRUCTIONS. (xtensa_register_type, xtensa_supply_gregset, xtensa_frame_cache) (xtensa_frame_prev_register): NUM_AREGS. (xtensa_pseudo_register_read, xtensa_pseudo_register_write, (xtensa_supply_gregset, xtensa_frame_cache, xtensa_frame_prev_register, (xtensa_extract_return_value, xtensa_store_return_value): WB_REGNUM. (xtensa_supply_gregset, xtensa_frame_cache) (xtensa_frame_prev_register): WS_REGNUM. (xtensa_supply_gregset): LBEG_REGNUM, LEND_REGNUM, LCOUNT_REGNUM, SAR_REGNUM, EXCCAUSE_REGNUM, EXCVADDR_REGNUM (xtensa_register_name, xtensa_register_type, xtensa_reg_to_regnum) (xtensa_pseudo_register_read, xtensa_pseudo_register_write) (xtensa_register_reggroup_p): REGMAP. (call0_track_op): LITBASE_REGNUM. (xtensa_register_type, xtensa_reg_to_regnum, call0_frame_cache):A0_BASE (xtensa_supply_gregset, call0_frame_get_reg_at_entry) (xtensa_frame_prev_register, AREG_NUMBER) (xtensa_register_type): AR_BASE. (xtensa_pseudo_register_read, xtensa_pseudo_register_write): FP_ALIAS. (AREG_NUMBER): AREGS_MASK, WB_MASK, A0_REGNUM. (ARG_1ST, xtensa_pseudo_register_read, xtensa_pseudo_register_write) (xtensa_frame_cache, xtensa_frame_prev_register) (xtensa_extract_return_value, xtensa_store_return_value) (xtensa_push_dummy_call, call0_frame_cache): A0_REGNUM. (xtensa_register_type, xtensa_pseudo_register_read, xtensa_frame_cache) (xtensa_pseudo_register_write, xtensa_unwind_dummy_id) (xtensa_frame_prev_register, xtensa_push_dummy_call) (call0_frame_cache): A1_REGNUM. (xtensa_extract_return_value, xtensa_store_return_value): A2_REGNUM. (xtensa_push_dummy_call): A4_REGNUM. (ARGS_FIRST_REG): A6_REGNUM. (xtensa_pseudo_register_read, xtensa_pseudo_register_write) (xtensa_frame_prev_register): A15_REGNUM. * xtensa-tdep.h: Delete current_gdbarch based macros after replacing them in the appropriate source file: XTENSA_TARGET_FLAGS, SPILL_LOCATION, SPILL_SIZE, CALL_ABI, NUM_AREGS, ISA_USE_WINDOWED_REGISTERS, ISA_USE_DENSITY_INSTRUCTIONS, WB_REGNUM, ISA_USE_EXCEPTIONS, ISA_USE_EXT_L32R, DEBUG_DATA_VADDR_TRAP_COUNT, DEBUG_INST_VADDR_TRAP_COUNT, ISA_MAX_INSN_SIZE, DEBUG_NUM_IBREAKS, DEBUG_NUM_DBREAKS, WS_REGNUM, LBEG_REGNUM, LEND_REGNUM, SAR_REGNUM, REGMAP, LITBASE_REGNUM, DEBUGCAUSE_REGNUM, EXCCAUSE_REGNUM, AR_BASE, EXCVADDR_REGNUM, NUM_IBREAKS, REGMAP_BYTES, NUM_CONTEXTS, FP_ALIAS, FP_LAYOUT, FP_LAYOUT_BYTES, GREGMAP, AREGS_MASK, WB_MASK, A0_REGNUM, A1_REGNUM, A2_REGNUM, A3_REGNUM, A4_REGNUM, A5_REGNUM, A6_REGNUM, A7_REGNUM, A8_REGNUM, A9_REGNUM, A10_REGNUM, A11_REGNUM, A12_REGNUM, A13_REGNUM, A14_REGNUM, A15_REGNUM.
Diffstat (limited to 'gdb/xtensa-tdep.h')
-rw-r--r--gdb/xtensa-tdep.h76
1 files changed, 1 insertions, 75 deletions
diff --git a/gdb/xtensa-tdep.h b/gdb/xtensa-tdep.h
index 1765150e2aa..3f8b8cb5417 100644
--- a/gdb/xtensa-tdep.h
+++ b/gdb/xtensa-tdep.h
@@ -105,7 +105,7 @@ typedef struct
xtensa_elf_greg_t ar[0]; /* variable size (per config). */
} xtensa_elf_gregset_t;
-#define SIZEOF_GREGSET (sizeof (xtensa_elf_gregset_t) + NUM_AREGS * 4)
+#define SIZEOF_GREGSET (sizeof (xtensa_elf_gregset_t) + gdbarch_tdep (current_gdbarch)->num_aregs * 4)
#define XTENSA_ELF_NGREG (SIZEOF_GREGSET / sizeof(xtensa_elf_greg_t))
@@ -229,63 +229,6 @@ struct gdbarch_tdep
};
-/* Define macros to access some of the gdbarch entries. */
-#define XTENSA_TARGET_FLAGS \
- (gdbarch_tdep (current_gdbarch)->target_flags)
-#define SPILL_LOCATION \
- (gdbarch_tdep (current_gdbarch)->spill_location)
-#define SPILL_SIZE \
- (gdbarch_tdep (current_gdbarch)->spill_size)
-#define CALL_ABI \
- (gdbarch_tdep (current_gdbarch)->call_abi)
-#define ISA_USE_WINDOWED_REGISTERS \
- (gdbarch_tdep (current_gdbarch)->isa_use_windowed_registers)
-#define ISA_USE_DENSITY_INSTRUCTIONS \
- (gdbarch_tdep (current_gdbarch)->isa_use_density_instructions)
-#define ISA_USE_EXCEPTIONS \
- (gdbarch_tdep (current_gdbarch)->isa_use_exceptions)
-#define ISA_USE_EXT_L32R \
- (gdbarch_tdep (current_gdbarch)->isa_use_ext_l32r)
-#define DEBUG_DATA_VADDR_TRAP_COUNT \
- (gdbarch_tdep (current_gdbarch)->debug_data_vaddr_trap_count)
-#define DEBUG_INST_VADDR_TRAP_COUNT \
- (gdbarch_tdep (current_gdbarch)->debug_inst_vaddr_trap_count)
-#define ISA_MAX_INSN_SIZE \
- (gdbarch_tdep (current_gdbarch)->isa_max_insn_size)
-#define DEBUG_NUM_IBREAKS \
- (gdbarch_tdep (current_gdbarch)->debug_num_ibreaks)
-#define DEBUG_NUM_DBREAKS \
- (gdbarch_tdep (current_gdbarch)->debug_num_dbreaks)
-
-#define NUM_AREGS (gdbarch_tdep (current_gdbarch)->num_aregs)
-#define WB_REGNUM (gdbarch_tdep (current_gdbarch)->wb_regnum)
-#define WS_REGNUM (gdbarch_tdep (current_gdbarch)->ws_regnum)
-#define LBEG_REGNUM (gdbarch_tdep (current_gdbarch)->lbeg_regnum)
-#define LEND_REGNUM (gdbarch_tdep (current_gdbarch)->lend_regnum)
-#define LCOUNT_REGNUM (gdbarch_tdep (current_gdbarch)->lcount_regnum)
-#define SAR_REGNUM (gdbarch_tdep (current_gdbarch)->sar_regnum)
-#define REGMAP (gdbarch_tdep (current_gdbarch)->regmap)
-
-#define LITBASE_REGNUM (gdbarch_tdep (current_gdbarch)->litbase_regnum)
-#define DEBUGCAUSE_REGNUM (gdbarch_tdep (current_gdbarch)->debugcause_regnum)
-#define EXCCAUSE_REGNUM (gdbarch_tdep (current_gdbarch)->exccause_regnum)
-#define EXCVADDR_REGNUM (gdbarch_tdep (current_gdbarch)->excvaddr_regnum)
-#define NUM_IBREAKS (gdbarch_tdep (current_gdbarch)->num_ibreaks)
-#define REGMAP_BYTES (gdbarch_tdep (current_gdbarch)->regmap_bytes)
-#define A0_BASE (gdbarch_tdep (current_gdbarch)->a0_base)
-#define AR_BASE (gdbarch_tdep (current_gdbarch)->ar_base)
-#define FP_ALIAS \
- (gdbarch_num_regs (current_gdbarch) \
- + gdbarch_num_pseudo_regs (current_gdbarch))
-#define CALL_ABI (gdbarch_tdep (current_gdbarch)->call_abi)
-#define NUM_CONTEXTS (gdbarch_tdep (current_gdbarch)->num_contexts)
-
-#define FP_LAYOUT (gdbarch_tdep (current_gdbarch)->fp_layout)
-#define FP_LAYOUT_BYTES (gdbarch_tdep (current_gdbarch)->fp_layout_bytes)
-#define GREGMAP (gdbarch_tdep (current_gdbarch)->gregmap)
-
-#define AREGS_MASK (NUM_AREGS - 1)
-#define WB_MASK (AREGS_MASK >> 2)
#define WB_SHIFT 2
/* We assign fixed numbers to the registers of the "current" window
@@ -293,20 +236,3 @@ struct gdbarch_tdep
data structure to their corresponding register in the AR register
file (see xtensa-tdep.c). */
-#define A0_REGNUM (A0_BASE + 0)
-#define A1_REGNUM (A0_BASE + 1)
-#define A2_REGNUM (A0_BASE + 2)
-#define A3_REGNUM (A0_BASE + 3)
-#define A4_REGNUM (A0_BASE + 4)
-#define A5_REGNUM (A0_BASE + 5)
-#define A6_REGNUM (A0_BASE + 6)
-#define A7_REGNUM (A0_BASE + 7)
-#define A8_REGNUM (A0_BASE + 8)
-#define A9_REGNUM (A0_BASE + 9)
-#define A10_REGNUM (A0_BASE + 10)
-#define A11_REGNUM (A0_BASE + 11)
-#define A12_REGNUM (A0_BASE + 12)
-#define A13_REGNUM (A0_BASE + 13)
-#define A14_REGNUM (A0_BASE + 14)
-#define A15_REGNUM (A0_BASE + 15)
-