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| author | Jim Wilson <wilson@tuliptree.org> | 2005-07-07 19:27:52 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@tuliptree.org> | 2005-07-07 19:27:52 +0000 |
| commit | 2b9f99bb589b904b5962083e0288a29582ffe5d9 (patch) | |
| tree | 0bb9767f54f1485d84c89065cb473504b2990489 /opcodes/arm-dis.c | |
| parent | 5428d3e8a91f577bd6b44b0214c3a87673b236ef (diff) | |
| download | gdb-2b9f99bb589b904b5962083e0288a29582ffe5d9.tar.gz | |
Kaveh Ghazi's printf format attribute checking patch.
bfd:
* elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
format bugs.
* vms.h (_bfd_vms_debug): Add format attribute.
(_bfd_vms_debug, _bfd_hexdump): Fix typos.
binutils:
* bucomm.h (report): Add format attribute.
* dlltool.c (inform): Likewise.
* dllwrap.c (display, inform, warn): Likewise.
* objdump.c (objdump_sprintf): Likewise.
* readelf.c (error, warn): Likewise. Fix format bugs.
gas:
* config/tc-tic30.c (debug): Add format attribute. Fix format
bugs.
include:
* dis-asm.h (fprintf_ftype): Add format attribute.
opcodes:
* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
v850-dis.c: Fix format bugs.
* ia64-gen.c (fail, warn): Add format attribute.
* or32-opc.c (debug): Likewise.
Diffstat (limited to 'opcodes/arm-dis.c')
| -rw-r--r-- | opcodes/arm-dis.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index faff3a06a0e..0f3b65e13b4 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1578,7 +1578,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%d", reg); + func (stream, "%ld", reg); } break; case 'W': @@ -1588,7 +1588,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%d", reg + 1); + func (stream, "%ld", reg + 1); } break; case 'x': @@ -1598,7 +1598,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "0x%08x", reg); + func (stream, "0x%08lx", reg); /* Some SWI instructions have special meanings. */ @@ -1615,7 +1615,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%01x", reg & 0xf); + func (stream, "%01lx", reg & 0xf); } break; case 'f': @@ -1629,7 +1629,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) func (stream, "#%s", arm_fp_const[reg & 7]); else - func (stream, "f%d", reg); + func (stream, "f%ld", reg); } break; @@ -1991,7 +1991,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) long imm = (given & 0x07c0) >> 6; if (imm == 0) imm = 32; - func (stream, "#%d", imm); + func (stream, "#%ld", imm); } break; @@ -2024,15 +2024,15 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) break; case 'd': - func (stream, "%d", reg); + func (stream, "%ld", reg); break; case 'H': - func (stream, "%d", reg << 1); + func (stream, "%ld", reg << 1); break; case 'W': - func (stream, "%d", reg << 2); + func (stream, "%ld", reg << 2); break; case 'a': @@ -2044,7 +2044,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) break; case 'x': - func (stream, "0x%04x", reg); + func (stream, "0x%04lx", reg); break; case 'B': |