2013-02-06 Sandra Loosemore <sandra@codesourcery.com>

            Andrew Jenner <andrew@codesourcery.com>

	Based on patches from Altera Corporation.

	bfd/
	* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
	(ALL_MACHINES_CFILES): Add cpu-nios2.c.
	(BFD_BACKENDS): Add elf32-nios2.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
	* Makefile.in: Regenerated.
	* configure.in: Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* configure: Regenerated.
	* config.bfd: Add cases for nios2.
	* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
	(bfd_mach_nios2): Define.
	(bfd_nios2_arch): Declare.
	(bfd_archures_list): Add bfd_nios2_arch.
	* targets.c (bfd_elf32_bignios2_vec): Declare.
	(bfd_elf32_littlenios2_vec): Declare.
	(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
	* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.
	* cpu-nios2.c: New file.
	* elf32-nios2.c: New file.

	opcodes/
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
	nios2-opc.c.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_nios2_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_nios2): Define.
	(disassembler): Add case for bfd_arch_nios2.
	* nios2-dis.c: New file.
	* nios2-opc.c: New file.

	include/
	* dis-asm.h (print_insn_big_nios2): Declare.
	(print_insn_little_nios2): Declare.

	include/elf
	* nios2.h: New file.

	include/opcode/
	* nios2.h: New file.

	gas/
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
	(TARGET_CPU_HFILES): Add config/tc-nios2.h.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-linux*.
	* config/obj-elf.c: Conditionally include elf/nios2.h.
	* config/tc-nios2.c: New file.
	* config/tc-nios2.h: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set NIOSII.
	* doc/as.texinfo (Overview): Add Nios II options.
	(Machine Dependencies): Include c-nios2.texi.
	* doc/c-nios2.texi: New file.
	* NEWS: Note Altera Nios II support.

	gas/testsuite/
	* gas/nios2/add.d: New.
	* gas/nios2/add.s: New.
	* gas/nios2/align_fill.d: New.
	* gas/nios2/align_fill.s: New.
	* gas/nios2/align_text.d: New.
	* gas/nios2/align_text.s: New.
	* gas/nios2/and.d: New.
	* gas/nios2/and.s: New.
	* gas/nios2/branch.d: New.
	* gas/nios2/branch.s: New.
	* gas/nios2/break.d: New.
	* gas/nios2/break.s: New.
	* gas/nios2/bret.d: New.
	* gas/nios2/bret.s: New.
	* gas/nios2/cache.d: New.
	* gas/nios2/cache.s: New.
	* gas/nios2/call26.d: New.
	* gas/nios2/call26.s: New.
	* gas/nios2/call.d: New.
	* gas/nios2/call.s: New.
	* gas/nios2/cmp.d: New.
	* gas/nios2/cmp.s: New.
	* gas/nios2/comments.d: New.
	* gas/nios2/comments.s: New.
	* gas/nios2/complex.d: New.
	* gas/nios2/complex.s: New.
	* gas/nios2/ctl.d: New.
	* gas/nios2/ctl.s: New.
	* gas/nios2/custom.d: New.
	* gas/nios2/custom.s: New.
	* gas/nios2/etbt.d: New.
	* gas/nios2/etbt.s: New.
	* gas/nios2/flushda.d: New.
	* gas/nios2/flushda.s: New.
	* gas/nios2/illegal.l: New.
	* gas/nios2/illegal.s: New.
	* gas/nios2/jmp.d: New.
	* gas/nios2/jmp.s: New.
	* gas/nios2/ldb.d: New.
	* gas/nios2/ldb.s: New.
	* gas/nios2/ldh.d: New.
	* gas/nios2/ldh.s: New.
	* gas/nios2/ldw.d: New.
	* gas/nios2/ldw.s: New.
	* gas/nios2/lineseparator.d: New.
	* gas/nios2/lineseparator.s: New.
	* gas/nios2/mov.d: New.
	* gas/nios2/movia.d: New.
	* gas/nios2/movia.s: New.
	* gas/nios2/movi.d: New.
	* gas/nios2/movi.s: New.
	* gas/nios2/mov.s: New.
	* gas/nios2/mul.d: New.
	* gas/nios2/mul.s: New.
	* gas/nios2/nios2.exp: New.
	* gas/nios2/nor.d: New.
	* gas/nios2/nor.s: New.
	* gas/nios2/or.d: New.
	* gas/nios2/or.s: New.
	* gas/nios2/ret.d: New.
	* gas/nios2/ret.s: New.
	* gas/nios2/rol.d: New.
	* gas/nios2/rol.s: New.
	* gas/nios2/rotate.d: New.
	* gas/nios2/rotate.s: New.
	* gas/nios2/stb.d: New.
	* gas/nios2/stb.s: New.
	* gas/nios2/sth.d: New.
	* gas/nios2/sth.s: New.
	* gas/nios2/stw.d: New.
	* gas/nios2/stw.s: New.
	* gas/nios2/sub.d: New.
	* gas/nios2/sub.s: New.
	* gas/nios2/sync.d: New.
	* gas/nios2/sync.s: New.
	* gas/nios2/trap.d: New.
	* gas/nios2/trap.s: New.
	* gas/nios2/tret.d: New.
	* gas/nios2/tret.s: New.
	* gas/nios2/warn_noat.l: New.
	* gas/nios2/warn_noat.s: New.
	* gas/nios2/warn_nobreak.l: New.
	* gas/nios2/warn_nobreak.s: New.
	* gas/nios2/xor.d: New.
	* gas/nios2/xor.s: New.

	ld/
	* Makefile.am (enios2elf.c): New rule.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-*-*.
	* emulparams/nios2elf.sh: New file.
	* NEWS: Note Altera Nios II support.

	ld/testsuite/
	* ld-nios2/emit-relocs-1a.s: New.
	* ld-nios2/emit-relocs-1b.s: New.
	* ld-nios2/emit-relocs-1.d: New.
	* ld-nios2/emit-relocs-1.ld: New.
	* ld-nios2/gprel.d: New.
	* ld-nios2/gprel.s: New.
	* ld-nios2/hilo16.d: New.
	* ld-nios2/hilo16.s: New.
	* ld-nios2/hilo16_symbol.s: New.
	* ld-nios2/imm5.d: New.
	* ld-nios2/imm5.s: New.
	* ld-nios2/imm5_symbol.s: New.
	* ld-nios2/nios2.exp: New.
	* ld-nios2/pcrel16.d: New.
	* ld-nios2/pcrel16_label.s: New.
	* ld-nios2/pcrel16.s: New.
	* ld-nios2/relax_callr.d: New.
	* ld-nios2/relax_callr.ld: New.
	* ld-nios2/relax_callr.s: New.
	* ld-nios2/relax_cjmp.d: New.
	* ld-nios2/relax_cjmp.s: New.
	* ld-nios2/relax_jmp.ld: New.
	* ld-nios2/relax_section.d: New.
	* ld-nios2/relax_section.s: New.
	* ld-nios2/relax_ujmp.d: New.
	* ld-nios2/relax_ujmp.s: New.
	* ld-nios2/reloc.d: New.
	* ld-nios2/reloc.s: New.
	* ld-nios2/reloc_symbol.s: New.
	* ld-nios2/s16.d: New.
	* ld-nios2/s16.s: New.
	* ld-nios2/s16_symbol.s: New.
	* ld-nios2/u16.d: New.
	* ld-nios2/u16.s: New.
	* ld-nios2/u16_symbol.s: New.
	* ld-elf/indirect.exp: Skip on targets that don't support
	-shared -fPIC.
	* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
	* ld-plugin/lto.exp: Skip shared library tests on targets that
	don't support them.  Skip execution tests on non-native targets.

	binutils/
	* readelf.c: Include elf/nios2.h.
	(dump_relocations): Add case for EM_ALTERA_NIOS2.
	(get_nios2_dynamic_type): New.
	(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
	(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
	* NEWS: Note Altera Nios II support.
	* MAINTAINERS: Add Nios II maintainers.

8 files changed, 865 insertions, 0 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a3d33dfd750..11f14701b3f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,18 @@
+2013-02-06  Sandra Loosemore  <sandra@codesourcery.com>
+            Andrew Jenner <andrew@codesourcery.com>
+
+	Based on patches from Altera Corporation.
+
+	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
+	nios2-opc.c.
+	* Makefile.in: Regenerated.
+	* configure.in: Add case for bfd_nios2_arch.
+	* configure: Regenerated.
+	* disassemble.c (ARCH_nios2): Define.
+	(disassembler): Add case for bfd_arch_nios2.
+	* nios2-dis.c: New file.
+	* nios2-opc.c: New file.
+
 2013-02-04  Alan Modra  <amodra@gmail.com>
 
 	* po/POTFILES.in: Regenerate.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index e16149018d9..4a638105eff 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -205,6 +205,8 @@ TARGET_LIBOPCODES_CFILES = \
 	mt-dis.c \
 	mt-ibld.c \
 	mt-opc.c \
+	nios2-dis.c \
+	nios2-opc.c \
 	ns32k-dis.c \
 	openrisc-asm.c \
 	openrisc-desc.c \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index c8eae65813c..1825bd06c5f 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -477,6 +477,8 @@ TARGET_LIBOPCODES_CFILES = \
 	mt-dis.c \
 	mt-ibld.c \
 	mt-opc.c \
+	nios2-dis.c \
+	nios2-opc.c \
 	ns32k-dis.c \
 	openrisc-asm.c \
 	openrisc-desc.c \
@@ -874,6 +876,8 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-dis.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-ibld.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-opc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-dis.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-opc.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ns32k-dis.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/openrisc-asm.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/openrisc-desc.Plo@am__quote@
diff --git a/opcodes/configure b/opcodes/configure
index 4a8ff542096..7e4b55820f3 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12540,6 +12540,7 @@ if test x${all_targets} = xfalse ; then
 	bfd_mn10300_arch)	ta="$ta m10300-dis.lo m10300-opc.lo" ;;
 	bfd_mt_arch)		ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
 	bfd_msp430_arch)	ta="$ta msp430-dis.lo" ;;
+	bfd_nios2_arch)		ta="$ta nios2-dis.lo nios2-opc.lo" ;;
 	bfd_ns32k_arch)		ta="$ta ns32k-dis.lo" ;;
 	bfd_openrisc_arch)	ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
 	bfd_or32_arch)		ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
diff --git a/opcodes/configure.in b/opcodes/configure.in
index 5f9b3a377a5..7912b85d6e8 100644
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -293,6 +293,7 @@ if test x${all_targets} = xfalse ; then
 	bfd_mn10300_arch)	ta="$ta m10300-dis.lo m10300-opc.lo" ;;
 	bfd_mt_arch)		ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
 	bfd_msp430_arch)	ta="$ta msp430-dis.lo" ;;
+	bfd_nios2_arch)		ta="$ta nios2-dis.lo nios2-opc.lo" ;;
 	bfd_ns32k_arch)		ta="$ta ns32k-dis.lo" ;;
 	bfd_openrisc_arch)	ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
 	bfd_or32_arch)		ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 2073a5e57cd..55a44ec83fd 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -67,6 +67,7 @@
 #define ARCH_moxie
 #define ARCH_mt
 #define ARCH_msp430
+#define ARCH_nios2
 #define ARCH_ns32k
 #define ARCH_openrisc
 #define ARCH_or32
@@ -338,6 +339,14 @@ disassembler (abfd)
       disassemble = print_insn_mn10300;
       break;
 #endif
+#ifdef ARCH_nios2
+    case bfd_arch_nios2:
+      if (bfd_big_endian (abfd))
+	disassemble = print_insn_big_nios2;
+      else
+	disassemble = print_insn_little_nios2;
+      break;
+#endif
 #ifdef ARCH_openrisc
     case bfd_arch_openrisc:
       disassemble = print_insn_openrisc;
diff --git a/opcodes/nios2-dis.c b/opcodes/nios2-dis.c
new file mode 100644
index 00000000000..ef7a5f96109
--- /dev/null
+++ b/opcodes/nios2-dis.c
@@ -0,0 +1,423 @@
+/* Altera Nios II disassemble routines
+   Copyright (C) 2012, 2013 Free Software Foundation, Inc.
+   Contributed by Nigel Gray (ngray@altera.com).
+   Contributed by Mentor Graphics, Inc.
+
+   This file is part of the GNU opcodes library.
+
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this file; see the file COPYING.  If not, write to the
+   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include "dis-asm.h"
+#include "opcode/nios2.h"
+#include "libiberty.h"
+#include <string.h>
+#include <assert.h>
+
+/* No symbol table is available when this code runs out in an embedded
+   system as when it is used for disassembler support in a monitor.  */
+#if !defined(EMBEDDED_ENV)
+#define SYMTAB_AVAILABLE 1
+#include "elf-bfd.h"
+#include "elf/nios2.h"
+#endif
+
+/* Length of Nios II instruction in bytes.  */
+#define INSNLEN 4
+
+/* Data structures used by the opcode hash table.  */
+typedef struct _nios2_opcode_hash
+{
+  const struct nios2_opcode *opcode;
+  struct _nios2_opcode_hash *next;
+} nios2_opcode_hash;
+
+static bfd_boolean nios2_hash_init = 0;
+static nios2_opcode_hash *nios2_hash[(OP_MASK_OP) + 1];
+
+/* Separate hash table for pseudo-ops.  */
+static nios2_opcode_hash *nios2_ps_hash[(OP_MASK_OP) + 1];
+
+/* Function to initialize the opcode hash table.  */
+static void
+nios2_init_opcode_hash (void)
+{
+  unsigned int i;
+  register const struct nios2_opcode *op;
+
+  for (i = 0; i <= OP_MASK_OP; ++i)
+    nios2_hash[0] = NULL;
+  for (i = 0; i <= OP_MASK_OP; i++)
+    for (op = nios2_opcodes; op < &nios2_opcodes[NUMOPCODES]; op++)
+      {
+	nios2_opcode_hash *new_hash;
+	nios2_opcode_hash **bucket = NULL;
+
+	if ((op->pinfo & NIOS2_INSN_MACRO) == NIOS2_INSN_MACRO)
+	  {
+	    if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP)
+		&& (op->pinfo & (NIOS2_INSN_MACRO_MOV | NIOS2_INSN_MACRO_MOVI)
+		    & 0x7fffffff))
+	      bucket = &(nios2_ps_hash[i]);
+	  }
+	else if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP))
+	  bucket = &(nios2_hash[i]);
+
+	if (bucket)
+	  {
+	    new_hash =
+	      (nios2_opcode_hash *) malloc (sizeof (nios2_opcode_hash));
+	    if (new_hash == NULL)
+	      {
+		fprintf (stderr,
+			 "error allocating memory...broken disassembler\n");
+		abort ();
+	      }
+	    new_hash->opcode = op;
+	    new_hash->next = NULL;
+	    while (*bucket)
+	      bucket = &((*bucket)->next);
+	    *bucket = new_hash;
+	  }
+      }
+  nios2_hash_init = 1;
+#ifdef DEBUG_HASHTABLE
+  for (i = 0; i <= OP_MASK_OP; ++i)
+    {
+      nios2_opcode_hash *tmp_hash = nios2_hash[i];
+      printf ("index: 0x%02X	ops: ", i);
+      while (tmp_hash != NULL)
+	{
+	  printf ("%s ", tmp_hash->opcode->name);
+	  tmp_hash = tmp_hash->next;
+	}
+      printf ("\n");
+    }
+
+  for (i = 0; i <= OP_MASK_OP; ++i)
+    {
+      nios2_opcode_hash *tmp_hash = nios2_ps_hash[i];
+      printf ("index: 0x%02X	ops: ", i);
+      while (tmp_hash != NULL)
+	{
+	  printf ("%s ", tmp_hash->opcode->name);
+	  tmp_hash = tmp_hash->next;
+	}
+      printf ("\n");
+    }
+#endif /* DEBUG_HASHTABLE */
+}
+
+/* Return a pointer to an nios2_opcode struct for a given instruction
+   opcode, or NULL if there is an error.  */
+const struct nios2_opcode *
+nios2_find_opcode_hash (unsigned long opcode)
+{
+  nios2_opcode_hash *entry;
+
+  /* Build a hash table to shorten the search time.  */
+  if (!nios2_hash_init)
+    nios2_init_opcode_hash ();
+
+  /* First look in the pseudo-op hashtable.  */
+  for (entry = nios2_ps_hash[(opcode >> OP_SH_OP) & OP_MASK_OP];
+       entry; entry = entry->next)
+    if (entry->opcode->match == (opcode & entry->opcode->mask))
+      return entry->opcode;
+
+  /* Otherwise look in the main hashtable.  */
+  for (entry = nios2_hash[(opcode >> OP_SH_OP) & OP_MASK_OP];
+       entry; entry = entry->next)
+    if (entry->opcode->match == (opcode & entry->opcode->mask))
+      return entry->opcode;
+
+  return NULL;
+}
+
+/* There are 32 regular registers, 32 coprocessor registers,
+   and 32 control registers.  */
+#define NUMREGNAMES 32
+
+/* Return a pointer to the base of the coprocessor register name array.  */
+static struct nios2_reg *
+nios2_coprocessor_regs (void)
+{
+  static struct nios2_reg *cached = NULL;
+  
+  if (!cached)
+    {
+      int i;
+      for (i = NUMREGNAMES; i < nios2_num_regs; i++)
+	if (!strcmp (nios2_regs[i].name, "c0"))
+	  {
+	    cached = nios2_regs + i;
+	    break;
+	  }
+      assert (cached);
+    }
+  return cached;
+}
+
+/* Return a pointer to the base of the control register name array.  */
+static struct nios2_reg *
+nios2_control_regs (void)
+{
+  static struct nios2_reg *cached = NULL;
+  
+  if (!cached)
+    {
+      int i;
+      for (i = NUMREGNAMES; i < nios2_num_regs; i++)
+	if (!strcmp (nios2_regs[i].name, "status"))
+	  {
+	    cached = nios2_regs + i;
+	    break;
+	  }
+      assert (cached);
+    }
+  return cached;
+}
+
+/* The function nios2_print_insn_arg uses the character pointed
+   to by ARGPTR to determine how it print the next token or separator
+   character in the arguments to an instruction.  */
+static int
+nios2_print_insn_arg (const char *argptr,
+		      unsigned long opcode, bfd_vma address,
+		      disassemble_info *info)
+{
+  unsigned long i = 0;
+  struct nios2_reg *reg_base;
+
+  switch (*argptr)
+    {
+    case ',':
+    case '(':
+    case ')':
+      (*info->fprintf_func) (info->stream, "%c", *argptr);
+      break;
+    case 'd':
+      i = GET_INSN_FIELD (RRD, opcode);
+
+      if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
+	  && GET_INSN_FIELD (CUSTOM_C, opcode) == 0)
+	reg_base = nios2_coprocessor_regs ();
+      else
+	reg_base = nios2_regs;
+
+      if (i < NUMREGNAMES)
+	(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
+      else
+	(*info->fprintf_func) (info->stream, "unknown");
+      break;
+    case 's':
+      i = GET_INSN_FIELD (RRS, opcode);
+
+      if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
+	  && GET_INSN_FIELD (CUSTOM_A, opcode) == 0)
+	reg_base = nios2_coprocessor_regs ();
+      else
+	reg_base = nios2_regs;
+
+      if (i < NUMREGNAMES)
+	(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
+      else
+	(*info->fprintf_func) (info->stream, "unknown");
+      break;
+    case 't':
+      i = GET_INSN_FIELD (RRT, opcode);
+
+      if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
+	  && GET_INSN_FIELD (CUSTOM_B, opcode) == 0)
+	reg_base = nios2_coprocessor_regs ();
+      else
+	reg_base = nios2_regs;
+
+      if (i < NUMREGNAMES)
+	(*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
+      else
+	(*info->fprintf_func) (info->stream, "unknown");
+      break;
+    case 'i':
+      /* 16-bit signed immediate.  */
+      i = (signed) (GET_INSN_FIELD (IMM16, opcode) << 16) >> 16;
+      (*info->fprintf_func) (info->stream, "%ld", i);
+      break;
+    case 'u':
+      /* 16-bit unsigned immediate.  */
+      i = GET_INSN_FIELD (IMM16, opcode);
+      (*info->fprintf_func) (info->stream, "%ld", i);
+      break;
+    case 'o':
+      /* 16-bit signed immediate address offset.  */
+      i = (signed) (GET_INSN_FIELD (IMM16, opcode) << 16) >> 16;
+      address = address + 4 + i;
+      (*info->print_address_func) (address, info);
+      break;
+    case 'p':
+      /* 5-bit unsigned immediate.  */
+      i = GET_INSN_FIELD (CACHE_OPX, opcode);
+      (*info->fprintf_func) (info->stream, "%ld", i);
+      break;
+    case 'j':
+      /* 5-bit unsigned immediate.  */
+      i = GET_INSN_FIELD (IMM5, opcode);
+      (*info->fprintf_func) (info->stream, "%ld", i);
+      break;
+    case 'l':
+      /* 8-bit unsigned immediate.  */
+      /* FIXME - not yet implemented */
+      i = GET_INSN_FIELD (CUSTOM_N, opcode);
+      (*info->fprintf_func) (info->stream, "%lu", i);
+      break;
+    case 'm':
+      /* 26-bit unsigned immediate.  */
+      i = GET_INSN_FIELD (IMM26, opcode);
+      /* This translates to an address because it's only used in call
+	 instructions.  */
+      address = (address & 0xf0000000) | (i << 2);
+      (*info->print_address_func) (address, info);
+      break;
+    case 'c':
+      /* Control register index.  */
+      i = GET_INSN_FIELD (IMM5, opcode);
+      reg_base = nios2_control_regs ();
+      (*info->fprintf_func) (info->stream, "%s", reg_base[i].name);
+      break;
+    case 'b':
+      i = GET_INSN_FIELD (IMM5, opcode);
+      (*info->fprintf_func) (info->stream, "%ld", i);
+      break;
+    default:
+      (*info->fprintf_func) (info->stream, "unknown");
+      break;
+    }
+  return 0;
+}
+
+/* nios2_disassemble does all the work of disassembling a Nios II
+   instruction opcode.  */
+static int
+nios2_disassemble (bfd_vma address, unsigned long opcode,
+		   disassemble_info *info)
+{
+  const struct nios2_opcode *op;
+
+  info->bytes_per_line = INSNLEN;
+  info->bytes_per_chunk = INSNLEN;
+  info->display_endian = info->endian;
+  info->insn_info_valid = 1;
+  info->branch_delay_insns = 0;
+  info->data_size = 0;
+  info->insn_type = dis_nonbranch;
+  info->target = 0;
+  info->target2 = 0;
+
+  /* Find the major opcode and use this to disassemble
+     the instruction and its arguments.  */
+  op = nios2_find_opcode_hash (opcode);
+
+  if (op != NULL)
+    {
+      bfd_boolean is_nop = FALSE;
+      if (op->pinfo == NIOS2_INSN_MACRO_MOV)
+	{
+	  /* Check for mov r0, r0 and change to nop.  */
+	  int dst, src;
+	  dst = GET_INSN_FIELD (RRD, opcode);
+	  src = GET_INSN_FIELD (RRS, opcode);
+	  if (dst == 0 && src == 0)
+	    {
+	      (*info->fprintf_func) (info->stream, "nop");
+	      is_nop = TRUE;
+	    }
+	  else
+	    (*info->fprintf_func) (info->stream, "%s", op->name);
+	}
+      else
+	(*info->fprintf_func) (info->stream, "%s", op->name);
+
+      if (!is_nop)
+	{
+	  const char *argstr = op->args;
+	  if (argstr != NULL && *argstr != '\0')
+	    {
+	      (*info->fprintf_func) (info->stream, "\t");
+	      while (*argstr != '\0')
+		{
+		  nios2_print_insn_arg (argstr, opcode, address, info);
+		  ++argstr;
+		}
+	    }
+	}
+    }
+  else
+    {
+      /* Handle undefined instructions.  */
+      info->insn_type = dis_noninsn;
+      (*info->fprintf_func) (info->stream, "0x%lx", opcode);
+    }
+  /* Tell the caller how far to advance the program counter.  */
+  return INSNLEN;
+}
+
+
+/* print_insn_nios2 is the main disassemble function for Nios II.
+   The function diassembler(abfd) (source in disassemble.c) returns a
+   pointer to this either print_insn_big_nios2 or
+   print_insn_little_nios2, which in turn call this function when the
+   bfd machine type is Nios II. print_insn_nios2 reads the
+   instruction word at the address given, and prints the disassembled
+   instruction on the stream info->stream using info->fprintf_func. */
+
+static int
+print_insn_nios2 (bfd_vma address, disassemble_info *info,
+		  enum bfd_endian endianness)
+{
+  bfd_byte buffer[INSNLEN];
+  int status;
+
+  status = (*info->read_memory_func) (address, buffer, INSNLEN, info);
+  if (status == 0)
+    {
+      unsigned long insn;
+      if (endianness == BFD_ENDIAN_BIG)
+	insn = (unsigned long) bfd_getb32 (buffer);
+      else
+	insn = (unsigned long) bfd_getl32 (buffer);
+      status = nios2_disassemble (address, insn, info);
+    }
+  else
+    {
+      (*info->memory_error_func) (status, address, info);
+      status = -1;
+    }
+  return status;
+}
+
+/* These two functions are the main entry points, accessed from
+   disassemble.c.  */
+int
+print_insn_big_nios2 (bfd_vma address, disassemble_info *info)
+{
+  return print_insn_nios2 (address, info, BFD_ENDIAN_BIG);
+}
+
+int
+print_insn_little_nios2 (bfd_vma address, disassemble_info *info)
+{
+  return print_insn_nios2 (address, info, BFD_ENDIAN_LITTLE);
+}
diff --git a/opcodes/nios2-opc.c b/opcodes/nios2-opc.c
new file mode 100644
index 00000000000..d5094aca5ec
--- /dev/null
+++ b/opcodes/nios2-opc.c
@@ -0,0 +1,410 @@
+/* Altera Nios II opcode list.
+   Copyright (C) 2012, 2013 Free Software Foundation, Inc.
+   Contributed by Nigel Gray (ngray@altera.com).
+   Contributed by Mentor Graphics, Inc.
+
+   This file is part of the GNU opcodes library.
+
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this file; see the file COPYING.  If not, write to the
+   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "opcode/nios2.h"
+
+/* Register string table */
+
+const struct nios2_reg nios2_builtin_regs[] = {
+  /* Standard register names.  */
+  {"zero", 0},
+  {"at", 1},			/* assembler temporary */
+  {"r2", 2},
+  {"r3", 3},
+  {"r4", 4},
+  {"r5", 5},
+  {"r6", 6},
+  {"r7", 7},
+  {"r8", 8},
+  {"r9", 9},
+  {"r10", 10},
+  {"r11", 11},
+  {"r12", 12},
+  {"r13", 13},
+  {"r14", 14},
+  {"r15", 15},
+  {"r16", 16},
+  {"r17", 17},
+  {"r18", 18},
+  {"r19", 19},
+  {"r20", 20},
+  {"r21", 21},
+  {"r22", 22},
+  {"r23", 23},
+  {"et", 24},
+  {"bt", 25},
+  {"gp", 26},			/* global pointer */
+  {"sp", 27},			/* stack pointer */
+  {"fp", 28},			/* frame pointer */
+  {"ea", 29},			/* exception return address */
+  {"ba", 30},			/* breakpoint return address */
+  {"ra", 31},			/* return address */
+
+  /* Alternative names for special registers.  */
+  {"r0", 0},
+  {"r1", 1},
+  {"r24", 24},
+  {"r25", 25},
+  {"r26", 26},
+  {"r27", 27},
+  {"r28", 28},
+  {"r29", 29},
+  {"r30", 30},
+  {"r31", 31},
+
+  /* Control register names.  */
+  {"status", 0},
+  {"estatus", 1},
+  {"bstatus", 2},
+  {"ienable", 3},
+  {"ipending", 4},
+  {"cpuid", 5},
+  {"ctl6", 6},
+  {"exception", 7},
+  {"pteaddr", 8},
+  {"tlbacc", 9},
+  {"tlbmisc", 10},
+  {"fstatus", 11},
+  {"badaddr", 12},
+  {"config", 13},
+  {"mpubase", 14},
+  {"mpuacc", 15},
+  {"ctl16", 16},
+  {"ctl17", 17},
+  {"ctl18", 18},
+  {"ctl19", 19},
+  {"ctl20", 20},
+  {"ctl21", 21},
+  {"ctl22", 22},
+  {"ctl23", 23},
+  {"ctl24", 24},
+  {"ctl25", 25},
+  {"ctl26", 26},
+  {"ctl27", 27},
+  {"ctl28", 28},
+  {"ctl29", 29},
+  {"ctl30", 30},
+  {"ctl31", 31},
+
+  /* Alternative names for special control registers.  */
+  {"ctl0", 0},
+  {"ctl1", 1},
+  {"ctl2", 2},
+  {"ctl3", 3},
+  {"ctl4", 4},
+  {"ctl5", 5},
+  {"ctl7", 7},
+  {"ctl8", 8},
+  {"ctl9", 9},
+  {"ctl10", 10},
+  {"ctl11", 11},
+  {"ctl12", 12},
+  {"ctl13", 13},
+  {"ctl14", 14},
+  {"ctl15", 15},
+
+  /* Coprocessor register names.  */
+  {"c0", 0},
+  {"c1", 1},
+  {"c2", 2},
+  {"c3", 3},
+  {"c4", 4},
+  {"c5", 5},
+  {"c6", 6},
+  {"c7", 7},
+  {"c8", 8},
+  {"c9", 9},
+  {"c10", 10},
+  {"c11", 11},
+  {"c12", 12},
+  {"c13", 13},
+  {"c14", 14},
+  {"c15", 15},
+  {"c16", 16},
+  {"c17", 17},
+  {"c18", 18},
+  {"c19", 19},
+  {"c20", 20},
+  {"c21", 21},
+  {"c22", 22},
+  {"c23", 23},
+  {"c24", 24},
+  {"c25", 25},
+  {"c26", 26},
+  {"c27", 27},
+  {"c28", 28},
+  {"c29", 29},
+  {"c30", 30},
+  {"c31", 31},
+};
+
+#define NIOS2_NUM_REGS \
+       ((sizeof nios2_builtin_regs) / (sizeof (nios2_builtin_regs[0])))
+const int nios2_num_builtin_regs = NIOS2_NUM_REGS;
+
+/* This is not const in order to allow for dynamic extensions to the
+   built-in instruction set.  */
+struct nios2_reg *nios2_regs = (struct nios2_reg *) nios2_builtin_regs;
+int nios2_num_regs = NIOS2_NUM_REGS;
+#undef NIOS2_NUM_REGS
+
+/* This is the opcode table used by the Nios II GNU as, disassembler
+   and GDB.  */
+const struct nios2_opcode nios2_builtin_opcodes[] =
+{
+  /* { name, args, args_test, num_args,
+       match, mask, pinfo, overflow_msg } */
+  {"add", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_ADD, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"addi", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_ADDI, signed_immed16_overflow},
+  {"subi", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
+  {"and", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_AND, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"andhi", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_ANDHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
+  {"andi", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_ANDI, OP_MASK_IOP, NIOS2_INSN_ANDI, unsigned_immed16_overflow},
+  {"beq", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BEQ, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"bge", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"bgeu", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"bgt", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
+   branch_target_overflow},
+  {"bgtu", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
+   branch_target_overflow},
+  {"ble", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
+   branch_target_overflow},
+  {"bleu", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH,
+   branch_target_overflow},
+  {"blt", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"bltu", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"bne", "s,t,o", "s,t,o,E", 3,
+   OP_MATCH_BNE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow},
+  {"br", "o", "o,E", 1,
+   OP_MATCH_BR, OP_MASK_IOP, NIOS2_INSN_UBRANCH, branch_target_overflow},
+  {"break", "b", "b,E", 1,
+   OP_MATCH_BREAK, OP_MASK_BREAK, 0, no_overflow},
+  {"bret", "", "E", 0,
+   OP_MATCH_BRET, OP_MASK, 0, no_overflow},
+  {"flushd", "i(s)", "i(s)E", 2,
+   OP_MATCH_FLUSHD, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"flushda", "i(s)", "i(s)E", 2,
+   OP_MATCH_FLUSHDA, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"flushi", "s", "s,E", 1,
+   OP_MATCH_FLUSHI, OP_MASK_FLUSHI, 0, no_overflow},
+  {"flushp", "", "E", 0,
+   OP_MATCH_FLUSHP, OP_MASK, 0, no_overflow},
+  {"initd", "i(s)", "i(s)E", 2,
+   OP_MATCH_INITD, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"initda", "i(s)", "i(s)E", 2,
+   OP_MATCH_INITDA, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"initi", "s", "s,E", 1,
+   OP_MATCH_INITI, OP_MASK_INITI, 0, no_overflow},
+  {"call", "m", "m,E", 1,
+   OP_MATCH_CALL, OP_MASK_IOP, NIOS2_INSN_CALL, call_target_overflow},
+  {"callr", "s", "s,E", 1,
+   OP_MATCH_CALLR, OP_MASK_CALLR, 0, no_overflow},
+  {"cmpeq", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPEQ, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmpeqi", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPEQI, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"cmpge", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmpgei", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPGEI, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"cmpgeu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmpgeui", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_CMPGEUI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
+  {"cmpgt", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
+  {"cmpgti", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPGEI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
+  {"cmpgtu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
+  {"cmpgtui", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_CMPGEUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow},
+  {"cmple", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
+  {"cmplei", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPLTI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow},
+  {"cmpleu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow},
+  {"cmpleui", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_CMPLTUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow},
+  {"cmplt", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmplti", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPLTI, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"cmpltu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmpltui", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_CMPLTUI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
+  {"cmpne", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_CMPNE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"cmpnei", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_CMPNEI, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"div", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_DIV, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"divu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_DIVU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"jmp", "s", "s,E", 1,
+   OP_MATCH_JMP, OP_MASK_JMP, 0, no_overflow},
+  {"jmpi", "m", "m,E", 1,
+   OP_MATCH_JMPI, OP_MASK_IOP, 0, no_overflow},
+  {"ldb", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDB, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldbio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDBIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldbu", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDBU, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldbuio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDBUIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldh", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDH, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldhio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDHIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldhu", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDHU, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldhuio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDHUIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldl", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDL, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldw", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDW, OP_MASK_IOP, 0, address_offset_overflow},
+  {"ldwio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_LDWIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"mov", "d,s", "d,s,E", 2,
+   OP_MATCH_ADD, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, NIOS2_INSN_MACRO_MOV,
+   no_overflow},
+  {"movhi", "t,u", "t,u,E", 2,
+   OP_MATCH_ORHI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
+   unsigned_immed16_overflow},
+  {"movui", "t,u", "t,u,E", 2,
+   OP_MATCH_ORI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
+   unsigned_immed16_overflow},
+  {"movi", "t,i", "t,i,E", 2,
+   OP_MATCH_ADDI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI,
+   signed_immed16_overflow},
+  /* movia expands to two instructions so there is no mask or match */
+  {"movia", "t,o", "t,o,E", 2,
+   OP_MATCH_ORHI, OP_MASK_IOP, NIOS2_INSN_MACRO_MOVIA, no_overflow},
+  {"mul", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_MUL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"muli", "t,s,i", "t,s,i,E", 3,
+   OP_MATCH_MULI, OP_MASK_IOP, 0, signed_immed16_overflow},
+  {"mulxss", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_MULXSS, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"mulxsu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_MULXSU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"mulxuu", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_MULXUU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"nextpc", "d", "d,E", 1,
+   OP_MATCH_NEXTPC, OP_MASK_NEXTPC, 0, no_overflow},
+  {"nop", "", "E", 0,
+   OP_MATCH_ADD, OP_MASK, NIOS2_INSN_MACRO_MOV, no_overflow},
+  {"nor", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_NOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"or", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_OR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"orhi", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_ORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
+  {"ori", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_ORI, OP_MASK_IOP, NIOS2_INSN_ORI, unsigned_immed16_overflow},
+  {"rdctl", "d,c", "d,c,E", 2,
+   OP_MATCH_RDCTL, OP_MASK_RDCTL, 0, no_overflow},
+  {"ret", "", "E", 0,
+   OP_MATCH_RET, OP_MASK, 0, no_overflow},
+  {"rol", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_ROL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"roli", "d,s,j", "d,s,j,E", 3,
+   OP_MATCH_ROLI, OP_MASK_ROLI, 0, unsigned_immed5_overflow},
+  {"ror", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_ROR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"sll", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_SLL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"slli", "d,s,j", "d,s,j,E", 3,
+   OP_MATCH_SLLI, OP_MASK_SLLI, 0, unsigned_immed5_overflow},
+  {"sra", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_SRA, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"srai", "d,s,j", "d,s,j,E", 3,
+   OP_MATCH_SRAI, OP_MASK_SRAI, 0, unsigned_immed5_overflow},
+  {"srl", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_SRL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"srli", "d,s,j", "d,s,j,E", 3,
+   OP_MATCH_SRLI, OP_MASK_SRLI, 0, unsigned_immed5_overflow},
+  {"stb", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STB, OP_MASK_IOP, 0, address_offset_overflow},
+  {"stbio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STBIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"stc", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STC, OP_MASK_IOP, 0, address_offset_overflow},
+  {"sth", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STH, OP_MASK_IOP, 0, address_offset_overflow},
+  {"sthio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STHIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"stw", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STW, OP_MASK_IOP, 0, address_offset_overflow},
+  {"stwio", "t,i(s)", "t,i(s)E", 3,
+   OP_MATCH_STWIO, OP_MASK_IOP, 0, address_offset_overflow},
+  {"sub", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_SUB, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"sync", "", "E", 0,
+   OP_MATCH_SYNC, OP_MASK_SYNC, 0, no_overflow},
+  {"trap", "", "E", 0,
+   OP_MATCH_TRAP, OP_MASK_TRAP, 0, no_overflow},
+  {"eret", "", "E", 0,
+   OP_MATCH_ERET, OP_MASK, 0, no_overflow},
+  {"custom", "l,d,s,t", "l,d,s,t,E", 4,
+   OP_MATCH_CUSTOM, OP_MASK_ROP, 0, custom_opcode_overflow},
+  {"wrctl", "c,s", "c,s,E", 2,
+   OP_MATCH_WRCTL, OP_MASK_WRCTL, 0, no_overflow},
+  {"xor", "d,s,t", "d,s,t,E", 3,
+   OP_MATCH_XOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
+  {"xorhi", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_XORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow},
+  {"xori", "t,s,u", "t,s,u,E", 3,
+   OP_MATCH_XORI, OP_MASK_IOP, NIOS2_INSN_XORI, unsigned_immed16_overflow}
+};
+
+#define NIOS2_NUM_OPCODES \
+       ((sizeof nios2_builtin_opcodes) / (sizeof (nios2_builtin_opcodes[0])))
+const int bfd_nios2_num_builtin_opcodes = NIOS2_NUM_OPCODES;
+
+/* This is not const to allow for dynamic extensions to the
+   built-in instruction set. */
+struct nios2_opcode *nios2_opcodes =
+  (struct nios2_opcode *) nios2_builtin_opcodes;
+int bfd_nios2_num_opcodes = NIOS2_NUM_OPCODES;
+#undef NIOS2_NUM_OPCODES