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authoryufeng <yufeng>2013-05-13 22:28:27 +0000
committeryufeng <yufeng>2013-05-13 22:28:27 +0000
commit18ff964b7afe30af7c370dc755bab2ba4f6904d1 (patch)
tree6268b2fa97e9377f55cb63bcc1897ceb0b66883d /opcodes
parent0b6d485333eaecc80f2ee1c526d00afc34545568 (diff)
downloadgdb-18ff964b7afe30af7c370dc755bab2ba4f6904d1.tar.gz
gas/
* testsuite/gas/aarch64/diagnostic.s: Update. * testsuite/gas/aarch64/diagnostic.l: Ditto. * testsuite/gas/aarch64/movi.s: Add new tests. * testsuite/gas/aarch64/movi.d: Update. opcodes/ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion. * aarch64-opc.c (operand_general_constraint_met_p): Relax the range check from [0, 255] to [-128, 255].
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/aarch64-asm.c1
-rw-r--r--opcodes/aarch64-opc.c6
3 files changed, 9 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9a80d0481b9..d37be84c909 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
+ * aarch64-opc.c (operand_general_constraint_met_p): Relax the range
+ check from [0, 255] to [-128, 255].
+
2013-05-09 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2.
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 7a92b49ac28..96396e87d48 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -370,7 +370,6 @@ aarch64_ins_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED,
imm = aarch64_shrink_expanded_imm8 (imm);
assert ((int)imm >= 0);
}
- assert (imm <= 255);
insert_fields (code, imm, 0, 2, FLD_defgh, FLD_abc);
if (kind == AARCH64_MOD_NONE)
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b7b1b4a913a..74f2826035f 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1724,10 +1724,10 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
assert (idx == 1);
if (aarch64_get_qualifier_esize (opnds[0].qualifier) != 8)
{
- /* uimm8 */
- if (!value_in_range_p (opnd->imm.value, 0, 255))
+ /* uimm8 or simm8 */
+ if (!value_in_range_p (opnd->imm.value, -128, 255))
{
- set_imm_out_of_range_error (mismatch_detail, idx, 0, 255);
+ set_imm_out_of_range_error (mismatch_detail, idx, -128, 255);
return 0;
}
}