s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify

comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.

9 files changed, 183 insertions, 158 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f3692e33c6e..643a987524d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2002-11-30  Alan Modra  <amodra@bigpond.net.au>
+
+	*arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c,
+	sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with
+	TRUE, false with FALSE.  Simplify comparisons of bfd_boolean vars
+	with TRUE/FALSE.  Formatting.
+
 2002-11-25  DJ Delorie  <dj@redhat.com>
 
 	* xstormy16-opc.c: Regenerate.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index f3785f2ed9b..ff351d088f7 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -4,17 +4,17 @@
    Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
    Modification by James G. Smith (jsmith@cygnus.co.uk)
 
-This file is part of libopcodes. 
+This file is part of libopcodes.
 
 This program is free software; you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 Software Foundation; either version 2 of the License, or (at your option)
-any later version. 
+any later version.
 
 This program is distributed in the hope that it will be useful, but WITHOUT
 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-more details. 
+more details.
 
 You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
@@ -79,20 +79,25 @@ static unsigned int regname_selected = 1;
 #define NUM_ARM_REGNAMES  NUM_ELEM (regnames)
 #define arm_regnames      regnames[regname_selected].reg_names
 
-static boolean force_thumb = false;
+static bfd_boolean force_thumb = FALSE;
 
 static char * arm_fp_const[] =
 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
 
-static char * arm_shift[] = 
+static char * arm_shift[] =
 {"lsl", "lsr", "asr", "ror"};
 
 /* Forward declarations.  */
-static void arm_decode_shift PARAMS ((long, fprintf_ftype, void *));
-static int  print_insn_arm   PARAMS ((bfd_vma, struct disassemble_info *, long));
-static int  print_insn_thumb PARAMS ((bfd_vma, struct disassemble_info *, long));
-static void parse_disassembler_options PARAMS ((char *));
-static int  print_insn       PARAMS ((bfd_vma, struct disassemble_info *, boolean));
+static void arm_decode_shift
+  PARAMS ((long, fprintf_ftype, void *));
+static int  print_insn_arm
+  PARAMS ((bfd_vma, struct disassemble_info *, long));
+static int  print_insn_thumb
+  PARAMS ((bfd_vma, struct disassemble_info *, long));
+static void parse_disassembler_options
+  PARAMS ((char *));
+static int  print_insn
+  PARAMS ((bfd_vma, struct disassemble_info *, bfd_boolean));
 int get_arm_regname_num_options (void);
 int set_arm_regname_option (int option);
 int get_arm_regnames (int option, const char **setname,
@@ -135,14 +140,14 @@ arm_decode_shift (given, func, stream)
      void * stream;
 {
   func (stream, "%s", arm_regnames[given & 0xf]);
-  
+
   if ((given & 0xff0) != 0)
     {
       if ((given & 0x10) == 0)
 	{
 	  int amount = (given & 0xf80) >> 7;
 	  int shift = (given & 0x60) >> 5;
-	  
+
 	  if (amount == 0)
 	    {
 	      if (shift == 3)
@@ -150,10 +155,10 @@ arm_decode_shift (given, func, stream)
 		  func (stream, ", rrx");
 		  return;
 		}
-	      
+
 	      amount = 32;
 	    }
-	  
+
 	  func (stream, ", %s #%d", arm_shift[shift], amount);
 	}
       else
@@ -180,7 +185,7 @@ print_insn_arm (pc, info, given)
       if ((given & insn->mask) == insn->value)
 	{
 	  char * c;
-	  
+
 	  for (c = insn->assembler; *c; c++)
 	    {
 	      if (*c == '%')
@@ -196,14 +201,14 @@ print_insn_arm (pc, info, given)
 			  && ((given & 0x02000000) == 0))
 			{
 			  int offset = given & 0xfff;
-			  
+
 			  func (stream, "[pc");
- 
+
 			  if (given & 0x01000000)
 			    {
 			      if ((given & 0x00800000) == 0)
 				offset = - offset;
-			  
+
 			      /* Pre-indexed.  */
 			      func (stream, ", #%d]", offset);
 
@@ -224,13 +229,13 @@ print_insn_arm (pc, info, given)
 			      /* ie ignore the offset.  */
 			      offset = pc + 8;
 			    }
-			  
+
 			  func (stream, "\t; ");
 			  info->print_address_func (offset, info);
 			}
 		      else
 			{
-			  func (stream, "[%s", 
+			  func (stream, "[%s",
 				arm_regnames[(given >> 16) & 0xf]);
 			  if ((given & 0x01000000) != 0)
 			    {
@@ -250,7 +255,7 @@ print_insn_arm (pc, info, given)
 				  arm_decode_shift (given, func, stream);
 				}
 
-			      func (stream, "]%s", 
+			      func (stream, "]%s",
 				    ((given & 0x00200000) != 0) ? "!" : "");
 			    }
 			  else
@@ -262,13 +267,13 @@ print_insn_arm (pc, info, given)
 				    func (stream, "], %s#%d",
 					  (((given & 0x00800000) == 0)
 					   ? "-" : ""), offset);
-				  else 
+				  else
 				    func (stream, "]");
 				}
 			      else
 				{
 				  func (stream, "], %s",
-					(((given & 0x00800000) == 0) 
+					(((given & 0x00800000) == 0)
 					 ? "-" : ""));
 				  arm_decode_shift (given, func, stream);
 				}
@@ -281,18 +286,18 @@ print_insn_arm (pc, info, given)
 			{
                           /* PC relative with immediate offset.  */
 			  int offset = ((given & 0xf00) >> 4) | (given & 0xf);
-			  
+
 			  if ((given & 0x00800000) == 0)
 			    offset = -offset;
-			  
+
 			  func (stream, "[pc, #%d]\t; ", offset);
-			  
+
 			  (*info->print_address_func)
 			    (offset + pc + 8, info);
 			}
 		      else
 			{
-			  func (stream, "[%s", 
+			  func (stream, "[%s",
 				arm_regnames[(given >> 16) & 0xf]);
 			  if ((given & 0x01000000) != 0)
 			    {
@@ -315,7 +320,7 @@ print_insn_arm (pc, info, given)
                                         arm_regnames[given & 0xf]);
 				}
 
-			      func (stream, "]%s", 
+			      func (stream, "]%s",
 				    ((given & 0x00200000) != 0) ? "!" : "");
 			    }
 			  else
@@ -329,7 +334,7 @@ print_insn_arm (pc, info, given)
 				    func (stream, "], %s#%d",
 					  (((given & 0x00800000) == 0)
 					   ? "-" : ""), offset);
-				  else 
+				  else
 				    func (stream, "]");
 				}
 			      else
@@ -343,7 +348,7 @@ print_insn_arm (pc, info, given)
 			    }
 			}
 		      break;
-			  
+
 		    case 'b':
 		      (*info->print_address_func)
 			(BDISP (given) * 4 + pc + 8, info);
@@ -425,7 +430,7 @@ print_insn_arm (pc, info, given)
 		      {
 			bfd_vma address;
 			bfd_vma offset = 0;
-			
+
 			if (given & 0x00800000)
 			  /* Is signed, hi bits should be ones.  */
 			  offset = (-1) ^ 0x00ffffff;
@@ -434,7 +439,7 @@ print_insn_arm (pc, info, given)
 			offset += given & 0x00ffffff;
 			offset <<= 2;
 			address = offset + pc + 8;
-			
+
 			if (given & 0x01000000)
 			  /* H bit allows addressing to 2-byte boundaries.  */
 			  address += 2;
@@ -490,7 +495,7 @@ print_insn_arm (pc, info, given)
 			  func (stream, "3");
 			}
 		      break;
-			
+
 		    case 'P':
 		      switch (given & 0x00080080)
 			{
@@ -542,7 +547,7 @@ print_insn_arm (pc, info, given)
 			}
 		      break;
 
-		    case '0': case '1': case '2': case '3': case '4': 
+		    case '0': case '1': case '2': case '3': case '4':
 		    case '5': case '6': case '7': case '8': case '9':
 		      {
 			int bitstart = *c++ - '0';
@@ -554,44 +559,44 @@ print_insn_arm (pc, info, given)
 			  {
 			  case '-':
 			    c++;
-			    
+
 			    while (*c >= '0' && *c <= '9')
 			      bitend = (bitend * 10) + *c++ - '0';
-			    
+
 			    if (!bitend)
 			      abort ();
-			    
+
 			    switch (*c)
 			      {
 			      case 'r':
 				{
 				  long reg;
-				  
+
 				  reg = given >> bitstart;
 				  reg &= (2 << (bitend - bitstart)) - 1;
-				  
+
 				  func (stream, "%s", arm_regnames[reg]);
 				}
 				break;
 			      case 'd':
 				{
 				  long reg;
-				  
+
 				  reg = given >> bitstart;
 				  reg &= (2 << (bitend - bitstart)) - 1;
-				  
+
 				  func (stream, "%d", reg);
 				}
 				break;
 			      case 'x':
 				{
 				  long reg;
-				  
+
 				  reg = given >> bitstart;
 				  reg &= (2 << (bitend - bitstart)) - 1;
-				  
+
 				  func (stream, "0x%08x", reg);
-				  
+
 				  /* Some SWI instructions have special
 				     meanings.  */
 				  if ((given & 0x0fffffff) == 0x0FF00000)
@@ -603,20 +608,20 @@ print_insn_arm (pc, info, given)
 			      case 'X':
 				{
 				  long reg;
-				  
+
 				  reg = given >> bitstart;
 				  reg &= (2 << (bitend - bitstart)) - 1;
-				  
+
 				  func (stream, "%01x", reg & 0xf);
 				}
 				break;
 			      case 'f':
 				{
 				  long reg;
-				  
+
 				  reg = given >> bitstart;
 				  reg &= (2 << (bitend - bitstart)) - 1;
-				  
+
 				  if (reg > 7)
 				    func (stream, "#%s",
 					  arm_fp_const[reg & 7]);
@@ -677,7 +682,7 @@ print_insn_arm (pc, info, given)
 				    }
 				  break;
 
-				  
+
 				default:
 				  abort ();
 				}
@@ -766,7 +771,7 @@ print_insn_thumb (pc, info, given)
           if (!*c) /* Check for empty (not NULL) assembler string.  */
             {
 	      long offset;
-	      
+
 	      info->bytes_per_chunk = 4;
 	      info->bytes_per_line  = 4;
 
@@ -788,16 +793,16 @@ print_insn_thumb (pc, info, given)
             {
 	      info->bytes_per_chunk = 2;
 	      info->bytes_per_line  = 4;
-	  	      
+
               given &= 0xffff;
-	      
+
               for (; *c; c++)
                 {
                   if (*c == '%')
                     {
                       int domaskpc = 0;
                       int domasklr = 0;
-		      
+
                       switch (*++c)
                         {
                         case '%':
@@ -807,11 +812,11 @@ print_insn_thumb (pc, info, given)
                         case 'S':
                           {
                             long reg;
-			    
+
                             reg = (given >> 3) & 0x7;
                             if (given & (1 << 6))
                               reg += 8;
-			    
+
                             func (stream, "%s", arm_regnames[reg]);
                           }
                           break;
@@ -819,11 +824,11 @@ print_insn_thumb (pc, info, given)
                         case 'D':
                           {
                             long reg;
-			    
+
                             reg = given & 0x7;
                             if (given & (1 << 7))
                              reg += 8;
-			    
+
                             func (stream, "%s", arm_regnames[reg]);
                           }
                           break;
@@ -845,9 +850,9 @@ print_insn_thumb (pc, info, given)
                           {
                             int started = 0;
                             int reg;
-			    
+
                             func (stream, "{");
-			    
+
                             /* It would be nice if we could spot
                                ranges, and generate the rS-rE format: */
                             for (reg = 0; (reg < 8); reg++)
@@ -879,12 +884,12 @@ print_insn_thumb (pc, info, given)
                           break;
 
 
-                        case '0': case '1': case '2': case '3': case '4': 
+                        case '0': case '1': case '2': case '3': case '4':
                         case '5': case '6': case '7': case '8': case '9':
                           {
                             int bitstart = *c++ - '0';
                             int bitend = 0;
-			    
+
                             while (*c >= '0' && *c <= '9')
                               bitstart = (bitstart * 10) + *c++ - '0';
 
@@ -893,7 +898,7 @@ print_insn_thumb (pc, info, given)
                               case '-':
                                 {
                                   long reg;
-				  
+
                                   c++;
                                   while (*c >= '0' && *c <= '9')
                                     bitend = (bitend * 10) + *c++ - '0';
@@ -992,11 +997,11 @@ parse_arm_disassembler_option (option)
 {
   if (option == NULL)
     return;
-      
+
   if (strneq (option, "reg-names-", 10))
     {
       int i;
-	
+
       option += 10;
 
       for (i = NUM_ARM_REGNAMES; i--;)
@@ -1005,7 +1010,7 @@ parse_arm_disassembler_option (option)
 	    regname_selected = i;
 	    break;
 	  }
-      
+
       if (i < 0)
 	fprintf (stderr, _("Unrecognised register name set: %s\n"), option);
     }
@@ -1015,7 +1020,7 @@ parse_arm_disassembler_option (option)
     force_thumb = 0;
   else
     fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option);
-  
+
   return;
 }
 
@@ -1026,7 +1031,7 @@ parse_disassembler_options (options)
      char * options;
 {
   char * space;
-  
+
   if (options == NULL)
     return;
 
@@ -1054,7 +1059,7 @@ static int
 print_insn (pc, info, little)
      bfd_vma pc;
      struct disassemble_info * info;
-     boolean little;
+     bfd_boolean little;
 {
   unsigned char      b[4];
   long               given;
@@ -1064,19 +1069,19 @@ print_insn (pc, info, little)
   if (info->disassembler_options)
     {
       parse_disassembler_options (info->disassembler_options);
-      
+
       /* To avoid repeated parsing of these options, we remove them here.  */
       info->disassembler_options = NULL;
     }
-  
+
   is_thumb = force_thumb;
-  
+
   if (!is_thumb && info->symbols != NULL)
     {
       if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
 	{
 	  coff_symbol_type * cs;
-	  
+
 	  cs = coffsymbol (*info->symbols);
 	  is_thumb = (   cs->native->u.syment.n_sclass == C_THUMBEXT
 		      || cs->native->u.syment.n_sclass == C_THUMBSTAT
@@ -1088,14 +1093,14 @@ print_insn (pc, info, little)
 	{
 	  elf_symbol_type *  es;
 	  unsigned int       type;
-	  
+
 	  es = *(elf_symbol_type **)(info->symbols);
 	  type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
-	  
+
 	  is_thumb = (type == STT_ARM_TFUNC) || (type == STT_ARM_16BIT);
 	}
     }
-  
+
   info->bytes_per_chunk = 4;
   info->display_endian  = little ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
 
@@ -1105,17 +1110,17 @@ print_insn (pc, info, little)
       if (status != 0 && is_thumb)
 	{
 	  info->bytes_per_chunk = 2;
-	  
+
 	  status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
 	  b[3] = b[2] = 0;
 	}
-      
+
       if (status != 0)
 	{
 	  info->memory_error_func (status, pc, info);
 	  return -1;
 	}
-      
+
       given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
     }
   else
@@ -1127,13 +1132,13 @@ print_insn (pc, info, little)
 	  info->memory_error_func (status, pc, info);
 	  return -1;
 	}
-      
+
       if (is_thumb)
 	{
 	  if (pc & 0x2)
 	    {
 	      given = (b[2] << 8) | b[3];
-	      
+
 	      status = info->read_memory_func
 		((pc + 4) & ~ 0x3, (bfd_byte *) b, 4, info);
 	      if (status != 0)
@@ -1141,7 +1146,7 @@ print_insn (pc, info, little)
 		  info->memory_error_func (status, pc + 4, info);
 		  return -1;
 		}
-	      
+
 	      given |= (b[0] << 24) | (b[1] << 16);
 	    }
 	  else
@@ -1150,7 +1155,7 @@ print_insn (pc, info, little)
       else
 	given = (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
     }
-  
+
   if (info->flags & INSN_HAS_RELOC)
     /* If the instruction has a reloc associated with it, then
        the offset field in the instruction will actually be the
@@ -1158,7 +1163,7 @@ print_insn (pc, info, little)
        In such cases, we can ignore the pc when computing
        addresses, since the addend is not currently pc-relative.  */
     pc = 0;
-  
+
   if (is_thumb)
     status = print_insn_thumb (pc, info, given);
   else
@@ -1172,7 +1177,7 @@ print_insn_big_arm (pc, info)
      bfd_vma pc;
      struct disassemble_info * info;
 {
-  return print_insn (pc, info, false);
+  return print_insn (pc, info, FALSE);
 }
 
 int
@@ -1180,7 +1185,7 @@ print_insn_little_arm (pc, info)
      bfd_vma pc;
      struct disassemble_info * info;
 {
-  return print_insn (pc, info, true);
+  return print_insn (pc, info, TRUE);
 }
 
 void
@@ -1191,7 +1196,7 @@ print_arm_disassembler_options (FILE * stream)
   fprintf (stream, _("\n\
 The following ARM specific disassembler options are supported for use with\n\
 the -M switch:\n"));
-  
+
   for (i = NUM_ARM_REGNAMES; i--;)
     fprintf (stream, "  reg-names-%s %*c%s\n",
 	     regnames[i].name,
diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c
index 33806ee88ac..6beb4abea1d 100644
--- a/opcodes/cris-dis.c
+++ b/opcodes/cris-dis.c
@@ -1,5 +1,5 @@
 /* Disassembler code for CRIS.
-   Copyright 2000, 2001 Free Software Foundation, Inc.
+   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
    Contributed by Axis Communications AB, Lund, Sweden.
    Written by Hans-Peter Nilsson.
 
@@ -77,22 +77,28 @@ static long no_of_case_offsets = 0;
 /* Candidate for next case_offset.  */
 static long last_immediate = 0;
 
-static int number_of_bits PARAMS ((unsigned int));
-static char *format_hex PARAMS ((unsigned long, char *));
-static char *format_dec PARAMS ((long, char *, int));
-static char *format_reg PARAMS ((int, char *, boolean));
-static int cris_constraint PARAMS ((const char *, unsigned int,
-				    unsigned int));
-static unsigned bytes_to_skip PARAMS ((unsigned int,
-				       const struct cris_opcode *));
-static char *print_flags PARAMS ((unsigned int, char *));
+static int number_of_bits
+  PARAMS ((unsigned int));
+static char *format_hex
+  PARAMS ((unsigned long, char *));
+static char *format_dec
+  PARAMS ((long, char *, int));
+static char *format_reg
+  PARAMS ((int, char *, bfd_boolean));
+static int cris_constraint
+  PARAMS ((const char *, unsigned int, unsigned int));
+static unsigned bytes_to_skip
+  PARAMS ((unsigned int, const struct cris_opcode *));
+static char *print_flags
+  PARAMS ((unsigned int, char *));
 static void print_with_operands
   PARAMS ((const struct cris_opcode *, unsigned int, unsigned char *,
 	   bfd_vma, disassemble_info *, const struct cris_opcode *,
-	   unsigned int, unsigned char *, boolean));
-static const struct cris_spec_reg *spec_reg_info PARAMS ((unsigned int));
+	   unsigned int, unsigned char *, bfd_boolean));
+static const struct cris_spec_reg *spec_reg_info
+  PARAMS ((unsigned int));
 static int print_insn_cris_generic
-  PARAMS ((bfd_vma, disassemble_info *, boolean));
+  PARAMS ((bfd_vma, disassemble_info *, bfd_boolean));
 static int print_insn_cris_with_register_prefix
   PARAMS ((bfd_vma, disassemble_info *));
 static int print_insn_cris_without_register_prefix
@@ -334,7 +340,7 @@ static char *
 format_reg (regno, outbuffer_start, with_reg_prefix)
      int regno;
      char *outbuffer_start;
-     boolean with_reg_prefix;
+     bfd_boolean with_reg_prefix;
 {
   char *outbuffer = outbuffer_start;
 
@@ -593,7 +599,7 @@ print_with_operands (opcodep, insn, buffer, addr, info, prefix_opcodep,
      const struct cris_opcode *prefix_opcodep;
      unsigned int prefix_insn;
      unsigned char *prefix_buffer;
-     boolean with_reg_prefix;
+     bfd_boolean with_reg_prefix;
 {
   /* Get a buffer of somewhat reasonable size where we store
      intermediate parts of the insn.  */
@@ -1186,7 +1192,7 @@ static int
 print_insn_cris_generic (memaddr, info, with_reg_prefix)
      bfd_vma memaddr;
      disassemble_info *info;
-     boolean with_reg_prefix;
+     bfd_boolean with_reg_prefix;
 {
   int nbytes;
   unsigned int insn;
@@ -1369,7 +1375,7 @@ print_insn_cris_with_register_prefix (vma, info)
      bfd_vma vma;
      disassemble_info *info;
 {
-  return print_insn_cris_generic (vma, info, true);
+  return print_insn_cris_generic (vma, info, TRUE);
 }
 
 /* Disassemble, no prefixes on register names.  */
@@ -1379,7 +1385,7 @@ print_insn_cris_without_register_prefix (vma, info)
      bfd_vma vma;
      disassemble_info *info;
 {
-  return print_insn_cris_generic (vma, info, false);
+  return print_insn_cris_generic (vma, info, FALSE);
 }
 
 /* Return a disassembler-function that prints registers with a `$' prefix,
diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c
index debab9b9102..2a3cd218f47 100644
--- a/opcodes/h8300-dis.c
+++ b/opcodes/h8300-dis.c
@@ -48,7 +48,7 @@ bfd_h8_disassemble_init ()
   struct h8_instruction *pi;
 
   nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
-  
+
   h8_instructions = (struct h8_instruction *)
     xmalloc (nopcodes * sizeof (struct h8_instruction));
 
@@ -112,7 +112,7 @@ bfd_h8_disassemble (addr, info, mode)
   int abs = 0;
   int bit = 0;
   int plen = 0;
-  static boolean init = 0;
+  static bfd_boolean init = 0;
   const struct h8_instruction *qi;
   char const **pregnames = mode != 0 ? lregnames : wregnames;
   int status;
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 0a4280108da..d8862f78de5 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -52,7 +52,7 @@ static int print_insn_mips16
 static int is_newabi
   PARAMS ((Elf_Internal_Ehdr *));
 static void print_mips16_insn_arg
-  PARAMS ((int, const struct mips_opcode *, int, boolean, int, bfd_vma,
+  PARAMS ((int, const struct mips_opcode *, int, bfd_boolean, int, bfd_vma,
 	   struct disassemble_info *));
 
 /* FIXME: These should be shared with gdb somehow.  */
@@ -312,7 +312,7 @@ print_insn_arg (d, l, pc, info)
 	      if ((vsel & 1) == 0)
 		break;
 	    (*info->fprintf_func) (info->stream, "$v%d[%d]",
-				   (l >> OP_SH_FT) & OP_MASK_FT, 
+				   (l >> OP_SH_FT) & OP_MASK_FT,
 				   vsel >> 1);
 	  }
 	else if ((vsel & 0x08) == 0)
@@ -498,7 +498,7 @@ print_insn_mips (memaddr, word, info)
 {
   register const struct mips_opcode *op;
   int target_processor, mips_isa;
-  static boolean init = 0;
+  static bfd_boolean init = 0;
   static const struct mips_opcode *mips_hash[OP_MASK_OP + 1];
 
   /* Build a hash table to shorten the search time.  */
@@ -687,7 +687,7 @@ print_insn_mips16 (memaddr, info)
   bfd_byte buffer[2];
   int length;
   int insn;
-  boolean use_extend;
+  bfd_boolean use_extend;
   int extend = 0;
   const struct mips_opcode *op, *opend;
 
@@ -715,10 +715,10 @@ print_insn_mips16 (memaddr, info)
     insn = bfd_getl16 (buffer);
 
   /* Handle the extend opcode specially.  */
-  use_extend = false;
+  use_extend = FALSE;
   if ((insn & 0xf800) == 0xf000)
     {
-      use_extend = true;
+      use_extend = TRUE;
       extend = insn & 0x7ff;
 
       memaddr += 2;
@@ -768,7 +768,7 @@ print_insn_mips16 (memaddr, info)
 		  return length - 2;
 		}
 
-	      use_extend = false;
+	      use_extend = FALSE;
 
 	      memaddr += 2;
 
@@ -776,7 +776,7 @@ print_insn_mips16 (memaddr, info)
 						  info);
 	      if (status == 0)
 		{
-		  use_extend = true;
+		  use_extend = TRUE;
 		  if (info->endian == BFD_ENDIAN_BIG)
 		    extend = bfd_getb16 (buffer);
 		  else
@@ -839,7 +839,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
      char type;
      const struct mips_opcode *op;
      int l;
-     boolean use_extend;
+     bfd_boolean use_extend;
      int extend;
      bfd_vma memaddr;
      struct disassemble_info *info;
diff --git a/opcodes/mmix-dis.c b/opcodes/mmix-dis.c
index c81e679f4e1..f28e5284372 100644
--- a/opcodes/mmix-dis.c
+++ b/opcodes/mmix-dis.c
@@ -1,5 +1,5 @@
 /* mmix-dis.c -- Disassemble MMIX instructions.
-   Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
    Written by Hans-Peter Nilsson (hp@bitrange.com)
 
 This file is part of GDB and the GNU binutils.
@@ -66,13 +66,15 @@ struct mmix_dis_info
    char basic_reg_name[256][sizeof ("$255")];
  };
 
-static boolean initialize_mmix_dis_info PARAMS ((struct disassemble_info *));
-static const struct mmix_opcode *get_opcode PARAMS ((unsigned long));
+static bfd_boolean initialize_mmix_dis_info
+  PARAMS ((struct disassemble_info *));
+static const struct mmix_opcode *get_opcode
+  PARAMS ((unsigned long));
 
 
 /* Initialize a target-specific array in INFO.  */
 
-static boolean
+static bfd_boolean
 initialize_mmix_dis_info (info)
      struct disassemble_info *info;
 {
@@ -80,7 +82,7 @@ initialize_mmix_dis_info (info)
   int i;
 
   if (minfop == NULL)
-    return false;
+    return FALSE;
 
   memset (minfop, 0, sizeof (*minfop));
 
@@ -107,7 +109,7 @@ initialize_mmix_dis_info (info)
 	  if (syms == NULL)
 	    { FATAL_DEBUG;
 	      free (minfop);
-	      return false;
+	      return FALSE;
 	    }
 	  nsyms = bfd_canonicalize_symtab (abfd, syms);
 
@@ -137,7 +139,7 @@ initialize_mmix_dis_info (info)
     minfop->spec_reg_name[mmix_spec_regs[i].number] = mmix_spec_regs[i].name;
 
   info->private_data = (PTR) minfop;
-  return true;
+  return TRUE;
 }
 
 /* A table indexed by the first byte is constructed as we disassemble each
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 24d4b41eaff..c77b2fe9b02 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -1,5 +1,5 @@
 /* Disassemble SH instructions.
-   Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001
+   Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002
    Free Software Foundation, Inc.
 
 This program is free software; you can redistribute it and/or modify
@@ -24,6 +24,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #include "sh-opc.h"
 #include "dis-asm.h"
 
+#ifdef ARCH_all
+#define INCLUDE_SHMEDIA
+#endif
+
 static void print_movxy
   PARAMS ((sh_opcode_info *, int, int, fprintf_ftype, void *));
 static void print_insn_ddt PARAMS ((int, struct disassemble_info *));
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index 10c0f3102e8..631678c4c6f 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -1,5 +1,5 @@
 /* Disassemble SH64 instructions.
-   Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -48,7 +48,7 @@ struct sh64_disassemble_info
  };
 
 /* Each item in the table is a mask to indicate which bits to be set
-   to determine an instruction's operator. 
+   to determine an instruction's operator.
    The index is as same as the instruction in the opcode table.
    Note that some archs have this as a field in the opcode table.  */
 static unsigned long *shmedia_opcode_mask_table;
@@ -56,7 +56,7 @@ static unsigned long *shmedia_opcode_mask_table;
 static void initialize_shmedia_opcode_mask_table PARAMS ((void));
 static int print_insn_shmedia PARAMS ((bfd_vma, disassemble_info *));
 static const char *creg_name PARAMS ((int));
-static boolean init_sh64_disasm_info PARAMS ((struct disassemble_info *));
+static bfd_boolean init_sh64_disasm_info PARAMS ((struct disassemble_info *));
 static enum sh64_elf_cr_type sh64_get_contents_type_disasm
   PARAMS ((bfd_vma, struct disassemble_info *));
 
@@ -86,7 +86,7 @@ initialize_shmedia_opcode_mask_table ()
 	{
 	  int offset = shmedia_table[n].nibbles[i];
 	  int length;
-	  
+
 	  switch (shmedia_table[n].arg[i])
 	    {
 	    case A_GREG_M:
@@ -118,7 +118,7 @@ initialize_shmedia_opcode_mask_table ()
 	      length = 3;
 	      break;
 
-	    case A_IMMM:	
+	    case A_IMMM:
 	      abort ();
 	      break;
 
@@ -511,7 +511,7 @@ sh64_get_contents_type_disasm (memaddr, info)
 
 /* Initialize static and dynamic disassembly state.  */
 
-static boolean
+static bfd_boolean
 init_sh64_disasm_info (info)
      struct disassemble_info *info;
 {
@@ -519,7 +519,7 @@ init_sh64_disasm_info (info)
     = calloc (sizeof (*sh64_infop), 1);
 
   if (sh64_infop == NULL)
-    return false;
+    return FALSE;
 
   info->private_data = sh64_infop;
 
@@ -529,14 +529,14 @@ init_sh64_disasm_info (info)
   if (shmedia_opcode_mask_table == NULL)
     initialize_shmedia_opcode_mask_table ();
 
-  return true;
+  return TRUE;
 }
 
 /* Main entry to disassemble SHmedia instructions, given an endian set in
    INFO.  Note that the simulator uses this as the main entry and does not
    use any of the functions further below.  */
 
-int 
+int
 print_insn_sh64x_media (memaddr, info)
      bfd_vma memaddr;
      struct disassemble_info *info;
@@ -554,7 +554,7 @@ print_insn_sh64x_media (memaddr, info)
 /* Main entry to disassemble SHmedia insns.
    If we see an SHcompact instruction, return -2.  */
 
-int 
+int
 print_insn_sh64 (memaddr, info)
      bfd_vma memaddr;
      struct disassemble_info *info;
diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c
index dbd43aac76e..7c449f67ad1 100644
--- a/opcodes/v850-dis.c
+++ b/opcodes/v850-dis.c
@@ -1,5 +1,6 @@
 /* Disassemble V850 instructions.
-   Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
+   Copyright 1996, 1997, 1998, 2000, 2001, 2002
+   Free Software Foundation, Inc.
 
 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
@@ -50,16 +51,16 @@ disassemble (memaddr, info, insn)
      struct disassemble_info *info;
      unsigned long insn;
 {
-  struct v850_opcode *          op = (struct v850_opcode *)v850_opcodes;
-  const struct v850_operand *   operand;
-  int                           match = 0;
-  int                         	short_op = ((insn & 0x0600) != 0x0600);
-  int				bytes_read;
-  int				target_processor;
+  struct v850_opcode *op = (struct v850_opcode *)v850_opcodes;
+  const struct v850_operand *operand;
+  int match = 0;
+  int short_op = ((insn & 0x0600) != 0x0600);
+  int bytes_read;
+  int target_processor;
   
   /* Special case: 32 bit MOV */
   if ((insn & 0xffe0) == 0x0620)
-    short_op = true;
+    short_op = 1;
   
   bytes_read = short_op ? 2 : 4;
   
@@ -85,9 +86,9 @@ disassemble (memaddr, info, insn)
       if ((op->mask & insn) == op->opcode
 	  && (op->processors & target_processor))
 	{
-	  const unsigned char * opindex_ptr;
-	  unsigned int          opnum;
-	  unsigned int          memop;
+	  const unsigned char *opindex_ptr;
+	  unsigned int opnum;
+	  unsigned int memop;
 
 	  match = 1;
 	  (*info->fprintf_func) (info->stream, "%s\t", op->name);
@@ -111,10 +112,10 @@ disassemble (memaddr, info, insn)
 	       *opindex_ptr != 0;
 	       opindex_ptr++, opnum++)
 	    {
-	      long 	value;
-	      int  	flag;
-	      int       status;
-	      bfd_byte	buffer[ 4 ];
+	      long value;
+	      int flag;
+	      int status;
+	      bfd_byte buffer[4];
 	      
 	      operand = &v850_operands[*opindex_ptr];
 	      
@@ -203,11 +204,11 @@ disassemble (memaddr, info, insn)
 		    static int list12_regs[32]   = { 30,  0,  0,  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  0,  0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
 		    static int list18_h_regs[32] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
 		    static int list18_l_regs[32] = {  3,  2,  1, -2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 14, 15, 13, 12,  7,  6,  5,  4, 11, 10,  9,  8 };
-		    int *             regs;
-		    int               i;
+		    int *regs;
+		    int i;
 		    unsigned long int mask = 0;
-		    int               pc   = false;
-		    int               sr   = false;
+		    int pc = 0;
+		    int sr = 0;
 		    
 		    
 		    switch (operand->shift)
@@ -230,8 +231,8 @@ disassemble (memaddr, info, insn)
 			      default: mask |= (1 << regs[ i ]); break;
 				/* xgettext:c-format */
 			      case 0:  fprintf (stderr, _("unknown pop reg: %d\n"), i ); abort();
-			      case -1: pc = true; break;
-			      case -2: sr = true; break;
+			      case -1: pc = 1; break;
+			      case -2: sr = 1; break;
 			      }
 			  }
 		      }
@@ -243,7 +244,7 @@ disassemble (memaddr, info, insn)
 			if (mask)
 			  {
 			    unsigned int bit;
-			    int          shown_one = false;
+			    int shown_one = 0;
 			    
 			    for (bit = 0; bit < 32; bit++)
 			      if (mask & (1 << bit))
@@ -254,7 +255,7 @@ disassemble (memaddr, info, insn)
 				  if (shown_one)
 				    info->fprintf_func (info->stream, ", ");
 				  else
-				    shown_one = true;
+				    shown_one = 1;
 				  
 				  info->fprintf_func (info->stream, v850_reg_names[first]);
 				  
@@ -347,8 +348,8 @@ print_insn_v850 (memaddr, info)
      bfd_vma memaddr;
      struct disassemble_info * info;
 {
-  int           status;
-  bfd_byte      buffer[ 4 ];
+  int status;
+  bfd_byte buffer[4];
   unsigned long insn = 0;
 
   /* First figure out how big the opcode is.  */