diff options
| author | H.J. Lu <hjl@lucon.org> | 2008-01-24 15:11:35 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@lucon.org> | 2008-01-24 15:11:35 +0000 |
| commit | 5a706a1d3fe2dc96d628e43c1e136a18a5279712 (patch) | |
| tree | e414fe04f019a2e15bfb8520bb4d6fc3caa20a94 /opcodes | |
| parent | 3aad1fbd85d3dd6d47edfc9446c6864767e40e46 (diff) | |
| download | gdb-5a706a1d3fe2dc96d628e43c1e136a18a5279712.tar.gz | |
gas/testsuite/
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-sib.s: Add tests for r12.
* gas/i386/x86-64-sib-intel.d: Updated.
* gas/i386/x86-64-sib.d: Likewise.
opcodes/
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_extended): Handle r12 like rsp.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 14 |
2 files changed, 11 insertions, 7 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 81b4003f1aa..92d72fe10d9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2008-01-24 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (OP_E_extended): Handle r12 like rsp. + 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index d237b626a7b..4f14a327efa 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -6645,7 +6645,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) int havebase; int haveindex; int needindex; - int base; + int base, rbase; int index = 0; int scale = 0; @@ -6667,7 +6667,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) haveindex = index != 4; codep++; } - base += add; + rbase = base + add; /* If we have a DREX byte, skip it now (it has already been handled) */ @@ -6680,7 +6680,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) switch (modrm.mod) { case 0: - if ((base & 7) == 5) + if (base == 5) { havebase = 0; if (address_mode == mode_64bit && !havesib) @@ -6710,7 +6710,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) || (havesib && (haveindex || scale != 0))); if (!intel_syntax) - if (modrm.mod != 0 || (base & 7) == 5) + if (modrm.mod != 0 || base == 5) { if (havedisp || riprel) print_displacement (scratchbuf, disp); @@ -6738,7 +6738,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) *obufp = '\0'; if (havebase) oappend (address_mode == mode_64bit && (sizeflag & AFLAG) - ? names64[base] : names32[base]); + ? names64[rbase] : names32[rbase]); if (havesib) { /* ESP/RSP won't allow index. If base isn't ESP/RSP, @@ -6769,7 +6769,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) } } if (intel_syntax - && (disp || modrm.mod != 0 || (base & 7) == 5)) + && (disp || modrm.mod != 0 || base == 5)) { if (!havedisp || (bfd_signed_vma) disp >= 0) { @@ -6795,7 +6795,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) } else if (intel_syntax) { - if (modrm.mod != 0 || (base & 7) == 5) + if (modrm.mod != 0 || base == 5) { if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES | PREFIX_FS | PREFIX_GS)) |