diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2013-08-23 14:12:59 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2013-08-23 14:12:59 +0000 |
| commit | c7d13474d9a0663d577edfb770eeb547222778ad (patch) | |
| tree | 684508cfe34d25df7a7147fdb4f1d340453e7bd0 /opcodes | |
| parent | eb1355aeff5bbb06236e2a609d2537528c7a2c52 (diff) | |
| download | gdb-c7d13474d9a0663d577edfb770eeb547222778ad.tar.gz | |
opcodes/
* micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
replacing NODS.
gas/testsuite/
* gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
slot scheduling of ALNV.PS.
* gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* gas/testsuite/gas/mips/micromips-trap.d: Likewise.
* gas/testsuite/gas/mips/micromips.d: Likewise.
* gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/micromips-opc.c | 4 |
2 files changed, 6 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7427f14fba7..ce6aebecf18 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2013-08-23 Maciej W. Rozycki <macro@codesourcery.com> + + * micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps", + replacing NODS. + 2013-08-23 Yuri Chornoivan <yurchor@ukr.net> PR binutils/15834 diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index da1f708d97e..fa6efb51486 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -309,9 +309,7 @@ const struct mips_opcode micromips_opcodes[] = {"addu", "md,me,ml", 0x0400, 0xfc01, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, {"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, {"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, 0, I1, 0, 0 }, -/* We have no flag to mark the read from "y", so we use NODS to disable - delay slot scheduling of ALNV.PS altogether. */ -{"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|NODS|FP_D, 0, I1, 0, 0 }, +{"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, {"and", "mf,mt,mg", 0x4480, 0xffc0, MOD_1|RD_3, 0, I1, 0, 0 }, {"and", "mf,mg,mx", 0x4480, 0xffc0, MOD_1|RD_2, 0, I1, 0, 0 }, {"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |