diff options
| author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:39:39 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:39:39 +0000 |
| commit | cda9de042740f0606bc3c0ff13f63b744f7f3e1f (patch) | |
| tree | 405b67a1d219220311b474589df9a213597748d1 /sim/arm/armemu.c | |
| parent | 2e2344687f6d18ac758d7b7df4dd1fceae8120c2 (diff) | |
| download | gdb-cda9de042740f0606bc3c0ff13f63b744f7f3e1f.tar.gz | |
* armemu.c (LoadSMult): Use WriteR15() to discard the least
significant bits of PC.
Diffstat (limited to 'sim/arm/armemu.c')
| -rw-r--r-- | sim/arm/armemu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 2fc0eda5f57..43cd6dc8044 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -3544,7 +3544,7 @@ LoadSMult (ARMul_State * state, ARMword instr, state->Cpsr = GETSPSR (state->Bank); ARMul_CPSRAltered (state); } - state->Reg[15] = PC; + WriteR15 (state, PC); #else if (state->Mode == USER26MODE || state->Mode == USER32MODE) { /* protect bits in user mode */ @@ -3555,8 +3555,8 @@ LoadSMult (ARMul_State * state, ARMword instr, } else ARMul_R15Altered (state); -#endif FLUSHPIPE; +#endif } if (!BIT (15) && state->Mode != USER26MODE && state->Mode != USER32MODE) |