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authorNick Clifton <nickc@redhat.com>2000-05-23 23:52:46 +0000
committerNick Clifton <nickc@redhat.com>2000-05-23 23:52:46 +0000
commit50c7b89cdc884f7ef36949d517638091fed55ef7 (patch)
treeab3cb04c963c751893ed39f0ed8685fc412da4fb /sim/arm
parent5ef4431336b50776548ffc817d2ca2ff2b6d3752 (diff)
downloadgdb-50c7b89cdc884f7ef36949d517638091fed55ef7.tar.gz
Add special case handling when GDB set CPSR register
Diffstat (limited to 'sim/arm')
-rw-r--r--sim/arm/ChangeLog5
-rw-r--r--sim/arm/wrapper.c8
2 files changed, 12 insertions, 1 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index bb55ddd8f10..9649c3999b8 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2000-05-23 Nick Clifton <nickc@cygnus.com>
+
+ * wrapper.c (sim_store_register): Special handling for CPSR
+ register.
+
2000-03-11 Philip Blundell <philb@gnu.org>
* armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c
index 8417f40938e..003dec6d594 100644
--- a/sim/arm/wrapper.c
+++ b/sim/arm/wrapper.c
@@ -320,7 +320,13 @@ sim_store_register (sd, rn, memory, length)
int length ATTRIBUTE_UNUSED;
{
init ();
- ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
+ if (rn == 25)
+ {
+ state->Cpsr = frommem (state, memory);
+ ARMul_CPSRAltered (state);
+ }
+ else
+ ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
return -1;
}